From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDE062578 for ; Tue, 25 Oct 2022 18:46:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666723566; x=1698259566; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=ILXUiOOxOrpGmkisDJww3yxMn0TF5ikM+l8GlhryBRo=; b=gq1xfdFUEjCVZi7lZmzOZv0P0BvXlOEZe55iGBOjKnmUIqblfkQN3JyN A4Ef3CHtOfrBZu5+zU2eNsu09k6g8S0BXIf8WZYN2jtxfYHDCk2zFekQB rbdzN6FOPJQ3CatyWdOVO1qAp4rLQp5lrjMCcR7Cvz8o+GdHOUmaXnaf4 J2MCNnZWEW5xEDJu/4qYalCdZgfSzdZU8EBtaR5Jv3nDgQpE3slqI7LyS ifR5tK0B11qIDqorAepkJeh+xXJmNILPv16XUrOMMIwoU+ZmiwFjRDaok Ap0W5Imc7SB3pQcyjuXRXNgRsWUuZM17SBeAociv9cwZimjCLFua92y1q Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10511"; a="369829511" X-IronPort-AV: E=Sophos;i="5.95,212,1661842800"; d="scan'208";a="369829511" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2022 11:46:06 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10511"; a="757028549" X-IronPort-AV: E=Sophos;i="5.95,212,1661842800"; d="scan'208";a="757028549" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.213.83]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2022 11:46:05 -0700 Date: Tue, 25 Oct 2022 11:45:39 -0700 Message-ID: <87ilk7pwrw.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Andi Shyti Cc: Gwan-gyeong Mun , , , , Nick Desaulniers , linux-kernel@vger.kernel.org Subject: Re: [PATCH] drm/i915/hwmon: Fix a build error used with clang compiler In-Reply-To: References: <20221024210953.1572998-1-gwan-gyeong.mun@intel.com> <87mt9kppb6.wl-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: llvm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII On Tue, 25 Oct 2022 02:25:06 -0700, Andi Shyti wrote: > > Hi Ashutosh, Hi Andi :) > > > If a non-constant variable is used as the first argument of the FIELD_PREP > > > macro, a build error occurs when using the clang compiler. A "non-constant variable" does not seem to be the cause of the compile error with clang, see below. > > > > drivers/gpu/drm/i915/i915_hwmon.c:115:16: error: result of comparison of constant 18446744073709551615 with expression of type 'typeof (_Generic((field_msk), char: (unsigned char)0, unsigned char: (unsigned char)0, signed char: (unsigned char)0, unsigned short: (unsigned short)0, short: (unsigned short)0, unsigned int: (unsigned int)0, int: (unsigned int)0, unsigned long: (unsigned long)0, long: (unsigned long)0, unsigned long long: (unsigned long long)0, long long: (unsigned long long)0, default: (field_msk)))' (aka 'unsigned int') is always false [-Werror,-Wtautological-constant-out-of-range-compare] > > > > What is 18446744073709551615? You may want to limit the length of this line > > or checkpatch doesn't complain? > > yeah! I am not a clang user, and this must be some ugly error > output. I don't think it makes sense to break it, though. 18446744073709551615 == ~0ull (see use in __BF_FIELD_CHECK). > > > > bits_to_set = FIELD_PREP(field_msk, nval); > > > ^~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > ./include/linux/bitfield.h:114:3: note: expanded from macro 'FIELD_PREP' > > > __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ > > > ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > ./include/linux/bitfield.h:71:53: note: expanded from macro '__BF_FIELD_CHECK' > > > BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \ So clang seems to break here at this line in __BF_FIELD_CHECK (note ~0ull also occurs here): BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \ __bf_cast_unsigned(_reg, ~0ull), \ _pfx "type of reg too small for mask"); \ So it goes through previous checks including the "mask is not constant" check. As Nick Desaulniers mentions "__builtin_constant_p is evaluated after most optimizations have run" so by that time both compilers (gcc and clang) have figured out that even though _mask is coming in as function argument it is really the constant below: #define PKG_PWR_LIM_1 REG_GENMASK(14, 0) But it is not clear why clang chokes on this "type of reg too small for mask" check (and gcc doesn't) since everything is u32. It is for this reason I want someone from llvm to chime in. > > > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~ > > > ./include/linux/build_bug.h:39:58: note: expanded from macro 'BUILD_BUG_ON_MSG' > > > ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~ > > > ./include/linux/compiler_types.h:357:22: note: expanded from macro 'compiletime_assert' > > > _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) > > > ~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > ./include/linux/compiler_types.h:345:23: note: expanded from macro '_compiletime_assert' > > > __compiletime_assert(condition, msg, prefix, suffix) > > > ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > ./include/linux/compiler_types.h:337:9: note: expanded from macro '__compiletime_assert' > > > if (!(condition)) \ > > > > > > Fixes: 99f55efb7911 ("drm/i915/hwmon: Power PL1 limit and TDP setting") > > > Cc: Ashutosh Dixit > > > Cc: Anshuman Gupta > > > Cc: Andi Shyti > > > Signed-off-by: Gwan-gyeong Mun > > > --- > > > drivers/gpu/drm/i915/i915_hwmon.c | 12 +++--------- > > > 1 file changed, 3 insertions(+), 9 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c > > > index 9e9781493025..782a621b1928 100644 > > > --- a/drivers/gpu/drm/i915/i915_hwmon.c > > > +++ b/drivers/gpu/drm/i915/i915_hwmon.c > > > @@ -101,21 +101,16 @@ hwm_field_read_and_scale(struct hwm_drvdata *ddat, i915_reg_t rgadr, > > > > > > static void > > > hwm_field_scale_and_write(struct hwm_drvdata *ddat, i915_reg_t rgadr, > > > - u32 field_msk, int nshift, > > > - unsigned int scale_factor, long lval) > > > + int nshift, unsigned int scale_factor, long lval) > > > { > > > u32 nval; > > > - u32 bits_to_clear; > > > - u32 bits_to_set; > > > > > > /* Computation in 64-bits to avoid overflow. Round to nearest. */ > > > nval = DIV_ROUND_CLOSEST_ULL((u64)lval << nshift, scale_factor); > > > > > > - bits_to_clear = field_msk; > > > - bits_to_set = FIELD_PREP(field_msk, nval); > > > - > > > hwm_locked_with_pm_intel_uncore_rmw(ddat, rgadr, > > > - bits_to_clear, bits_to_set); > > > + PKG_PWR_LIM_1, > > > + FIELD_PREP(PKG_PWR_LIM_1, nval)); > > > > I don't want to give up so easily. We might have future uses for the > > function where we want field_msk to be passed into the function (rather > > than set inside the function as in this patch). > > > > Do we understand what clang is complaining about? And why this compiles > > with gcc? > > Because we are not compiling the builtin functions with gcc but > gcc has support for them. The FIELD_PREP checks if the first > parameter is a constant: > > BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), > > where _mask was our field_mask, but we ignore it. Apparently > clang doesn't. So we have debunked this above. > If we want to stick to gcc only, then I still think the patch is > correct for two reasons: > > 1. it's cleaner > 2. we would get on with the job and if one day we will decide > to suppport builtin functions in gcc as well, we will sleep > peacefully :) I disagree with the patch even if we need to fix this in i915 (rather than say change the headers or something in clang). Note that hwm_field_scale_and_write() pairs with hwm_field_read_and_scale() (they are basically a set/get pair) so it is desirable they have identical arguments. This patch breaks that symmetry. If we have to fix this in i915, I prefer the following patch (so just skip the checks in FIELD_PREP): @@ -112,7 +112,7 @@ hwm_field_scale_and_write(struct hwm_drvdata *ddat, i915_reg_t rgadr, nval = DIV_ROUND_CLOSEST_ULL((u64)lval << nshift, scale_factor); bits_to_clear = field_msk; - bits_to_set = FIELD_PREP(field_msk, nval); + bits_to_set = (nval << __bf_shf(field_msk)) & field_msk; hwm_locked_with_pm_intel_uncore_rmw(ddat, rgadr, But I'd wait to hear from clang/llvm folks first. > > Copying llvm@lists.linux.dev too. > > maybe llvm folks have a better opinion. > Thanks. -- Ashutosh > > > } > > > > > > /* > > > @@ -406,7 +401,6 @@ hwm_power_write(struct hwm_drvdata *ddat, u32 attr, int chan, long val) > > > case hwmon_power_max: > > > hwm_field_scale_and_write(ddat, > > > hwmon->rg.pkg_rapl_limit, > > > - PKG_PWR_LIM_1, > > > hwmon->scl_shift_power, > > > SF_POWER, val); > > > return 0; > > > -- > > > 2.37.1 > > > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E738AFA373E for ; Tue, 25 Oct 2022 18:46:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C2B3110E060; Tue, 25 Oct 2022 18:46:10 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 10C2310E060 for ; Tue, 25 Oct 2022 18:46:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1666723567; x=1698259567; h=date:message-id:from:to:cc:subject:in-reply-to: references:mime-version; bh=ILXUiOOxOrpGmkisDJww3yxMn0TF5ikM+l8GlhryBRo=; b=dtsG8/5q2p0/eRcRZ9Kbq9ZRabOGPcuRg5/FAHvgpzBIjikRRKOQB9jY w5kZeLTdRRz10TupukOoUGFtf4z67V66QMWTUDxThZHaJdrHHc5Al7/bv O56/GQl2JyKWJvtlw9uRf/wpaAfCodfKSXruuX4ChtoYCyo8kb+JPVsgu Xh5oR0Ve3blZ+qZYgfyH3uo6ucLDl7Y5HDiWR4PTk0XxFe8/XvHdotxJV +/BF5oecOcdn0y/LjMuLHrhelhw42soRPb4nRiDDhjrVRpEZbRepim5kM uXhylcrUCM7rl1XQ9Z6HIcOlpxzL4vFh2jAYRd27bVGm3dtqx64IZ3bAQ A==; X-IronPort-AV: E=McAfee;i="6500,9779,10511"; a="369829510" X-IronPort-AV: E=Sophos;i="5.95,212,1661842800"; d="scan'208";a="369829510" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2022 11:46:06 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10511"; a="757028549" X-IronPort-AV: E=Sophos;i="5.95,212,1661842800"; d="scan'208";a="757028549" Received: from adixit-mobl.amr.corp.intel.com (HELO adixit-arch.intel.com) ([10.212.213.83]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2022 11:46:05 -0700 Date: Tue, 25 Oct 2022 11:45:39 -0700 Message-ID: <87ilk7pwrw.wl-ashutosh.dixit@intel.com> From: "Dixit, Ashutosh" To: Andi Shyti In-Reply-To: References: <20221024210953.1572998-1-gwan-gyeong.mun@intel.com> <87mt9kppb6.wl-ashutosh.dixit@intel.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Subject: Re: [Intel-gfx] [PATCH] drm/i915/hwmon: Fix a build error used with clang compiler X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org, llvm@lists.linux.dev, Nick Desaulniers , linux-kernel@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Tue, 25 Oct 2022 02:25:06 -0700, Andi Shyti wrote: > > Hi Ashutosh, Hi Andi :) > > > If a non-constant variable is used as the first argument of the FIELD_PREP > > > macro, a build error occurs when using the clang compiler. A "non-constant variable" does not seem to be the cause of the compile error with clang, see below. > > > > drivers/gpu/drm/i915/i915_hwmon.c:115:16: error: result of comparison of constant 18446744073709551615 with expression of type 'typeof (_Generic((field_msk), char: (unsigned char)0, unsigned char: (unsigned char)0, signed char: (unsigned char)0, unsigned short: (unsigned short)0, short: (unsigned short)0, unsigned int: (unsigned int)0, int: (unsigned int)0, unsigned long: (unsigned long)0, long: (unsigned long)0, unsigned long long: (unsigned long long)0, long long: (unsigned long long)0, default: (field_msk)))' (aka 'unsigned int') is always false [-Werror,-Wtautological-constant-out-of-range-compare] > > > > What is 18446744073709551615? You may want to limit the length of this line > > or checkpatch doesn't complain? > > yeah! I am not a clang user, and this must be some ugly error > output. I don't think it makes sense to break it, though. 18446744073709551615 == ~0ull (see use in __BF_FIELD_CHECK). > > > > bits_to_set = FIELD_PREP(field_msk, nval); > > > ^~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > ./include/linux/bitfield.h:114:3: note: expanded from macro 'FIELD_PREP' > > > __BF_FIELD_CHECK(_mask, 0ULL, _val, "FIELD_PREP: "); \ > > > ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > ./include/linux/bitfield.h:71:53: note: expanded from macro '__BF_FIELD_CHECK' > > > BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \ So clang seems to break here at this line in __BF_FIELD_CHECK (note ~0ull also occurs here): BUILD_BUG_ON_MSG(__bf_cast_unsigned(_mask, _mask) > \ __bf_cast_unsigned(_reg, ~0ull), \ _pfx "type of reg too small for mask"); \ So it goes through previous checks including the "mask is not constant" check. As Nick Desaulniers mentions "__builtin_constant_p is evaluated after most optimizations have run" so by that time both compilers (gcc and clang) have figured out that even though _mask is coming in as function argument it is really the constant below: #define PKG_PWR_LIM_1 REG_GENMASK(14, 0) But it is not clear why clang chokes on this "type of reg too small for mask" check (and gcc doesn't) since everything is u32. It is for this reason I want someone from llvm to chime in. > > > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~ > > > ./include/linux/build_bug.h:39:58: note: expanded from macro 'BUILD_BUG_ON_MSG' > > > ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~ > > > ./include/linux/compiler_types.h:357:22: note: expanded from macro 'compiletime_assert' > > > _compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__) > > > ~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > ./include/linux/compiler_types.h:345:23: note: expanded from macro '_compiletime_assert' > > > __compiletime_assert(condition, msg, prefix, suffix) > > > ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > > ./include/linux/compiler_types.h:337:9: note: expanded from macro '__compiletime_assert' > > > if (!(condition)) \ > > > > > > Fixes: 99f55efb7911 ("drm/i915/hwmon: Power PL1 limit and TDP setting") > > > Cc: Ashutosh Dixit > > > Cc: Anshuman Gupta > > > Cc: Andi Shyti > > > Signed-off-by: Gwan-gyeong Mun > > > --- > > > drivers/gpu/drm/i915/i915_hwmon.c | 12 +++--------- > > > 1 file changed, 3 insertions(+), 9 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_hwmon.c b/drivers/gpu/drm/i915/i915_hwmon.c > > > index 9e9781493025..782a621b1928 100644 > > > --- a/drivers/gpu/drm/i915/i915_hwmon.c > > > +++ b/drivers/gpu/drm/i915/i915_hwmon.c > > > @@ -101,21 +101,16 @@ hwm_field_read_and_scale(struct hwm_drvdata *ddat, i915_reg_t rgadr, > > > > > > static void > > > hwm_field_scale_and_write(struct hwm_drvdata *ddat, i915_reg_t rgadr, > > > - u32 field_msk, int nshift, > > > - unsigned int scale_factor, long lval) > > > + int nshift, unsigned int scale_factor, long lval) > > > { > > > u32 nval; > > > - u32 bits_to_clear; > > > - u32 bits_to_set; > > > > > > /* Computation in 64-bits to avoid overflow. Round to nearest. */ > > > nval = DIV_ROUND_CLOSEST_ULL((u64)lval << nshift, scale_factor); > > > > > > - bits_to_clear = field_msk; > > > - bits_to_set = FIELD_PREP(field_msk, nval); > > > - > > > hwm_locked_with_pm_intel_uncore_rmw(ddat, rgadr, > > > - bits_to_clear, bits_to_set); > > > + PKG_PWR_LIM_1, > > > + FIELD_PREP(PKG_PWR_LIM_1, nval)); > > > > I don't want to give up so easily. We might have future uses for the > > function where we want field_msk to be passed into the function (rather > > than set inside the function as in this patch). > > > > Do we understand what clang is complaining about? And why this compiles > > with gcc? > > Because we are not compiling the builtin functions with gcc but > gcc has support for them. The FIELD_PREP checks if the first > parameter is a constant: > > BUILD_BUG_ON_MSG(!__builtin_constant_p(_mask), > > where _mask was our field_mask, but we ignore it. Apparently > clang doesn't. So we have debunked this above. > If we want to stick to gcc only, then I still think the patch is > correct for two reasons: > > 1. it's cleaner > 2. we would get on with the job and if one day we will decide > to suppport builtin functions in gcc as well, we will sleep > peacefully :) I disagree with the patch even if we need to fix this in i915 (rather than say change the headers or something in clang). Note that hwm_field_scale_and_write() pairs with hwm_field_read_and_scale() (they are basically a set/get pair) so it is desirable they have identical arguments. This patch breaks that symmetry. If we have to fix this in i915, I prefer the following patch (so just skip the checks in FIELD_PREP): @@ -112,7 +112,7 @@ hwm_field_scale_and_write(struct hwm_drvdata *ddat, i915_reg_t rgadr, nval = DIV_ROUND_CLOSEST_ULL((u64)lval << nshift, scale_factor); bits_to_clear = field_msk; - bits_to_set = FIELD_PREP(field_msk, nval); + bits_to_set = (nval << __bf_shf(field_msk)) & field_msk; hwm_locked_with_pm_intel_uncore_rmw(ddat, rgadr, But I'd wait to hear from clang/llvm folks first. > > Copying llvm@lists.linux.dev too. > > maybe llvm folks have a better opinion. > Thanks. -- Ashutosh > > > } > > > > > > /* > > > @@ -406,7 +401,6 @@ hwm_power_write(struct hwm_drvdata *ddat, u32 attr, int chan, long val) > > > case hwmon_power_max: > > > hwm_field_scale_and_write(ddat, > > > hwmon->rg.pkg_rapl_limit, > > > - PKG_PWR_LIM_1, > > > hwmon->scl_shift_power, > > > SF_POWER, val); > > > return 0; > > > -- > > > 2.37.1 > > >