From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C0A98C4338F for ; Wed, 18 Aug 2021 14:42:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9E663610CF for ; Wed, 18 Aug 2021 14:42:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239485AbhHROnB (ORCPT ); Wed, 18 Aug 2021 10:43:01 -0400 Received: from mail.kernel.org ([198.145.29.99]:42144 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238113AbhHROnA (ORCPT ); Wed, 18 Aug 2021 10:43:00 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 085CB6108D; Wed, 18 Aug 2021 14:42:26 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mGMlr-005mN8-Hi; Wed, 18 Aug 2021 15:42:23 +0100 Date: Wed, 18 Aug 2021 15:42:23 +0100 Message-ID: <87im02stkg.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Cc: kvmarm@lists.cs.columbia.edu, will@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, pbonzini@redhat.com, drjones@redhat.com, oupton@google.com, qperret@google.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com Subject: Re: [PATCH v4 06/15] KVM: arm64: Restore mdcr_el2 from vcpu In-Reply-To: <20210817081134.2918285-7-tabba@google.com> References: <20210817081134.2918285-1-tabba@google.com> <20210817081134.2918285-7-tabba@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tabba@google.com, kvmarm@lists.cs.columbia.edu, will@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, pbonzini@redhat.com, drjones@redhat.com, oupton@google.com, qperret@google.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On Tue, 17 Aug 2021 09:11:25 +0100, Fuad Tabba wrote: > > On deactivating traps, restore the value of mdcr_el2 from the > newly created and preserved host value vcpu context, rather than > directly reading the hardware register. > > Up until and including this patch the two values are the same, > i.e., the hardware register and the vcpu one. A future patch will > be changing the value of mdcr_el2 on activating traps, and this > ensures that its value will be restored. > > No functional change intended. > > Signed-off-by: Fuad Tabba > --- > arch/arm64/include/asm/kvm_host.h | 5 ++++- > arch/arm64/include/asm/kvm_hyp.h | 2 +- > arch/arm64/kvm/hyp/include/hyp/switch.h | 6 +++++- > arch/arm64/kvm/hyp/nvhe/switch.c | 13 +++++-------- > arch/arm64/kvm/hyp/vhe/switch.c | 14 +++++--------- > arch/arm64/kvm/hyp/vhe/sysreg-sr.c | 2 +- > 6 files changed, 21 insertions(+), 21 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > index 4d2d974c1522..76462c6a91ee 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -287,10 +287,13 @@ struct kvm_vcpu_arch { > /* Stage 2 paging state used by the hardware on next switch */ > struct kvm_s2_mmu *hw_mmu; > > - /* HYP configuration */ > + /* Values of trap registers for the guest. */ > u64 hcr_el2; > u64 mdcr_el2; > > + /* Values of trap registers for the host before guest entry. */ > + u64 mdcr_el2_host; This probably should then eventually replace the per-CPU copy of mdcr_el2 that lives in debug.c, shouldn't it? > + > /* Exception Information */ > struct kvm_vcpu_fault_info fault; > > diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h > index 9d60b3006efc..657d0c94cf82 100644 > --- a/arch/arm64/include/asm/kvm_hyp.h > +++ b/arch/arm64/include/asm/kvm_hyp.h > @@ -95,7 +95,7 @@ void __sve_restore_state(void *sve_pffr, u32 *fpsr); > > #ifndef __KVM_NVHE_HYPERVISOR__ > void activate_traps_vhe_load(struct kvm_vcpu *vcpu); > -void deactivate_traps_vhe_put(void); > +void deactivate_traps_vhe_put(struct kvm_vcpu *vcpu); > #endif > > u64 __guest_enter(struct kvm_vcpu *vcpu); > diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h > index e4a2f295a394..a0e78a6027be 100644 > --- a/arch/arm64/kvm/hyp/include/hyp/switch.h > +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h > @@ -92,11 +92,15 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu) > write_sysreg(0, pmselr_el0); > write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0); > } > + > + vcpu->arch.mdcr_el2_host = read_sysreg(mdcr_el2); > write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); > } > > -static inline void __deactivate_traps_common(void) > +static inline void __deactivate_traps_common(struct kvm_vcpu *vcpu) > { > + write_sysreg(vcpu->arch.mdcr_el2_host, mdcr_el2); > + > write_sysreg(0, hstr_el2); > if (kvm_arm_support_pmu_v3()) > write_sysreg(0, pmuserenr_el0); > diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c > index f7af9688c1f7..2ea764a48958 100644 > --- a/arch/arm64/kvm/hyp/nvhe/switch.c > +++ b/arch/arm64/kvm/hyp/nvhe/switch.c > @@ -69,12 +69,10 @@ static void __activate_traps(struct kvm_vcpu *vcpu) > static void __deactivate_traps(struct kvm_vcpu *vcpu) > { > extern char __kvm_hyp_host_vector[]; > - u64 mdcr_el2, cptr; > + u64 cptr; > > ___deactivate_traps(vcpu); > > - mdcr_el2 = read_sysreg(mdcr_el2); > - > if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) { > u64 val; > > @@ -92,13 +90,12 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu) > isb(); > } > > - __deactivate_traps_common(); > + vcpu->arch.mdcr_el2_host &= MDCR_EL2_HPMN_MASK | > + MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT | > + MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT; > > - mdcr_el2 &= MDCR_EL2_HPMN_MASK; > - mdcr_el2 |= MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT; > - mdcr_el2 |= MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT; > + __deactivate_traps_common(vcpu); > > - write_sysreg(mdcr_el2, mdcr_el2); FWIW, I found this whole sequence massively confusing, and it is only when I came to patch #7 that the various pieces did come together. Thanks, M. -- Without deviation from the norm, progress is not possible. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8D5DC4338F for ; Wed, 18 Aug 2021 14:42:34 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id 50081610CF for ; Wed, 18 Aug 2021 14:42:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 50081610CF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id E85E54A523; Wed, 18 Aug 2021 10:42:33 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 6+gq4rYUdwhY; Wed, 18 Aug 2021 10:42:28 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id C5D934B0C2; Wed, 18 Aug 2021 10:42:28 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 296134A524 for ; Wed, 18 Aug 2021 10:42:28 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Hf81rUqEUSHb for ; Wed, 18 Aug 2021 10:42:27 -0400 (EDT) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id D111B4A523 for ; Wed, 18 Aug 2021 10:42:26 -0400 (EDT) Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 085CB6108D; Wed, 18 Aug 2021 14:42:26 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mGMlr-005mN8-Hi; Wed, 18 Aug 2021 15:42:23 +0100 Date: Wed, 18 Aug 2021 15:42:23 +0100 Message-ID: <87im02stkg.wl-maz@kernel.org> From: Marc Zyngier To: Fuad Tabba Subject: Re: [PATCH v4 06/15] KVM: arm64: Restore mdcr_el2 from vcpu In-Reply-To: <20210817081134.2918285-7-tabba@google.com> References: <20210817081134.2918285-1-tabba@google.com> <20210817081134.2918285-7-tabba@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tabba@google.com, kvmarm@lists.cs.columbia.edu, will@kernel.org, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, mark.rutland@arm.com, christoffer.dall@arm.com, pbonzini@redhat.com, drjones@redhat.com, oupton@google.com, qperret@google.com, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: kernel-team@android.com, kvm@vger.kernel.org, pbonzini@redhat.com, will@kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, 17 Aug 2021 09:11:25 +0100, Fuad Tabba wrote: > > On deactivating traps, restore the value of mdcr_el2 from the > newly created and preserved host value vcpu context, rather than > directly reading the hardware register. > > Up until and including this patch the two values are the same, > i.e., the hardware register and the vcpu one. A future patch will > be changing the value of mdcr_el2 on activating traps, and this > ensures that its value will be restored. > > No functional change intended. > > Signed-off-by: Fuad Tabba > --- > arch/arm64/include/asm/kvm_host.h | 5 ++++- > arch/arm64/include/asm/kvm_hyp.h | 2 +- > arch/arm64/kvm/hyp/include/hyp/switch.h | 6 +++++- > arch/arm64/kvm/hyp/nvhe/switch.c | 13 +++++-------- > arch/arm64/kvm/hyp/vhe/switch.c | 14 +++++--------- > arch/arm64/kvm/hyp/vhe/sysreg-sr.c | 2 +- > 6 files changed, 21 insertions(+), 21 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > index 4d2d974c1522..76462c6a91ee 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -287,10 +287,13 @@ struct kvm_vcpu_arch { > /* Stage 2 paging state used by the hardware on next switch */ > struct kvm_s2_mmu *hw_mmu; > > - /* HYP configuration */ > + /* Values of trap registers for the guest. */ > u64 hcr_el2; > u64 mdcr_el2; > > + /* Values of trap registers for the host before guest entry. */ > + u64 mdcr_el2_host; This probably should then eventually replace the per-CPU copy of mdcr_el2 that lives in debug.c, shouldn't it? > + > /* Exception Information */ > struct kvm_vcpu_fault_info fault; > > diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h > index 9d60b3006efc..657d0c94cf82 100644 > --- a/arch/arm64/include/asm/kvm_hyp.h > +++ b/arch/arm64/include/asm/kvm_hyp.h > @@ -95,7 +95,7 @@ void __sve_restore_state(void *sve_pffr, u32 *fpsr); > > #ifndef __KVM_NVHE_HYPERVISOR__ > void activate_traps_vhe_load(struct kvm_vcpu *vcpu); > -void deactivate_traps_vhe_put(void); > +void deactivate_traps_vhe_put(struct kvm_vcpu *vcpu); > #endif > > u64 __guest_enter(struct kvm_vcpu *vcpu); > diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h > index e4a2f295a394..a0e78a6027be 100644 > --- a/arch/arm64/kvm/hyp/include/hyp/switch.h > +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h > @@ -92,11 +92,15 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu) > write_sysreg(0, pmselr_el0); > write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0); > } > + > + vcpu->arch.mdcr_el2_host = read_sysreg(mdcr_el2); > write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); > } > > -static inline void __deactivate_traps_common(void) > +static inline void __deactivate_traps_common(struct kvm_vcpu *vcpu) > { > + write_sysreg(vcpu->arch.mdcr_el2_host, mdcr_el2); > + > write_sysreg(0, hstr_el2); > if (kvm_arm_support_pmu_v3()) > write_sysreg(0, pmuserenr_el0); > diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c > index f7af9688c1f7..2ea764a48958 100644 > --- a/arch/arm64/kvm/hyp/nvhe/switch.c > +++ b/arch/arm64/kvm/hyp/nvhe/switch.c > @@ -69,12 +69,10 @@ static void __activate_traps(struct kvm_vcpu *vcpu) > static void __deactivate_traps(struct kvm_vcpu *vcpu) > { > extern char __kvm_hyp_host_vector[]; > - u64 mdcr_el2, cptr; > + u64 cptr; > > ___deactivate_traps(vcpu); > > - mdcr_el2 = read_sysreg(mdcr_el2); > - > if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) { > u64 val; > > @@ -92,13 +90,12 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu) > isb(); > } > > - __deactivate_traps_common(); > + vcpu->arch.mdcr_el2_host &= MDCR_EL2_HPMN_MASK | > + MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT | > + MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT; > > - mdcr_el2 &= MDCR_EL2_HPMN_MASK; > - mdcr_el2 |= MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT; > - mdcr_el2 |= MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT; > + __deactivate_traps_common(vcpu); > > - write_sysreg(mdcr_el2, mdcr_el2); FWIW, I found this whole sequence massively confusing, and it is only when I came to patch #7 that the various pieces did come together. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BC84C4338F for ; Wed, 18 Aug 2021 14:44:14 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 07B2F6108D for ; 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SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210818_074226_608534_F033FE3B X-CRM114-Status: GOOD ( 28.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 17 Aug 2021 09:11:25 +0100, Fuad Tabba wrote: > > On deactivating traps, restore the value of mdcr_el2 from the > newly created and preserved host value vcpu context, rather than > directly reading the hardware register. > > Up until and including this patch the two values are the same, > i.e., the hardware register and the vcpu one. A future patch will > be changing the value of mdcr_el2 on activating traps, and this > ensures that its value will be restored. > > No functional change intended. > > Signed-off-by: Fuad Tabba > --- > arch/arm64/include/asm/kvm_host.h | 5 ++++- > arch/arm64/include/asm/kvm_hyp.h | 2 +- > arch/arm64/kvm/hyp/include/hyp/switch.h | 6 +++++- > arch/arm64/kvm/hyp/nvhe/switch.c | 13 +++++-------- > arch/arm64/kvm/hyp/vhe/switch.c | 14 +++++--------- > arch/arm64/kvm/hyp/vhe/sysreg-sr.c | 2 +- > 6 files changed, 21 insertions(+), 21 deletions(-) > > diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h > index 4d2d974c1522..76462c6a91ee 100644 > --- a/arch/arm64/include/asm/kvm_host.h > +++ b/arch/arm64/include/asm/kvm_host.h > @@ -287,10 +287,13 @@ struct kvm_vcpu_arch { > /* Stage 2 paging state used by the hardware on next switch */ > struct kvm_s2_mmu *hw_mmu; > > - /* HYP configuration */ > + /* Values of trap registers for the guest. */ > u64 hcr_el2; > u64 mdcr_el2; > > + /* Values of trap registers for the host before guest entry. */ > + u64 mdcr_el2_host; This probably should then eventually replace the per-CPU copy of mdcr_el2 that lives in debug.c, shouldn't it? > + > /* Exception Information */ > struct kvm_vcpu_fault_info fault; > > diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h > index 9d60b3006efc..657d0c94cf82 100644 > --- a/arch/arm64/include/asm/kvm_hyp.h > +++ b/arch/arm64/include/asm/kvm_hyp.h > @@ -95,7 +95,7 @@ void __sve_restore_state(void *sve_pffr, u32 *fpsr); > > #ifndef __KVM_NVHE_HYPERVISOR__ > void activate_traps_vhe_load(struct kvm_vcpu *vcpu); > -void deactivate_traps_vhe_put(void); > +void deactivate_traps_vhe_put(struct kvm_vcpu *vcpu); > #endif > > u64 __guest_enter(struct kvm_vcpu *vcpu); > diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h > index e4a2f295a394..a0e78a6027be 100644 > --- a/arch/arm64/kvm/hyp/include/hyp/switch.h > +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h > @@ -92,11 +92,15 @@ static inline void __activate_traps_common(struct kvm_vcpu *vcpu) > write_sysreg(0, pmselr_el0); > write_sysreg(ARMV8_PMU_USERENR_MASK, pmuserenr_el0); > } > + > + vcpu->arch.mdcr_el2_host = read_sysreg(mdcr_el2); > write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); > } > > -static inline void __deactivate_traps_common(void) > +static inline void __deactivate_traps_common(struct kvm_vcpu *vcpu) > { > + write_sysreg(vcpu->arch.mdcr_el2_host, mdcr_el2); > + > write_sysreg(0, hstr_el2); > if (kvm_arm_support_pmu_v3()) > write_sysreg(0, pmuserenr_el0); > diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c > index f7af9688c1f7..2ea764a48958 100644 > --- a/arch/arm64/kvm/hyp/nvhe/switch.c > +++ b/arch/arm64/kvm/hyp/nvhe/switch.c > @@ -69,12 +69,10 @@ static void __activate_traps(struct kvm_vcpu *vcpu) > static void __deactivate_traps(struct kvm_vcpu *vcpu) > { > extern char __kvm_hyp_host_vector[]; > - u64 mdcr_el2, cptr; > + u64 cptr; > > ___deactivate_traps(vcpu); > > - mdcr_el2 = read_sysreg(mdcr_el2); > - > if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) { > u64 val; > > @@ -92,13 +90,12 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu) > isb(); > } > > - __deactivate_traps_common(); > + vcpu->arch.mdcr_el2_host &= MDCR_EL2_HPMN_MASK | > + MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT | > + MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT; > > - mdcr_el2 &= MDCR_EL2_HPMN_MASK; > - mdcr_el2 |= MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT; > - mdcr_el2 |= MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT; > + __deactivate_traps_common(vcpu); > > - write_sysreg(mdcr_el2, mdcr_el2); FWIW, I found this whole sequence massively confusing, and it is only when I came to patch #7 that the various pieces did come together. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel