From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52589) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aaM0U-0002aX-21 for qemu-devel@nongnu.org; Mon, 29 Feb 2016 06:28:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aaM0Q-0006xa-Ox for qemu-devel@nongnu.org; Mon, 29 Feb 2016 06:28:53 -0500 Received: from mail-wm0-x22a.google.com ([2a00:1450:400c:c09::22a]:37009) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aaM0Q-0006x4-7l for qemu-devel@nongnu.org; Mon, 29 Feb 2016 06:28:50 -0500 Received: by mail-wm0-x22a.google.com with SMTP id p65so41017191wmp.0 for ; Mon, 29 Feb 2016 03:28:49 -0800 (PST) References: <32e6f2f10d2394ce59543e0fc5f5ef63203cfede.1455055858.git.alistair.francis@xilinx.com> From: Alex =?utf-8?Q?Benn=C3=A9e?= In-reply-to: <32e6f2f10d2394ce59543e0fc5f5ef63203cfede.1455055858.git.alistair.francis@xilinx.com> Date: Mon, 29 Feb 2016 11:28:44 +0000 Message-ID: <87io17kb6b.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH v4 07/16] register: Add block initialise helper List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, qemu-devel@nongnu.org, crosthwaitepeter@gmail.com, edgar.iglesias@gmail.com, afaerber@suse.de, fred.konrad@greensocs.com Alistair Francis writes: > From: Peter Crosthwaite > > Add a helper that will scan a static RegisterAccessInfo Array > and populate a container MemoryRegion with registers as defined. > > Signed-off-by: Peter Crosthwaite > Signed-off-by: Alistair Francis > --- > V3: > - Fix typo > V2: > - Use memory_region_add_subregion_no_print() > > hw/core/register.c | 29 +++++++++++++++++++++++++++++ > include/hw/register.h | 20 ++++++++++++++++++++ > 2 files changed, 49 insertions(+) > > diff --git a/hw/core/register.c b/hw/core/register.c > index d766517..ac866f6 100644 > --- a/hw/core/register.c > +++ b/hw/core/register.c > @@ -210,6 +210,35 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size) > return register_read_memory(opaque, addr, size, false); > } > > +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, > + int num, RegisterInfo *ri, uint32_t *data, > + MemoryRegion *container, const MemoryRegionOps *ops, > + bool debug_enabled) > +{ > + const char *debug_prefix = object_get_typename(OBJECT(owner)); > + int i; > + > + for (i = 0; i < num; i++) { > + int index = rae[i].decode.addr / 4; > + RegisterInfo *r = &ri[index]; > + > + *r = (RegisterInfo) { > + .data = &data[index], > + .data_size = sizeof(uint32_t), > + .access = &rae[i], > + .debug = debug_enabled, > + .prefix = debug_prefix, > + .opaque = owner, > + }; > + register_init(r); > + > + memory_region_init_io(&r->mem, OBJECT(owner), ops, r, r->access->name, > + sizeof(uint32_t)); > + memory_region_add_subregion_no_print(container, > + r->access->decode.addr, > &r->mem); As I mentioned in the previous patch I think having a subregion per-register is excessive. I think you need single io region with the private data giving a structure with the list of registers in the block. You can then have a general purpose set of register ops to lookup the eventual register and dispatch to the handler. > + } > +} > + > static const TypeInfo register_info = { > .name = TYPE_REGISTER, > .parent = TYPE_DEVICE, > diff --git a/include/hw/register.h b/include/hw/register.h > index d3469c6..6ac005c 100644 > --- a/include/hw/register.h > +++ b/include/hw/register.h > @@ -162,6 +162,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value, > uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size); > uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size); > > +/** > + * Init a block of consecutive registers into a container MemoryRegion. A > + * number of constant register definitions are parsed to create a corresponding > + * array of RegisterInfo's. > + * > + * @owner: device owning the registers > + * @rae: Register definitions to init > + * @num: number of registers to init (length of @rae) > + * @ri: Register array to init > + * @data: Array to use for register data > + * @container: Memory region to contain new registers > + * @ops: Memory region ops to access registers. > + * @debug enabled: turn on/off verbose debug information > + */ > + > +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, > + int num, RegisterInfo *ri, uint32_t *data, > + MemoryRegion *container, const MemoryRegionOps *ops, > + bool debug_enabled); > + > /* Define constants for a 32 bit register */ > #define REG32(reg, addr) \ > enum { A_ ## reg = (addr) }; \ -- Alex Bennée