From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EBCCC433EF for ; Wed, 15 Jun 2022 07:15:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243337AbiFOHPR (ORCPT ); Wed, 15 Jun 2022 03:15:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230111AbiFOHPO (ORCPT ); Wed, 15 Jun 2022 03:15:14 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1E1F54475A for ; Wed, 15 Jun 2022 00:15:13 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id BE864B815A3 for ; Wed, 15 Jun 2022 07:15:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6573AC34115; Wed, 15 Jun 2022 07:15:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1655277310; bh=VNGpGMUV+E1/iKCKkMw/shk2CbLzXwPkXPi7AseWGiY=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=RFTSYcbkO/ftK6PDtnfErUjaYjN2pKz9L9mzUfrcCc60DtevmpZQPPG7ilhO274dD /ZqZcrlJeDaXjKbbwezyvgnIIU00QDEpG5yMqOEaFvwFJWGtOYLcKbS084L2Ri+rOX 7u7DKkTDphJI7S6p3p10348D1X4tA0ZlDAT6cWExsauqs3ogWYQctUdKeme12rLOZv YgVtc+PAVAl8eLh3cnpsFYgsMkeRiGYITc3BWuX2pZzj1v4H/jUlkVZ+kXU1poO4lU w+Wcv2rcx4GM3e0aO1nFPhLb3YdaqzjsA35axB0MU4VSvfE9uWq3PrClfL5tDSFxmP WsZIlaDpApsLQ== Received: from ip-185-104-136-29.ptr.icomera.net ([185.104.136.29] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1o1NF5-000iYB-4p; Wed, 15 Jun 2022 08:15:08 +0100 Date: Wed, 15 Jun 2022 08:14:29 +0100 Message-ID: <87k09ipfe2.wl-maz@kernel.org> From: Marc Zyngier To: Jianmin Lv Cc: Thomas Gleixner , linux-kernel@vger.kernel.org, Hanjun Guo , Lorenzo Pieralisi , Jiaxun Yang , Huacai Chen Subject: Re: [PATCH V12 01/10] APCI: irq: Add support for multiple GSI domains In-Reply-To: <1655273250-23495-2-git-send-email-lvjianmin@loongson.cn> References: <1655273250-23495-1-git-send-email-lvjianmin@loongson.cn> <1655273250-23495-2-git-send-email-lvjianmin@loongson.cn> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.104.136.29 X-SA-Exim-Rcpt-To: lvjianmin@loongson.cn, tglx@linutronix.de, linux-kernel@vger.kernel.org, guohanjun@huawei.com, lorenzo.pieralisi@arm.com, jiaxun.yang@flygoat.com, chenhuacai@loongson.cn X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 15 Jun 2022 07:07:21 +0100, Jianmin Lv wrote: > > From: Marc Zyngier > > In an unfortunate departure from the ACPI spec, the LoongArch > architecture split its GSI space across multiple interrupt > controllers. > > In order to be able to reuse sthe core code and prevent > architectures from reinventing an already square wheel, offer > the arch code the ability to register a dispatcher function > that will return the domain fwnode for a given GSI. > > The ARM GIC drivers are updated to support this (with a single > domain, as intended). > > Co-developed-by: Jianmin Lv I don't think this tag is appropriate here. > Signed-off-by: Marc Zyngier > Cc: Hanjun Guo > Cc: Lorenzo Pieralisi > Signed-off-by: Jianmin Lv > --- > drivers/acpi/irq.c | 40 +++++++++++++++++++++++----------------- > drivers/irqchip/irq-gic-v3.c | 18 ++++++++++++------ > drivers/irqchip/irq-gic.c | 18 ++++++++++++------ > include/linux/acpi.h | 2 +- > 4 files changed, 48 insertions(+), 30 deletions(-) > > diff --git a/drivers/acpi/irq.c b/drivers/acpi/irq.c > index c68e694..b7460ab 100644 > --- a/drivers/acpi/irq.c > +++ b/drivers/acpi/irq.c > @@ -12,7 +12,7 @@ > > enum acpi_irq_model_id acpi_irq_model; > > -static struct fwnode_handle *acpi_gsi_domain_id; > +static struct fwnode_handle *(*acpi_get_gsi_domain_id)(u32 gsi); > > /** > * acpi_gsi_to_irq() - Retrieve the linux irq number for a given GSI > @@ -26,10 +26,7 @@ > */ > int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) > { > - struct irq_domain *d = irq_find_matching_fwnode(acpi_gsi_domain_id, > - DOMAIN_BUS_ANY); > - > - *irq = irq_find_mapping(d, gsi); > + *irq = acpi_register_gsi(NULL, gsi, -1, -1); What is this? - This wasn't part of my initial patch, and randomly changing patches without mentioning it isn't acceptable - you *cannot* trigger a registration here, as this isn't what the API advertises - what makes you think that passing random values (NULL, -1... )to acpi_register_gsi() is an acceptable thing to do? The original patch had: @@ -26,8 +26,10 @@ static struct fwnode_handle *acpi_gsi_domain_id; */ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) { - struct irq_domain *d = irq_find_matching_fwnode(acpi_gsi_domain_id, - DOMAIN_BUS_ANY); + struct irq_domain *d; + + d = irq_find_matching_fwnode(acpi_get_gsi_domain_id(gsi), + DOMAIN_BUS_ANY); *irq = irq_find_mapping(d, gsi); /* and I don't think it needs anything else. If something breaks, let's discuss it, but don't abuse the API nor the fact that I usually don't review my own patches to sneak things in... M. -- Without deviation from the norm, progress is not possible.