From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A00DCC49361 for ; Thu, 17 Jun 2021 12:59:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 793FC61369 for ; Thu, 17 Jun 2021 12:59:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232129AbhFQNBt (ORCPT ); Thu, 17 Jun 2021 09:01:49 -0400 Received: from mail.kernel.org ([198.145.29.99]:50366 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230137AbhFQNBs (ORCPT ); Thu, 17 Jun 2021 09:01:48 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DCBA461351; Thu, 17 Jun 2021 12:59:40 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ltrcP-008BDe-Ug; Thu, 17 Jun 2021 13:59:38 +0100 Date: Thu, 17 Jun 2021 13:59:37 +0100 Message-ID: <87k0msd4ue.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: Yanan Wang , Quentin Perret , Alexandru Elisei , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Catalin Marinas , James Morse , Julien Thierry , Suzuki K Poulose , Gavin Shan , wanghaibin.wang@huawei.com, zhukeqian1@huawei.com, yuzenghui@huawei.com Subject: Re: [PATCH v7 4/4] KVM: arm64: Move guest CMOs to the fault handlers In-Reply-To: <20210617124557.GB24457@willie-the-truck> References: <20210617105824.31752-1-wangyanan55@huawei.com> <20210617105824.31752-5-wangyanan55@huawei.com> <20210617124557.GB24457@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, wangyanan55@huawei.com, qperret@google.com, alexandru.elisei@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, gshan@redhat.com, wanghaibin.wang@huawei.com, zhukeqian1@huawei.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 17 Jun 2021 13:45:57 +0100, Will Deacon wrote: > > On Thu, Jun 17, 2021 at 06:58:24PM +0800, Yanan Wang wrote: > > We currently uniformly permorm CMOs of D-cache and I-cache in function > > user_mem_abort before calling the fault handlers. If we get concurrent > > guest faults(e.g. translation faults, permission faults) or some really > > unnecessary guest faults caused by BBM, CMOs for the first vcpu are > > necessary while the others later are not. > > > > By moving CMOs to the fault handlers, we can easily identify conditions > > where they are really needed and avoid the unnecessary ones. As it's a > > time consuming process to perform CMOs especially when flushing a block > > range, so this solution reduces much load of kvm and improve efficiency > > of the stage-2 page table code. > > > > We can imagine two specific scenarios which will gain much benefit: > > 1) In a normal VM startup, this solution will improve the efficiency of > > handling guest page faults incurred by vCPUs, when initially populating > > stage-2 page tables. > > 2) After live migration, the heavy workload will be resumed on the > > destination VM, however all the stage-2 page tables need to be rebuilt > > at the moment. So this solution will ease the performance drop during > > resuming stage. > > > > Signed-off-by: Yanan Wang > > --- > > arch/arm64/kvm/hyp/pgtable.c | 38 +++++++++++++++++++++++++++++------- > > arch/arm64/kvm/mmu.c | 37 ++++++++++++++--------------------- > > 2 files changed, 46 insertions(+), 29 deletions(-) > > > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > > index d99789432b05..760c551f61da 100644 > > --- a/arch/arm64/kvm/hyp/pgtable.c > > +++ b/arch/arm64/kvm/hyp/pgtable.c > > @@ -577,12 +577,24 @@ static void stage2_put_pte(kvm_pte_t *ptep, struct kvm_s2_mmu *mmu, u64 addr, > > mm_ops->put_page(ptep); > > } > > > > +static bool stage2_pte_cacheable(struct kvm_pgtable *pgt, kvm_pte_t pte) > > +{ > > + u64 memattr = pte & KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR; > > + return memattr == KVM_S2_MEMATTR(pgt, NORMAL); > > +} > > + > > +static bool stage2_pte_executable(kvm_pte_t pte) > > +{ > > + return !(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN); > > +} > > + > > static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, > > kvm_pte_t *ptep, > > struct stage2_map_data *data) > > { > > kvm_pte_t new, old = *ptep; > > u64 granule = kvm_granule_size(level), phys = data->phys; > > + struct kvm_pgtable *pgt = data->mmu->pgt; > > struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; > > > > if (!kvm_block_mapping_supported(addr, end, phys, level)) > > @@ -606,6 +618,14 @@ static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, > > stage2_put_pte(ptep, data->mmu, addr, level, mm_ops); > > } > > > > + /* Perform CMOs before installation of the guest stage-2 PTE */ > > + if (mm_ops->clean_invalidate_dcache && stage2_pte_cacheable(pgt, new)) > > + mm_ops->clean_invalidate_dcache(kvm_pte_follow(new, mm_ops), > > + granule); > > + > > + if (mm_ops->invalidate_icache && stage2_pte_executable(new)) > > + mm_ops->invalidate_icache(kvm_pte_follow(new, mm_ops), granule); > > One thing I'm missing here is why we need the indirection via mm_ops. Are > there cases where we would want to pass a different function pointer for > invalidating the icache? If not, why not just call the function directly? > > Same for the D side. If we didn't do that, we'd end-up having to track whether the guest context requires CMOs with additional flags, which is pretty ugly (see v5 of this series for reference [1]). It also means that we would have to drag the CM functions into the EL2 object, something that we don't need with this approach. M. [1] https://lore.kernel.org/r/20210415115032.35760-1-wangyanan55@huawei.com -- Without deviation from the norm, progress is not possible. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B28C2C2B9F4 for ; Thu, 17 Jun 2021 13:00:16 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id 36E8261369 for ; Thu, 17 Jun 2021 13:00:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 36E8261369 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvmarm-bounces@lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id A60504B090; Thu, 17 Jun 2021 09:00:15 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xROvFUUv2xsN; Thu, 17 Jun 2021 09:00:13 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 476504B0B8; Thu, 17 Jun 2021 09:00:07 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 1383B4B0AD for ; Thu, 17 Jun 2021 09:00:06 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id q9rAhSvKAdnk for ; Thu, 17 Jun 2021 08:59:42 -0400 (EDT) Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id DE12749F92 for ; Thu, 17 Jun 2021 08:59:41 -0400 (EDT) Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DCBA461351; Thu, 17 Jun 2021 12:59:40 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ltrcP-008BDe-Ug; Thu, 17 Jun 2021 13:59:38 +0100 Date: Thu, 17 Jun 2021 13:59:37 +0100 Message-ID: <87k0msd4ue.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Subject: Re: [PATCH v7 4/4] KVM: arm64: Move guest CMOs to the fault handlers In-Reply-To: <20210617124557.GB24457@willie-the-truck> References: <20210617105824.31752-1-wangyanan55@huawei.com> <20210617105824.31752-5-wangyanan55@huawei.com> <20210617124557.GB24457@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, wangyanan55@huawei.com, qperret@google.com, alexandru.elisei@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, gshan@redhat.com, wanghaibin.wang@huawei.com, zhukeqian1@huawei.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: kvm@vger.kernel.org, Catalin Marinas , linux-kernel@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Thu, 17 Jun 2021 13:45:57 +0100, Will Deacon wrote: > > On Thu, Jun 17, 2021 at 06:58:24PM +0800, Yanan Wang wrote: > > We currently uniformly permorm CMOs of D-cache and I-cache in function > > user_mem_abort before calling the fault handlers. If we get concurrent > > guest faults(e.g. translation faults, permission faults) or some really > > unnecessary guest faults caused by BBM, CMOs for the first vcpu are > > necessary while the others later are not. > > > > By moving CMOs to the fault handlers, we can easily identify conditions > > where they are really needed and avoid the unnecessary ones. As it's a > > time consuming process to perform CMOs especially when flushing a block > > range, so this solution reduces much load of kvm and improve efficiency > > of the stage-2 page table code. > > > > We can imagine two specific scenarios which will gain much benefit: > > 1) In a normal VM startup, this solution will improve the efficiency of > > handling guest page faults incurred by vCPUs, when initially populating > > stage-2 page tables. > > 2) After live migration, the heavy workload will be resumed on the > > destination VM, however all the stage-2 page tables need to be rebuilt > > at the moment. So this solution will ease the performance drop during > > resuming stage. > > > > Signed-off-by: Yanan Wang > > --- > > arch/arm64/kvm/hyp/pgtable.c | 38 +++++++++++++++++++++++++++++------- > > arch/arm64/kvm/mmu.c | 37 ++++++++++++++--------------------- > > 2 files changed, 46 insertions(+), 29 deletions(-) > > > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > > index d99789432b05..760c551f61da 100644 > > --- a/arch/arm64/kvm/hyp/pgtable.c > > +++ b/arch/arm64/kvm/hyp/pgtable.c > > @@ -577,12 +577,24 @@ static void stage2_put_pte(kvm_pte_t *ptep, struct kvm_s2_mmu *mmu, u64 addr, > > mm_ops->put_page(ptep); > > } > > > > +static bool stage2_pte_cacheable(struct kvm_pgtable *pgt, kvm_pte_t pte) > > +{ > > + u64 memattr = pte & KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR; > > + return memattr == KVM_S2_MEMATTR(pgt, NORMAL); > > +} > > + > > +static bool stage2_pte_executable(kvm_pte_t pte) > > +{ > > + return !(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN); > > +} > > + > > static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, > > kvm_pte_t *ptep, > > struct stage2_map_data *data) > > { > > kvm_pte_t new, old = *ptep; > > u64 granule = kvm_granule_size(level), phys = data->phys; > > + struct kvm_pgtable *pgt = data->mmu->pgt; > > struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; > > > > if (!kvm_block_mapping_supported(addr, end, phys, level)) > > @@ -606,6 +618,14 @@ static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, > > stage2_put_pte(ptep, data->mmu, addr, level, mm_ops); > > } > > > > + /* Perform CMOs before installation of the guest stage-2 PTE */ > > + if (mm_ops->clean_invalidate_dcache && stage2_pte_cacheable(pgt, new)) > > + mm_ops->clean_invalidate_dcache(kvm_pte_follow(new, mm_ops), > > + granule); > > + > > + if (mm_ops->invalidate_icache && stage2_pte_executable(new)) > > + mm_ops->invalidate_icache(kvm_pte_follow(new, mm_ops), granule); > > One thing I'm missing here is why we need the indirection via mm_ops. Are > there cases where we would want to pass a different function pointer for > invalidating the icache? If not, why not just call the function directly? > > Same for the D side. If we didn't do that, we'd end-up having to track whether the guest context requires CMOs with additional flags, which is pretty ugly (see v5 of this series for reference [1]). It also means that we would have to drag the CM functions into the EL2 object, something that we don't need with this approach. M. [1] https://lore.kernel.org/r/20210415115032.35760-1-wangyanan55@huawei.com -- Without deviation from the norm, progress is not possible. _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4313CC2B9F4 for ; Thu, 17 Jun 2021 13:01:58 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0991C61075 for ; Thu, 17 Jun 2021 13:01:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0991C61075 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=AQVlMvcTl/7jdYCLk9Wlh/WhG9KJo2HViPuw7KlcfWw=; b=Qj7yXoXI5Qu8h+ Z28L6T3ZRQn1iCi5OzOfGWolUBDeAnIThydA/IQw4iEoSCq++8JrqAiSZ34NpTgeQiFWmxzWLXxUI 2D9cuDooFTEaUazzardKDPGHM9z8nNw2GCm7EtaJsYFsphfjby/QT7IZ7TupQN4oSbIcAmxIqVRFd 3hcrUd59hUZkJiCTc5RpK/8iZN20etFnbnhHoMwUUVSgtzLI5J3IrjiTSHm9cIRnvuVz+AUJFODwI p7R/EGMjcvXbKFjmxqneUZcaYSQQoBV770UaGtBj8A2zMdnzTImKNKLtr3Ei7v2pniG/wZfph6Rgb sSQUR1PYOY4k8O03AQlA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ltrcW-00AMp5-IK; Thu, 17 Jun 2021 12:59:44 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ltrcT-00AMoS-5j for linux-arm-kernel@lists.infradead.org; Thu, 17 Jun 2021 12:59:42 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id DCBA461351; Thu, 17 Jun 2021 12:59:40 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ltrcP-008BDe-Ug; Thu, 17 Jun 2021 13:59:38 +0100 Date: Thu, 17 Jun 2021 13:59:37 +0100 Message-ID: <87k0msd4ue.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: Yanan Wang , Quentin Perret , Alexandru Elisei , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Catalin Marinas , James Morse , Julien Thierry , Suzuki K Poulose , Gavin Shan , wanghaibin.wang@huawei.com, zhukeqian1@huawei.com, yuzenghui@huawei.com Subject: Re: [PATCH v7 4/4] KVM: arm64: Move guest CMOs to the fault handlers In-Reply-To: <20210617124557.GB24457@willie-the-truck> References: <20210617105824.31752-1-wangyanan55@huawei.com> <20210617105824.31752-5-wangyanan55@huawei.com> <20210617124557.GB24457@willie-the-truck> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, wangyanan55@huawei.com, qperret@google.com, alexandru.elisei@arm.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, gshan@redhat.com, wanghaibin.wang@huawei.com, zhukeqian1@huawei.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210617_055941_291031_4870BDBF X-CRM114-Status: GOOD ( 33.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 17 Jun 2021 13:45:57 +0100, Will Deacon wrote: > > On Thu, Jun 17, 2021 at 06:58:24PM +0800, Yanan Wang wrote: > > We currently uniformly permorm CMOs of D-cache and I-cache in function > > user_mem_abort before calling the fault handlers. If we get concurrent > > guest faults(e.g. translation faults, permission faults) or some really > > unnecessary guest faults caused by BBM, CMOs for the first vcpu are > > necessary while the others later are not. > > > > By moving CMOs to the fault handlers, we can easily identify conditions > > where they are really needed and avoid the unnecessary ones. As it's a > > time consuming process to perform CMOs especially when flushing a block > > range, so this solution reduces much load of kvm and improve efficiency > > of the stage-2 page table code. > > > > We can imagine two specific scenarios which will gain much benefit: > > 1) In a normal VM startup, this solution will improve the efficiency of > > handling guest page faults incurred by vCPUs, when initially populating > > stage-2 page tables. > > 2) After live migration, the heavy workload will be resumed on the > > destination VM, however all the stage-2 page tables need to be rebuilt > > at the moment. So this solution will ease the performance drop during > > resuming stage. > > > > Signed-off-by: Yanan Wang > > --- > > arch/arm64/kvm/hyp/pgtable.c | 38 +++++++++++++++++++++++++++++------- > > arch/arm64/kvm/mmu.c | 37 ++++++++++++++--------------------- > > 2 files changed, 46 insertions(+), 29 deletions(-) > > > > diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c > > index d99789432b05..760c551f61da 100644 > > --- a/arch/arm64/kvm/hyp/pgtable.c > > +++ b/arch/arm64/kvm/hyp/pgtable.c > > @@ -577,12 +577,24 @@ static void stage2_put_pte(kvm_pte_t *ptep, struct kvm_s2_mmu *mmu, u64 addr, > > mm_ops->put_page(ptep); > > } > > > > +static bool stage2_pte_cacheable(struct kvm_pgtable *pgt, kvm_pte_t pte) > > +{ > > + u64 memattr = pte & KVM_PTE_LEAF_ATTR_LO_S2_MEMATTR; > > + return memattr == KVM_S2_MEMATTR(pgt, NORMAL); > > +} > > + > > +static bool stage2_pte_executable(kvm_pte_t pte) > > +{ > > + return !(pte & KVM_PTE_LEAF_ATTR_HI_S2_XN); > > +} > > + > > static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, > > kvm_pte_t *ptep, > > struct stage2_map_data *data) > > { > > kvm_pte_t new, old = *ptep; > > u64 granule = kvm_granule_size(level), phys = data->phys; > > + struct kvm_pgtable *pgt = data->mmu->pgt; > > struct kvm_pgtable_mm_ops *mm_ops = data->mm_ops; > > > > if (!kvm_block_mapping_supported(addr, end, phys, level)) > > @@ -606,6 +618,14 @@ static int stage2_map_walker_try_leaf(u64 addr, u64 end, u32 level, > > stage2_put_pte(ptep, data->mmu, addr, level, mm_ops); > > } > > > > + /* Perform CMOs before installation of the guest stage-2 PTE */ > > + if (mm_ops->clean_invalidate_dcache && stage2_pte_cacheable(pgt, new)) > > + mm_ops->clean_invalidate_dcache(kvm_pte_follow(new, mm_ops), > > + granule); > > + > > + if (mm_ops->invalidate_icache && stage2_pte_executable(new)) > > + mm_ops->invalidate_icache(kvm_pte_follow(new, mm_ops), granule); > > One thing I'm missing here is why we need the indirection via mm_ops. Are > there cases where we would want to pass a different function pointer for > invalidating the icache? If not, why not just call the function directly? > > Same for the D side. If we didn't do that, we'd end-up having to track whether the guest context requires CMOs with additional flags, which is pretty ugly (see v5 of this series for reference [1]). It also means that we would have to drag the CM functions into the EL2 object, something that we don't need with this approach. M. [1] https://lore.kernel.org/r/20210415115032.35760-1-wangyanan55@huawei.com -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel