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Thu, 15 Apr 2021 12:12:24 +0000 (GMT) From: Fabiano Rosas To: Nicholas Piggin , qemu-ppc@nongnu.org Subject: Re: [PATCH v2 1/4] target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour In-Reply-To: <20210415054227.1793812-2-npiggin@gmail.com> References: <20210415054227.1793812-1-npiggin@gmail.com> <20210415054227.1793812-2-npiggin@gmail.com> Date: Thu, 15 Apr 2021 09:12:21 -0300 Message-ID: <87k0p3zqze.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-GCONF: 00 X-Proofpoint-GUID: _akNgD1JhD0o9MaFklrPMtV5QzSXKHMo X-Proofpoint-ORIG-GUID: 08VmclVAkZ_422Z6xoPYyq7Kqr2sYNql X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-15_04:2021-04-15, 2021-04-15 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 priorityscore=1501 adultscore=0 suspectscore=0 mlxlogscore=999 impostorscore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 clxscore=1015 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104060000 definitions=main-2104150081 Received-SPF: pass client-ip=148.163.156.1; envelope-from=farosas@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?Q?C=C3=A9dric?= Le Goater , qemu-devel@nongnu.org, Nicholas Piggin , David Gibson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Nicholas Piggin writes: > ISA v3.0 radix guest execution has a quirk in AIL behaviour such that > the LPCR[AIL] value can apply to hypervisor interrupts. > > This affects machines that emulate HV=1 mode (i.e., powernv9). > > Signed-off-by: Nicholas Piggin Reviewed-by: Fabiano Rosas > --- > target/ppc/excp_helper.c | 17 +++++++++++++---- > 1 file changed, 13 insertions(+), 4 deletions(-) > > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c > index 85de7e6c90..b8881c0f85 100644 > --- a/target/ppc/excp_helper.c > +++ b/target/ppc/excp_helper.c > @@ -791,14 +791,23 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) > #endif > > /* > - * AIL only works if there is no HV transition and we are running > - * with translations enabled > + * AIL only works if MSR[IR] and MSR[DR] are both enabled. > */ > - if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1) || > - ((new_msr & MSR_HVB) && !(msr & MSR_HVB))) { > + if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1)) { > ail = 0; > } > > + /* > + * AIL does not work if there is a MSR[HV] 0->1 transition and the > + * partition is in HPT mode. For radix guests, such interrupts are > + * allowed to be delivered to the hypervisor in ail mode. > + */ > + if ((new_msr & MSR_HVB) && !(msr & MSR_HVB)) { > + if (!(env->spr[SPR_LPCR] & LPCR_HR)) { > + ail = 0; > + } > + } > + > vector = env->excp_vectors[excp]; > if (vector == (target_ulong)-1ULL) { > cpu_abort(cs, "Raised an exception without defined vector %d\n",