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References: <20180809034033.10579-1-richard.henderson@linaro.org>
	<20180809034033.10579-10-richard.henderson@linaro.org>
From: Alex =?utf-8?Q?Benn=C3=A9e?= <alex.bennee@linaro.org>
In-reply-to: <20180809034033.10579-10-richard.henderson@linaro.org>
Date: Thu, 09 Aug 2018 11:12:45 +0100
Message-ID: <87k1ozq25e.fsf@linaro.org>
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Subject: Re: [Qemu-devel] [PATCH 09/11] target/arm: Reformat integer
 register dump
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To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org, laurent.desnogues@gmail.com, peter.maydell@linaro.org, qemu-stable@nongnu.org


Richard Henderson <richard.henderson@linaro.org> writes:

> With PC, there are 33 registers.  Three per line lines up nicely
> without overflowing 80 columns.
>
> Cc: qemu-stable@nongnu.org (3.0.1)
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alex Benn=C3=A9e <alex.bennee@linaro.org>

> ---
>  target/arm/translate-a64.c | 13 ++++++-------
>  1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index 45a6c2a3aa..358f169c75 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -137,14 +137,13 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
>      int el =3D arm_current_el(env);
>      const char *ns_status;
>
> -    cpu_fprintf(f, "PC=3D%016"PRIx64"  SP=3D%016"PRIx64"\n",
> -            env->pc, env->xregs[31]);
> -    for (i =3D 0; i < 31; i++) {
> -        cpu_fprintf(f, "X%02d=3D%016"PRIx64, i, env->xregs[i]);
> -        if ((i % 4) =3D=3D 3) {
> -            cpu_fprintf(f, "\n");
> +    cpu_fprintf(f, " PC=3D%016" PRIx64 " ", env->pc);
> +    for (i =3D 0; i < 32; i++) {
> +        if (i =3D=3D 31) {
> +            cpu_fprintf(f, " SP=3D%016" PRIx64 "\n", env->xregs[i]);
>          } else {
> -            cpu_fprintf(f, " ");
> +            cpu_fprintf(f, "X%02d=3D%016" PRIx64 "%s", i, env->xregs[i],
> +                        (i + 2) % 3 ? " " : "\n");
>          }
>      }


--
Alex Benn=C3=A9e