From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FAE3C43214 for ; Wed, 4 Aug 2021 14:39:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E508C60F01 for ; Wed, 4 Aug 2021 14:39:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237908AbhHDOjh (ORCPT ); Wed, 4 Aug 2021 10:39:37 -0400 Received: from mail.kernel.org ([198.145.29.99]:45748 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235304AbhHDOjd (ORCPT ); Wed, 4 Aug 2021 10:39:33 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 75DE360F01; Wed, 4 Aug 2021 14:39:20 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mBI3C-002wKH-E9; Wed, 04 Aug 2021 15:39:18 +0100 Date: Wed, 04 Aug 2021 15:39:17 +0100 Message-ID: <87lf5hw9yi.wl-maz@kernel.org> From: Marc Zyngier To: Jens Wiklander Cc: Linux Kernel Mailing List , Linux ARM , OP-TEE TrustedFirmware , Devicetree List , Linux Doc Mailing List , Jerome Forissier , Etienne Carriere , Sumit Garg , Vincent Guittot , Rob Herring , Jonathan Corbet , Ard Biesheuvel Subject: Re: [PATCH v3 1/6] docs: staging/tee.rst: add a section on OP-TEE notifications In-Reply-To: References: <20210723094422.2150313-1-jens.wiklander@linaro.org> <20210723094422.2150313-2-jens.wiklander@linaro.org> <87zgud1giz.wl-maz@kernel.org> <87eebkdumr.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: jens.wiklander@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, op-tee@lists.trustedfirmware.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, jerome@forissier.org, etienne.carriere@linaro.org, sumit.garg@linaro.org, vincent.guittot@linaro.org, robh+dt@kernel.org, corbet@lwn.net, ardb@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 27 Jul 2021 15:57:07 +0100, Jens Wiklander wrote: > > On Tue, Jul 27, 2021 at 10:32 AM Marc Zyngier wrote: > > > > On Tue, 27 Jul 2021 08:46:39 +0100, > > Jens Wiklander wrote: > > > > > > On Fri, Jul 23, 2021 at 12:16 PM Marc Zyngier wrote: > > > > > > > > On Fri, 23 Jul 2021 10:44:17 +0100, > > > > Jens Wiklander wrote: > > > > > > > > > > Adds a section on notifications used by OP-TEE, synchronous and > > > > > asynchronous. > > > > > > > > > > Signed-off-by: Jens Wiklander > > > > > --- > > > > > Documentation/staging/tee.rst | 27 +++++++++++++++++++++++++++ > > > > > 1 file changed, 27 insertions(+) > > > > > > > > > > diff --git a/Documentation/staging/tee.rst b/Documentation/staging/tee.rst > > > > > index 4d4b5f889603..37bdd097336f 100644 > > > > > --- a/Documentation/staging/tee.rst > > > > > +++ b/Documentation/staging/tee.rst > > > > > @@ -184,6 +184,33 @@ order to support device enumeration. In other words, OP-TEE driver invokes this > > > > > application to retrieve a list of Trusted Applications which can be registered > > > > > as devices on the TEE bus. > > > > > > > > > > +OP-TEE notifications > > > > > +-------------------- > > > > > + > > > > > +There are two kinds of notifications that secure world can use to make > > > > > +normal world aware of some event. > > > > > + > > > > > +1. Synchronous notifications delivered with ``OPTEE_RPC_CMD_NOTIFICATION`` > > > > > + using the ``OPTEE_RPC_NOTIFICATION_SEND`` parameter. > > > > > +2. Asynchronous notifications delivered with a combination of a non-secure > > > > > + interrupt and a fast call from the non-secure interrupt handler. > > > > > + > > > > > +Synchronous notifications are limited by depending on RPC for delivery, > > > > > +this is only usable when secure world is entered with a yielding call via > > > > > +``OPTEE_SMC_CALL_WITH_ARG``. This excludes such notifications from secure > > > > > +world interrupt handlers. > > > > > + > > > > > +An asynchronous notification is delivered via a non-secure interrupt to an > > > > > +interrupt handler registered in the OP-TEE driver. The actual notification > > > > > +value are retrieved with the fast call ``OPTEE_SMC_GET_ASYNC_NOTIF_VALUE``. > > > > > + > > > > > +One notification value ``OPTEE_SMC_ASYNC_NOTIF_VALUE_DO_BOTTOM_HALF`` has a > > > > > +special meaning. When this value is received it means that normal world is > > > > > +supposed to make a yielding call ``OPTEE_MSG_CMD_DO_BOTTOM_HALF``. This > > > > > +call is done from the thread assisting the interrupt handler. This is a > > > > > +building block for OP-TEE OS in secure world to implement the top half and > > > > > +bottom half style of device drivers. > > > > > + > > > > > > > > What I find missing here is a description of the trigger for this > > > > interrupt, and how it influences the way the kernel drivers interacts > > > > with the secure side: > > > > > > > > - if it is edge triggered, this is 'fire and forget'. The interrupt > > > > will be consumed by the kernel handler, and whether it eventually > > > > calls into the secure side has no impact on the interrupt flow. > > > > > > > > - if it is level triggered, then the interrupt may be asserted until > > > > the kernel calls into the secure side, which may then drop the line > > > > level if no other requests are pending. > > > > > > > > These are evidently two very different flows, and you need to pick a > > > > side. Note that not all interrupt controllers support both signalling > > > > modes, so you are likely to leave something behind. Or you can try and > > > > support both flows, but that may make the driver slightly more > > > > complex. > > > > > > > > Either way, this needs specifying, here and in the DT binding. > > > > > > In the example I'm using a level triggered interrupt which is > > > triggered by writing to GICD_ISPENDR by secure world. Reading of > > > GICC_IAR should clear the interrupt,the GICv2 reference manual is > > > quite clear on that. > > > > No, it merely activates it. You can't transition an interrupt from > > pending to inactive (unless you clear it using GICD_ICPENDR). If you > > have spotted something else in the GICv2 architecture manual, please > > say so and I'll get it fixed 15 years after the facts. The fact that > > GICC_IAR consumes a pending bit introduced by a write to ISPENDR is an > > implementation detail, see below. > > I was looking at figure 4-10 "Logic of the pending status of a > level-sensitive interrupt". > > > > > It is also a flawed approach, as this behaviour is IMPDEF on GICv3 > > (see 4.5 "Shared Peripheral Interrupts" in the GICv3 arch spec). Given > > that GICv2 is pretty much a dead horse (TFFT!), I can't see this approach > > being successful in the long run. > > OK, thanks. > > > > > > So, if I understand it correctly, it will for > > > this purpose work in the same way as an edge triggered interrupt. If > > > this wouldn't be the case in some configuration and the interrupt must > > > be cleared by some other action that would be a job for the receiver > > > of OPTEE_SMC_GET_ASYNC_NOTIF_VALUE, that is, a secure world problem. > > > The normal world flow should be the same. > > > > You are assuming that the secure side will use GICD_ISPENDR, and > > that's a leap of faith. > > Not in this case with upstream OP-TEE. If we need to signal in a > different way we can do that instead. > What happens downstream we have no control over, but that's perhaps > not so different from the kernel. > > > An implementation should use, say, a GPIO to > > drive the interrupt line and give it proper level semantics. > > I'm not so keen on that since we often don't touch GPIO at all in > OP-TEE and this would then mean more platform specific code. We may > even need to synchronize some hardware access with the normal world > and then we'd be back at square one again. I'm trying to make a general statement here. OP-TEE may not do any of this. Yet. Other TEE implementations may do it because there is no free SPI in the system, for example. The problem is that interrupt signalling is a *device* thing, even if the device is actually some SW running on the secure side, and I would like the TEE to behave as such. > > > Now that we describe the interrupt configuration in device tree it > > > must use something that mirrors the secure world expectations. I don't > > > see a point in restricting what's allowed as long it doesn't need code > > > changes in the kernel too. Does this make any sense? > > > > And that's the crucial point: what *are* the expectations of the > > secure side? > > That should be up to the OP-TEE port of that particular platform to > decide and advise which device tree configuration to use. > > > You seem to assume edge semantics, but that's unclear at > > best. > > Fair enough, edge semantics solves the problem here. > > > > > > If I just expand a bit above explaining that the interrupt handler > > > must call OPTEE_SMC_GET_ASYNC_NOTIF_VALUE as part of clearing the > > > interrupt even if it might be cleared anyway in some configurations. > > > Would that make it more clear, good enough even :-) ? > > > > This is an interrupt, please document it in terms of interrupt > > signalling. > > In this file, Documentation/staging/tee.rst ? A pointer to a good > example of what you're expecting would be much appreciated. > There's also the file drivers/tee/optee/optee_smc.h, this is where the > ABI to OP-TEE is defined. This file is fine, but repeating in the DT binding that edge signalling is what is expected would be good. Thanks, M. -- Without deviation from the norm, progress is not possible. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E791EC4338F for ; Wed, 4 Aug 2021 14:40:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B21B360FC3 for ; Wed, 4 Aug 2021 14:40:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org B21B360FC3 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; 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Wed, 04 Aug 2021 14:39:25 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mBI3E-006TMc-UM for linux-arm-kernel@lists.infradead.org; Wed, 04 Aug 2021 14:39:22 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 75DE360F01; Wed, 4 Aug 2021 14:39:20 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mBI3C-002wKH-E9; Wed, 04 Aug 2021 15:39:18 +0100 Date: Wed, 04 Aug 2021 15:39:17 +0100 Message-ID: <87lf5hw9yi.wl-maz@kernel.org> From: Marc Zyngier To: Jens Wiklander Cc: Linux Kernel Mailing List , Linux ARM , OP-TEE TrustedFirmware , Devicetree List , Linux Doc Mailing List , Jerome Forissier , Etienne Carriere , Sumit Garg , Vincent Guittot , Rob Herring , Jonathan Corbet , Ard Biesheuvel Subject: Re: [PATCH v3 1/6] docs: staging/tee.rst: add a section on OP-TEE notifications In-Reply-To: References: <20210723094422.2150313-1-jens.wiklander@linaro.org> <20210723094422.2150313-2-jens.wiklander@linaro.org> <87zgud1giz.wl-maz@kernel.org> <87eebkdumr.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: jens.wiklander@linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, op-tee@lists.trustedfirmware.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, jerome@forissier.org, etienne.carriere@linaro.org, sumit.garg@linaro.org, vincent.guittot@linaro.org, robh+dt@kernel.org, corbet@lwn.net, ardb@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210804_073921_051698_8B9AA0FA X-CRM114-Status: GOOD ( 73.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 27 Jul 2021 15:57:07 +0100, Jens Wiklander wrote: > > On Tue, Jul 27, 2021 at 10:32 AM Marc Zyngier wrote: > > > > On Tue, 27 Jul 2021 08:46:39 +0100, > > Jens Wiklander wrote: > > > > > > On Fri, Jul 23, 2021 at 12:16 PM Marc Zyngier wrote: > > > > > > > > On Fri, 23 Jul 2021 10:44:17 +0100, > > > > Jens Wiklander wrote: > > > > > > > > > > Adds a section on notifications used by OP-TEE, synchronous and > > > > > asynchronous. > > > > > > > > > > Signed-off-by: Jens Wiklander > > > > > --- > > > > > Documentation/staging/tee.rst | 27 +++++++++++++++++++++++++++ > > > > > 1 file changed, 27 insertions(+) > > > > > > > > > > diff --git a/Documentation/staging/tee.rst b/Documentation/staging/tee.rst > > > > > index 4d4b5f889603..37bdd097336f 100644 > > > > > --- a/Documentation/staging/tee.rst > > > > > +++ b/Documentation/staging/tee.rst > > > > > @@ -184,6 +184,33 @@ order to support device enumeration. In other words, OP-TEE driver invokes this > > > > > application to retrieve a list of Trusted Applications which can be registered > > > > > as devices on the TEE bus. > > > > > > > > > > +OP-TEE notifications > > > > > +-------------------- > > > > > + > > > > > +There are two kinds of notifications that secure world can use to make > > > > > +normal world aware of some event. > > > > > + > > > > > +1. Synchronous notifications delivered with ``OPTEE_RPC_CMD_NOTIFICATION`` > > > > > + using the ``OPTEE_RPC_NOTIFICATION_SEND`` parameter. > > > > > +2. Asynchronous notifications delivered with a combination of a non-secure > > > > > + interrupt and a fast call from the non-secure interrupt handler. > > > > > + > > > > > +Synchronous notifications are limited by depending on RPC for delivery, > > > > > +this is only usable when secure world is entered with a yielding call via > > > > > +``OPTEE_SMC_CALL_WITH_ARG``. This excludes such notifications from secure > > > > > +world interrupt handlers. > > > > > + > > > > > +An asynchronous notification is delivered via a non-secure interrupt to an > > > > > +interrupt handler registered in the OP-TEE driver. The actual notification > > > > > +value are retrieved with the fast call ``OPTEE_SMC_GET_ASYNC_NOTIF_VALUE``. > > > > > + > > > > > +One notification value ``OPTEE_SMC_ASYNC_NOTIF_VALUE_DO_BOTTOM_HALF`` has a > > > > > +special meaning. When this value is received it means that normal world is > > > > > +supposed to make a yielding call ``OPTEE_MSG_CMD_DO_BOTTOM_HALF``. This > > > > > +call is done from the thread assisting the interrupt handler. This is a > > > > > +building block for OP-TEE OS in secure world to implement the top half and > > > > > +bottom half style of device drivers. > > > > > + > > > > > > > > What I find missing here is a description of the trigger for this > > > > interrupt, and how it influences the way the kernel drivers interacts > > > > with the secure side: > > > > > > > > - if it is edge triggered, this is 'fire and forget'. The interrupt > > > > will be consumed by the kernel handler, and whether it eventually > > > > calls into the secure side has no impact on the interrupt flow. > > > > > > > > - if it is level triggered, then the interrupt may be asserted until > > > > the kernel calls into the secure side, which may then drop the line > > > > level if no other requests are pending. > > > > > > > > These are evidently two very different flows, and you need to pick a > > > > side. Note that not all interrupt controllers support both signalling > > > > modes, so you are likely to leave something behind. Or you can try and > > > > support both flows, but that may make the driver slightly more > > > > complex. > > > > > > > > Either way, this needs specifying, here and in the DT binding. > > > > > > In the example I'm using a level triggered interrupt which is > > > triggered by writing to GICD_ISPENDR by secure world. Reading of > > > GICC_IAR should clear the interrupt,the GICv2 reference manual is > > > quite clear on that. > > > > No, it merely activates it. You can't transition an interrupt from > > pending to inactive (unless you clear it using GICD_ICPENDR). If you > > have spotted something else in the GICv2 architecture manual, please > > say so and I'll get it fixed 15 years after the facts. The fact that > > GICC_IAR consumes a pending bit introduced by a write to ISPENDR is an > > implementation detail, see below. > > I was looking at figure 4-10 "Logic of the pending status of a > level-sensitive interrupt". > > > > > It is also a flawed approach, as this behaviour is IMPDEF on GICv3 > > (see 4.5 "Shared Peripheral Interrupts" in the GICv3 arch spec). Given > > that GICv2 is pretty much a dead horse (TFFT!), I can't see this approach > > being successful in the long run. > > OK, thanks. > > > > > > So, if I understand it correctly, it will for > > > this purpose work in the same way as an edge triggered interrupt. If > > > this wouldn't be the case in some configuration and the interrupt must > > > be cleared by some other action that would be a job for the receiver > > > of OPTEE_SMC_GET_ASYNC_NOTIF_VALUE, that is, a secure world problem. > > > The normal world flow should be the same. > > > > You are assuming that the secure side will use GICD_ISPENDR, and > > that's a leap of faith. > > Not in this case with upstream OP-TEE. If we need to signal in a > different way we can do that instead. > What happens downstream we have no control over, but that's perhaps > not so different from the kernel. > > > An implementation should use, say, a GPIO to > > drive the interrupt line and give it proper level semantics. > > I'm not so keen on that since we often don't touch GPIO at all in > OP-TEE and this would then mean more platform specific code. We may > even need to synchronize some hardware access with the normal world > and then we'd be back at square one again. I'm trying to make a general statement here. OP-TEE may not do any of this. Yet. Other TEE implementations may do it because there is no free SPI in the system, for example. The problem is that interrupt signalling is a *device* thing, even if the device is actually some SW running on the secure side, and I would like the TEE to behave as such. > > > Now that we describe the interrupt configuration in device tree it > > > must use something that mirrors the secure world expectations. I don't > > > see a point in restricting what's allowed as long it doesn't need code > > > changes in the kernel too. Does this make any sense? > > > > And that's the crucial point: what *are* the expectations of the > > secure side? > > That should be up to the OP-TEE port of that particular platform to > decide and advise which device tree configuration to use. > > > You seem to assume edge semantics, but that's unclear at > > best. > > Fair enough, edge semantics solves the problem here. > > > > > > If I just expand a bit above explaining that the interrupt handler > > > must call OPTEE_SMC_GET_ASYNC_NOTIF_VALUE as part of clearing the > > > interrupt even if it might be cleared anyway in some configurations. > > > Would that make it more clear, good enough even :-) ? > > > > This is an interrupt, please document it in terms of interrupt > > signalling. > > In this file, Documentation/staging/tee.rst ? A pointer to a good > example of what you're expecting would be much appreciated. > There's also the file drivers/tee/optee/optee_smc.h, this is where the > ABI to OP-TEE is defined. This file is fine, but repeating in the DT binding that edge signalling is what is expected would be good. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel