From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754378AbcCUKbM (ORCPT ); Mon, 21 Mar 2016 06:31:12 -0400 Received: from mga01.intel.com ([192.55.52.88]:54223 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752647AbcCUKa5 convert rfc822-to-8bit (ORCPT ); Mon, 21 Mar 2016 06:30:57 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.24,371,1455004800"; d="scan'208";a="941720063" From: Jani Nikula To: Ville =?utf-8?B?U3lyasOkbMOk?= , Lyude Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org, arthur.j.runyan@intel.com, open list , dri-devel@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: Get rid of intel_dp_dpcd_read_wake() In-Reply-To: <20160318164140.GO4329@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <1458229245-8634-1-git-send-email-cpaul@redhat.com> <1458229245-8634-2-git-send-email-cpaul@redhat.com> <20160318141345.GG4329@intel.com> <20160318161235.GN4329@intel.com> <20160318164140.GO4329@intel.com> User-Agent: Notmuch/0.21+80~g3ff6f8b (http://notmuchmail.org) Emacs/24.4.1 (x86_64-pc-linux-gnu) Date: Mon, 21 Mar 2016 12:30:54 +0200 Message-ID: <87lh5ct95t.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 18 Mar 2016, Ville Syrjälä wrote: > On Fri, Mar 18, 2016 at 06:12:35PM +0200, Ville Syrjälä wrote: >> On Fri, Mar 18, 2016 at 04:13:45PM +0200, Ville Syrjälä wrote: >> > On Thu, Mar 17, 2016 at 11:40:45AM -0400, Lyude wrote: >> > > - drm_dp_dpcd_read(aux, DP_DPCD_REV, buffer, 1); >> > >> > NAK >> > >> > If people keep intentionally breaking my shit I'm going to become >> > really grumpy soon. >> >> Oh, and just in case someone wants to come up with a better kludge, >> I just spent a few minutes analyzing the behavior of this crappy >> monitor a. >> >> What happens is that when the monitor is fully powered up (LED is blue) >> things are fine. After the monitor goes to sleep (LED turns orange) >> the first DPCD read will produce garbage. Further DPCD reads are fine, >> even if I wait a significant amount of time between the reads, as long >> as the monitor didn't do a power on->off cycle in between. So it looks >> like it's always just the first read after power down that gets >> corrupted. >> >> Now I think I'll go and test how writes behave, assuming I can find a >> decently sized chunk of DPCD address space I can write. And maybe I >> should also try i2c-over-aux... > > The first DPCD write after powerdown also got corrupted. But i2c-over-aux > seems unaffected for whatever reason. Did the display go to sleep on its own, or did we do something? In particular, does DPCD DP_SET_POWER register play a role? What if we skip writing D3 to it? What if we do that write as the first thing (every time)? BR, Jani. -- Jani Nikula, Intel Open Source Technology Center From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH 2/2] drm/i915: Get rid of intel_dp_dpcd_read_wake() Date: Mon, 21 Mar 2016 12:30:54 +0200 Message-ID: <87lh5ct95t.fsf@intel.com> References: <1458229245-8634-1-git-send-email-cpaul@redhat.com> <1458229245-8634-2-git-send-email-cpaul@redhat.com> <20160318141345.GG4329@intel.com> <20160318161235.GN4329@intel.com> <20160318164140.GO4329@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20160318164140.GO4329@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ville =?utf-8?B?U3lyasOkbMOk?= , Lyude Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org, arthur.j.runyan@intel.com, open list , dri-devel@lists.freedesktop.org List-Id: dri-devel@lists.freedesktop.org T24gRnJpLCAxOCBNYXIgMjAxNiwgVmlsbGUgU3lyasOkbMOkIDx2aWxsZS5zeXJqYWxhQGxpbnV4 LmludGVsLmNvbT4gd3JvdGU6Cj4gT24gRnJpLCBNYXIgMTgsIDIwMTYgYXQgMDY6MTI6MzVQTSAr MDIwMCwgVmlsbGUgU3lyasOkbMOkIHdyb3RlOgo+PiBPbiBGcmksIE1hciAxOCwgMjAxNiBhdCAw NDoxMzo0NVBNICswMjAwLCBWaWxsZSBTeXJqw6Rsw6Qgd3JvdGU6Cj4+ID4gT24gVGh1LCBNYXIg MTcsIDIwMTYgYXQgMTE6NDA6NDVBTSAtMDQwMCwgTHl1ZGUgd3JvdGU6Cj4+ID4gPiAtCWRybV9k cF9kcGNkX3JlYWQoYXV4LCBEUF9EUENEX1JFViwgYnVmZmVyLCAxKTsKPj4gPiAKPj4gPiBOQUsK Pj4gPiAKPj4gPiBJZiBwZW9wbGUga2VlcCBpbnRlbnRpb25hbGx5IGJyZWFraW5nIG15IHNoaXQg SSdtIGdvaW5nIHRvIGJlY29tZQo+PiA+IHJlYWxseSBncnVtcHkgc29vbi4KPj4gCj4+IE9oLCBh bmQganVzdCBpbiBjYXNlIHNvbWVvbmUgd2FudHMgdG8gY29tZSB1cCB3aXRoIGEgYmV0dGVyIGts dWRnZSwKPj4gSSBqdXN0IHNwZW50IGEgZmV3IG1pbnV0ZXMgYW5hbHl6aW5nIHRoZSBiZWhhdmlv ciBvZiB0aGlzIGNyYXBweQo+PiBtb25pdG9yIGEuCj4+IAo+PiBXaGF0IGhhcHBlbnMgaXMgdGhh dCB3aGVuIHRoZSBtb25pdG9yIGlzIGZ1bGx5IHBvd2VyZWQgdXAgKExFRCBpcyBibHVlKQo+PiB0 aGluZ3MgYXJlIGZpbmUuIEFmdGVyIHRoZSBtb25pdG9yIGdvZXMgdG8gc2xlZXAgKExFRCB0dXJu cyBvcmFuZ2UpCj4+IHRoZSBmaXJzdCBEUENEIHJlYWQgd2lsbCBwcm9kdWNlIGdhcmJhZ2UuIEZ1 cnRoZXIgRFBDRCByZWFkcyBhcmUgZmluZSwKPj4gZXZlbiBpZiBJIHdhaXQgYSBzaWduaWZpY2Fu dCBhbW91bnQgb2YgdGltZSBiZXR3ZWVuIHRoZSByZWFkcywgYXMgbG9uZwo+PiBhcyB0aGUgbW9u aXRvciBkaWRuJ3QgZG8gYSBwb3dlciBvbi0+b2ZmIGN5Y2xlIGluIGJldHdlZW4uIFNvIGl0IGxv b2tzCj4+IGxpa2UgaXQncyBhbHdheXMganVzdCB0aGUgZmlyc3QgcmVhZCBhZnRlciBwb3dlciBk b3duIHRoYXQgZ2V0cwo+PiBjb3JydXB0ZWQuCj4+IAo+PiBOb3cgSSB0aGluayBJJ2xsIGdvIGFu ZCB0ZXN0IGhvdyB3cml0ZXMgYmVoYXZlLCBhc3N1bWluZyBJIGNhbiBmaW5kIGEKPj4gZGVjZW50 bHkgc2l6ZWQgY2h1bmsgb2YgRFBDRCBhZGRyZXNzIHNwYWNlIEkgY2FuIHdyaXRlLiBBbmQgbWF5 YmUgSQo+PiBzaG91bGQgYWxzbyB0cnkgaTJjLW92ZXItYXV4Li4uCj4KPiBUaGUgZmlyc3QgRFBD RCB3cml0ZSBhZnRlciBwb3dlcmRvd24gYWxzbyBnb3QgY29ycnVwdGVkLiBCdXQgaTJjLW92ZXIt YXV4Cj4gc2VlbXMgdW5hZmZlY3RlZCBmb3Igd2hhdGV2ZXIgcmVhc29uLgoKRGlkIHRoZSBkaXNw bGF5IGdvIHRvIHNsZWVwIG9uIGl0cyBvd24sIG9yIGRpZCB3ZSBkbyBzb21ldGhpbmc/IEluCnBh cnRpY3VsYXIsIGRvZXMgRFBDRCBEUF9TRVRfUE9XRVIgcmVnaXN0ZXIgcGxheSBhIHJvbGU/IFdo YXQgaWYgd2Ugc2tpcAp3cml0aW5nIEQzIHRvIGl0PyBXaGF0IGlmIHdlIGRvIHRoYXQgd3JpdGUg YXMgdGhlIGZpcnN0IHRoaW5nIChldmVyeQp0aW1lKT8KCgpCUiwKSmFuaS4KCgotLSAKSmFuaSBO aWt1bGEsIEludGVsIE9wZW4gU291cmNlIFRlY2hub2xvZ3kgQ2VudGVyCl9fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QK SW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9w Lm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=