From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8496AC4338F for ; Wed, 4 Aug 2021 14:23:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 629B560F25 for ; Wed, 4 Aug 2021 14:23:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237905AbhHDOYB (ORCPT ); Wed, 4 Aug 2021 10:24:01 -0400 Received: from mail.kernel.org ([198.145.29.99]:51392 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238696AbhHDOXx (ORCPT ); Wed, 4 Aug 2021 10:23:53 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E331C60C3E; Wed, 4 Aug 2021 14:23:40 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mBHo2-002w7n-UP; Wed, 04 Aug 2021 15:23:39 +0100 Date: Wed, 04 Aug 2021 15:23:38 +0100 Message-ID: <87mtpxwaol.wl-maz@kernel.org> From: Marc Zyngier To: Huacai Chen Cc: Huacai Chen , Thomas Gleixner , LKML , Xuefeng Li , Jiaxun Yang , Chen Zhu Subject: Re: [PATCH 2/9] irqchip/loongson-pch-pic: Improve edge triggered interrupt support In-Reply-To: References: <20210706030904.1411775-1-chenhuacai@loongson.cn> <20210706030904.1411775-3-chenhuacai@loongson.cn> <878s2j8udi.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: chenhuacai@gmail.com, chenhuacai@loongson.cn, tglx@linutronix.de, linux-kernel@vger.kernel.org, lixuefeng@loongson.cn, jiaxun.yang@flygoat.com, zhuchen@loongson.cn X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 09 Jul 2021 04:00:58 +0100, Huacai Chen wrote: > > Hi, Marc, > > On Tue, Jul 6, 2021 at 9:06 PM Marc Zyngier wrote: > > > > On Tue, 06 Jul 2021 04:08:57 +0100, > > Huacai Chen wrote: > > > > > > Edge-triggered mode and level-triggered mode need different handlers, > > > and edge-triggered mode need a specific ack operation. So improve it. > > > > > > > Is this a fix? How does it work currently? > Yes, some devices (e.g., RTC) is edge-triggered, they need > handle_edge_irq(). Currently we don't use RTC interrupt in the > upstream kernel on Loongson platform, so it "works". If you want me to queue this independently of the full LoongArch series, please resend it with a Fixes: tag. Thanks, M. -- Without deviation from the norm, progress is not possible.