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From: Marc Zyngier <maz@kernel.org>
To: Haibo Xu <haibo.xu@linaro.org>
Cc: arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	kvmarm <kvmarm@lists.cs.columbia.edu>,
	kvm@vger.kernel.org, kernel-team@android.com,
	Andre Przywara <andre.przywara@arm.com>
Subject: Re: [PATCH v3 33/66] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures
Date: Tue, 16 Feb 2021 18:34:11 +0000	[thread overview]
Message-ID: <87mtw3q2u4.wl-maz@kernel.org> (raw)
In-Reply-To: <CAJc+Z1F5rvhWkWzbi2JrfSaETUg_qxiiLBVhrVcw7Da5=Yo2GQ@mail.gmail.com>

On Thu, 21 Jan 2021 02:59:13 +0000,
Haibo Xu <haibo.xu@linaro.org> wrote:
> 
> On Fri, 11 Dec 2020 at 00:04, Marc Zyngier <maz@kernel.org> wrote:

[...]

> > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
> > index 9fb44bc7db3f..8e85d2ef24d9 100644
> > --- a/arch/arm64/kvm/nested.c
> > +++ b/arch/arm64/kvm/nested.c
> > @@ -19,12 +19,177 @@
> >  #include <linux/kvm.h>
> >  #include <linux/kvm_host.h>
> >
> > +#include <asm/kvm_arm.h>
> >  #include <asm/kvm_emulate.h>
> > +#include <asm/kvm_mmu.h>
> >  #include <asm/kvm_nested.h>
> >  #include <asm/sysreg.h>
> >
> >  #include "sys_regs.h"
> >
> > +void kvm_init_nested(struct kvm *kvm)
> > +{
> > +       kvm->arch.nested_mmus = NULL;
> > +       kvm->arch.nested_mmus_size = 0;
> > +}
> > +
> > +int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)
> > +{
> > +       struct kvm *kvm = vcpu->kvm;
> > +       struct kvm_s2_mmu *tmp;
> > +       int num_mmus;
> > +       int ret = -ENOMEM;
> > +
> > +       if (!test_bit(KVM_ARM_VCPU_HAS_EL2, vcpu->arch.features))
> > +               return 0;
> > +
> > +       if (!cpus_have_final_cap(ARM64_HAS_NESTED_VIRT))
> > +               return -EINVAL;
> 
> nit: returning a "not supported" kind of errno?

I think this is consistent with what we otherwise return when there is
a mismatch between requested features from userspace and host
capabilities (such as asking for a 32bit guest on a 64bit only CPU).

What seems to be missing though is a way to *advertise* the feature to
userspace as such:

diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 97d377265d8e..0225b81d3434 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -243,6 +243,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
 	case KVM_CAP_ARM_EL1_32BIT:
 		r = cpus_have_const_cap(ARM64_HAS_32BIT_EL1);
 		break;
+	case KVM_CAP_ARM_EL2:
+		r = cpus_have_const_cap(ARM64_HAS_NESTED_VIRT);
+		break;
 	case KVM_CAP_GUEST_DEBUG_HW_BPS:
 		r = get_num_brps();
 		break;
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index 374c67875cdb..555a60ac00d8 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1058,6 +1058,7 @@ struct kvm_ppc_resize_hpt {
 #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190
 #define KVM_CAP_SYS_HYPERV_CPUID 191
 #define KVM_CAP_DIRTY_LOG_RING 192
+#define KVM_CAP_ARM_EL2 193
 
 #ifdef KVM_CAP_IRQ_ROUTING
 

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Haibo Xu <haibo.xu@linaro.org>
Cc: Andre Przywara <andre.przywara@arm.com>,
	kernel-team@android.com, kvmarm <kvmarm@lists.cs.columbia.edu>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	kvm@vger.kernel.org
Subject: Re: [PATCH v3 33/66] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures
Date: Tue, 16 Feb 2021 18:34:11 +0000	[thread overview]
Message-ID: <87mtw3q2u4.wl-maz@kernel.org> (raw)
In-Reply-To: <CAJc+Z1F5rvhWkWzbi2JrfSaETUg_qxiiLBVhrVcw7Da5=Yo2GQ@mail.gmail.com>

On Thu, 21 Jan 2021 02:59:13 +0000,
Haibo Xu <haibo.xu@linaro.org> wrote:
> 
> On Fri, 11 Dec 2020 at 00:04, Marc Zyngier <maz@kernel.org> wrote:

[...]

> > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
> > index 9fb44bc7db3f..8e85d2ef24d9 100644
> > --- a/arch/arm64/kvm/nested.c
> > +++ b/arch/arm64/kvm/nested.c
> > @@ -19,12 +19,177 @@
> >  #include <linux/kvm.h>
> >  #include <linux/kvm_host.h>
> >
> > +#include <asm/kvm_arm.h>
> >  #include <asm/kvm_emulate.h>
> > +#include <asm/kvm_mmu.h>
> >  #include <asm/kvm_nested.h>
> >  #include <asm/sysreg.h>
> >
> >  #include "sys_regs.h"
> >
> > +void kvm_init_nested(struct kvm *kvm)
> > +{
> > +       kvm->arch.nested_mmus = NULL;
> > +       kvm->arch.nested_mmus_size = 0;
> > +}
> > +
> > +int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)
> > +{
> > +       struct kvm *kvm = vcpu->kvm;
> > +       struct kvm_s2_mmu *tmp;
> > +       int num_mmus;
> > +       int ret = -ENOMEM;
> > +
> > +       if (!test_bit(KVM_ARM_VCPU_HAS_EL2, vcpu->arch.features))
> > +               return 0;
> > +
> > +       if (!cpus_have_final_cap(ARM64_HAS_NESTED_VIRT))
> > +               return -EINVAL;
> 
> nit: returning a "not supported" kind of errno?

I think this is consistent with what we otherwise return when there is
a mismatch between requested features from userspace and host
capabilities (such as asking for a 32bit guest on a 64bit only CPU).

What seems to be missing though is a way to *advertise* the feature to
userspace as such:

diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 97d377265d8e..0225b81d3434 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -243,6 +243,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
 	case KVM_CAP_ARM_EL1_32BIT:
 		r = cpus_have_const_cap(ARM64_HAS_32BIT_EL1);
 		break;
+	case KVM_CAP_ARM_EL2:
+		r = cpus_have_const_cap(ARM64_HAS_NESTED_VIRT);
+		break;
 	case KVM_CAP_GUEST_DEBUG_HW_BPS:
 		r = get_num_brps();
 		break;
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index 374c67875cdb..555a60ac00d8 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1058,6 +1058,7 @@ struct kvm_ppc_resize_hpt {
 #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190
 #define KVM_CAP_SYS_HYPERV_CPUID 191
 #define KVM_CAP_DIRTY_LOG_RING 192
+#define KVM_CAP_ARM_EL2 193
 
 #ifdef KVM_CAP_IRQ_ROUTING
 

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Haibo Xu <haibo.xu@linaro.org>
Cc: Andre Przywara <andre.przywara@arm.com>,
	kernel-team@android.com, kvmarm <kvmarm@lists.cs.columbia.edu>,
	arm-mail-list <linux-arm-kernel@lists.infradead.org>,
	kvm@vger.kernel.org
Subject: Re: [PATCH v3 33/66] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures
Date: Tue, 16 Feb 2021 18:34:11 +0000	[thread overview]
Message-ID: <87mtw3q2u4.wl-maz@kernel.org> (raw)
In-Reply-To: <CAJc+Z1F5rvhWkWzbi2JrfSaETUg_qxiiLBVhrVcw7Da5=Yo2GQ@mail.gmail.com>

On Thu, 21 Jan 2021 02:59:13 +0000,
Haibo Xu <haibo.xu@linaro.org> wrote:
> 
> On Fri, 11 Dec 2020 at 00:04, Marc Zyngier <maz@kernel.org> wrote:

[...]

> > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c
> > index 9fb44bc7db3f..8e85d2ef24d9 100644
> > --- a/arch/arm64/kvm/nested.c
> > +++ b/arch/arm64/kvm/nested.c
> > @@ -19,12 +19,177 @@
> >  #include <linux/kvm.h>
> >  #include <linux/kvm_host.h>
> >
> > +#include <asm/kvm_arm.h>
> >  #include <asm/kvm_emulate.h>
> > +#include <asm/kvm_mmu.h>
> >  #include <asm/kvm_nested.h>
> >  #include <asm/sysreg.h>
> >
> >  #include "sys_regs.h"
> >
> > +void kvm_init_nested(struct kvm *kvm)
> > +{
> > +       kvm->arch.nested_mmus = NULL;
> > +       kvm->arch.nested_mmus_size = 0;
> > +}
> > +
> > +int kvm_vcpu_init_nested(struct kvm_vcpu *vcpu)
> > +{
> > +       struct kvm *kvm = vcpu->kvm;
> > +       struct kvm_s2_mmu *tmp;
> > +       int num_mmus;
> > +       int ret = -ENOMEM;
> > +
> > +       if (!test_bit(KVM_ARM_VCPU_HAS_EL2, vcpu->arch.features))
> > +               return 0;
> > +
> > +       if (!cpus_have_final_cap(ARM64_HAS_NESTED_VIRT))
> > +               return -EINVAL;
> 
> nit: returning a "not supported" kind of errno?

I think this is consistent with what we otherwise return when there is
a mismatch between requested features from userspace and host
capabilities (such as asking for a 32bit guest on a 64bit only CPU).

What seems to be missing though is a way to *advertise* the feature to
userspace as such:

diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 97d377265d8e..0225b81d3434 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -243,6 +243,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
 	case KVM_CAP_ARM_EL1_32BIT:
 		r = cpus_have_const_cap(ARM64_HAS_32BIT_EL1);
 		break;
+	case KVM_CAP_ARM_EL2:
+		r = cpus_have_const_cap(ARM64_HAS_NESTED_VIRT);
+		break;
 	case KVM_CAP_GUEST_DEBUG_HW_BPS:
 		r = get_num_brps();
 		break;
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index 374c67875cdb..555a60ac00d8 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -1058,6 +1058,7 @@ struct kvm_ppc_resize_hpt {
 #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190
 #define KVM_CAP_SYS_HYPERV_CPUID 191
 #define KVM_CAP_DIRTY_LOG_RING 192
+#define KVM_CAP_ARM_EL2 193
 
 #ifdef KVM_CAP_IRQ_ROUTING
 

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-02-16 18:35 UTC|newest]

Thread overview: 249+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-10 15:58 [PATCH v3 00/66] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support Marc Zyngier
2020-12-10 15:58 ` Marc Zyngier
2020-12-10 15:58 ` Marc Zyngier
2020-12-10 15:58 ` [PATCH v3 01/66] arm64: Add ARM64_HAS_NESTED_VIRT cpufeature Marc Zyngier
2020-12-10 15:58   ` Marc Zyngier
2020-12-10 15:58   ` Marc Zyngier
2020-12-10 15:58 ` [PATCH v3 02/66] KVM: arm64: nv: Introduce nested virtualization VCPU feature Marc Zyngier
2020-12-10 15:58   ` Marc Zyngier
2020-12-10 15:58   ` Marc Zyngier
2020-12-10 15:58 ` [PATCH v3 03/66] KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set Marc Zyngier
2020-12-10 15:58   ` Marc Zyngier
2020-12-10 15:58   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 04/66] KVM: arm64: nv: Allow userspace to set PSR_MODE_EL2x Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 05/66] KVM: arm64: nv: Add EL2 system registers to vcpu context Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2021-01-29 18:04   ` Andre Przywara
2021-01-29 18:04     ` Andre Przywara
2021-01-29 18:04     ` Andre Przywara
2020-12-10 15:59 ` [PATCH v3 06/66] KVM: arm64: nv: Add nested virt VCPU primitives for vEL2 VCPU state Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 07/66] KVM: arm64: nv: Handle HCR_EL2.NV system register traps Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2021-01-29 18:05   ` Andre Przywara
2021-01-29 18:05     ` Andre Przywara
2021-01-29 18:05     ` Andre Przywara
2020-12-10 15:59 ` [PATCH v3 08/66] KVM: arm64: nv: Reset VMPIDR_EL2 and VPIDR_EL2 to sane values Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 09/66] KVM: arm64: nv: Support virtual EL2 exceptions Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2021-01-29 18:05   ` Andre Przywara
2021-01-29 18:05     ` Andre Przywara
2021-01-29 18:05     ` Andre Przywara
2021-02-16 22:05     ` Marc Zyngier
2021-02-16 22:05       ` Marc Zyngier
2021-02-16 22:05       ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 10/66] KVM: arm64: nv: Inject HVC exceptions to the virtual EL2 Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 11/66] KVM: arm64: nv: Handle trapped ERET from " Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 12/66] KVM: arm64: nv: Add non-VHE-EL2->EL1 translation helpers Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 13/66] KVM: arm64: nv: Handle virtual EL2 registers in vcpu_read/write_sys_reg() Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 14/66] KVM: arm64: nv: Handle SPSR_EL2 specially Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 15/66] KVM: arm64: nv: Handle HCR_EL2.E2H specially Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 16/66] KVM: arm64: nv: Save/Restore vEL2 sysregs Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 17/66] KVM: arm64: nv: Emulate PSTATE.M for a guest hypervisor Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 18/66] KVM: arm64: nv: Trap EL1 VM register accesses in virtual EL2 Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 19/66] KVM: arm64: nv: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 from " Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 20/66] KVM: arm64: nv: Trap CPACR_EL1 access in " Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 21/66] KVM: arm64: nv: Handle PSCI call via smc from the guest Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 22/66] KVM: arm64: nv: Respect virtual HCR_EL2.TWX setting Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 23/66] KVM: arm64: nv: Respect virtual CPTR_EL2.{TFP,FPEN} settings Marc Zyngier
2020-12-10 15:59   ` [PATCH v3 23/66] KVM: arm64: nv: Respect virtual CPTR_EL2.{TFP, FPEN} settings Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 24/66] KVM: arm64: nv: Respect the virtual HCR_EL2.NV bit setting Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 25/66] KVM: arm64: nv: Respect virtual HCR_EL2.TVM and TRVM settings Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 26/66] KVM: arm64: nv: Respect the virtual HCR_EL2.NV1 bit setting Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 27/66] KVM: arm64: nv: Emulate EL12 register accesses from the virtual EL2 Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 28/66] KVM: arm64: nv: Forward debug traps to the nested guest Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 29/66] KVM: arm64: nv: Configure HCR_EL2 for nested virtualization Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 30/66] KVM: arm64: nv: Only toggle cache for virtual EL2 when SCTLR_EL2 changes Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 31/66] KVM: arm64: nv: Filter out unsupported features from ID regs Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 32/66] KVM: arm64: nv: Hide RAS from nested guests Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 33/66] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2021-01-21  2:59   ` Haibo Xu
2021-01-21  2:59     ` Haibo Xu
2021-01-21  2:59     ` Haibo Xu
2021-02-16 18:34     ` Marc Zyngier [this message]
2021-02-16 18:34       ` Marc Zyngier
2021-02-16 18:34       ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 34/66] KVM: arm64: nv: Implement nested Stage-2 page table walk logic Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 35/66] KVM: arm64: nv: Handle shadow stage 2 page faults Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 36/66] KVM: arm64: nv: Restrict S2 RD/WR permissions to match the guest's Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 37/66] KVM: arm64: nv: Unmap/flush shadow stage 2 page tables Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 38/66] KVM: arm64: nv: Introduce sys_reg_desc.forward_trap Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 39/66] KVM: arm64: nv: Set a handler for the system instruction traps Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 40/66] KVM: arm64: nv: Trap and emulate AT instructions from virtual EL2 Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 41/66] KVM: arm64: nv: Trap and emulate TLBI " Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 42/66] KVM: arm64: nv: Fold guest's HCR_EL2 configuration into the host's Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 43/66] KVM: arm64: nv: arch_timer: Support hyp timer emulation Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-11  0:26   ` kernel test robot
2020-12-10 15:59 ` [PATCH v3 44/66] KVM: arm64: nv: Add handling of EL2-specific timer registers Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 45/66] KVM: arm64: nv: Load timer before the GIC Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 46/66] KVM: arm64: nv: Nested GICv3 Support Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 47/66] KVM: arm64: nv: Don't load the GICv4 context on entering a nested guest Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 48/66] KVM: arm64: nv: vgic: Emulate the HW bit in software Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 49/66] KVM: arm64: nv: vgic: Allow userland to set VGIC maintenance IRQ Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 50/66] KVM: arm64: nv: Implement maintenance interrupt forwarding Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 51/66] KVM: arm64: nv: Add nested GICv3 tracepoints Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 52/66] KVM: arm64: nv: Allow userspace to request KVM_ARM_VCPU_NESTED_VIRT Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 53/66] KVM: arm64: nv: Add handling of ARMv8.4-TTL TLB invalidation Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 54/66] KVM: arm64: nv: Invalidate TLBs based on shadow S2 TTL-like information Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 55/66] KVM: arm64: Allow populating S2 SW bits Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 56/66] KVM: arm64: nv: Tag shadow S2 entries with nested level Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 57/66] KVM: arm64: nv: Add include containing the VNCR_EL2 offsets Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 58/66] KVM: arm64: Map VNCR-capable registers to a separate page Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 59/66] KVM: arm64: nv: Move nested vgic state into the sysreg file Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 60/66] KVM: arm64: Add ARMv8.4 Enhanced Nested Virt cpufeature Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 61/66] KVM: arm64: nv: Synchronize PSTATE early on exit Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 62/66] KVM: arm64: nv: Sync nested timer state with ARMv8.4 Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59 ` [PATCH v3 63/66] KVM: arm64: nv: Allocate VNCR page when required Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2020-12-10 15:59   ` Marc Zyngier
2021-01-21  2:47   ` Haibo Xu
2021-01-21  2:47     ` Haibo Xu
2021-01-21  2:47     ` Haibo Xu
2021-02-16 19:03     ` Marc Zyngier
2021-02-16 19:03       ` Marc Zyngier
2021-02-16 19:03       ` Marc Zyngier
2020-12-10 16:00 ` [PATCH v3 64/66] KVM: arm64: nv: Enable ARMv8.4-NV support Marc Zyngier
2020-12-10 16:00   ` Marc Zyngier
2020-12-10 16:00   ` Marc Zyngier
2020-12-10 16:00 ` [PATCH v3 65/66] KVM: arm64: nv: Fast-track 'InHost' exception returns Marc Zyngier
2020-12-10 16:00   ` Marc Zyngier
2020-12-10 16:00   ` Marc Zyngier
2020-12-10 16:00 ` [PATCH v3 66/66] KVM: arm64: nv: Fast-track EL1 TLBIs for VHE guests Marc Zyngier
2020-12-10 16:00   ` Marc Zyngier
2020-12-10 16:00   ` Marc Zyngier
2021-01-11  7:20 ` [PATCH v3 00/66] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support Haibo Xu
2021-01-11  8:59   ` Marc Zyngier
2021-01-11  8:59     ` Marc Zyngier
2021-01-11  8:59     ` Marc Zyngier
2021-01-12  8:02     ` Haibo Xu
2021-01-12  8:02       ` Haibo Xu
2021-01-12  8:02       ` Haibo Xu
2021-01-18 17:38 ` André Przywara
2021-01-18 17:38   ` André Przywara
2021-01-18 17:38   ` André Przywara
2021-01-21  2:35 ` Haibo Xu
2021-01-21  3:03 ` Haibo Xu
2021-01-21  3:03   ` Haibo Xu
2021-01-21  3:03   ` Haibo Xu
2021-02-04  7:51   ` Haibo Xu
2021-02-04  7:51     ` Haibo Xu
2021-02-04  7:51     ` Haibo Xu
2021-02-17 22:10     ` Marc Zyngier
2021-02-17 22:10       ` Marc Zyngier
2021-02-17 22:10       ` Marc Zyngier
2021-02-23  9:43       ` Haibo Xu
2021-02-23  9:43         ` Haibo Xu
2021-02-23  9:43         ` Haibo Xu

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