From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B15A2C433F5 for ; Fri, 17 Sep 2021 09:10:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 919866113A for ; Fri, 17 Sep 2021 09:10:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239016AbhIQJMF (ORCPT ); Fri, 17 Sep 2021 05:12:05 -0400 Received: from mail.kernel.org ([198.145.29.99]:38646 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239492AbhIQJKV (ORCPT ); Fri, 17 Sep 2021 05:10:21 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B8C7E6113A; Fri, 17 Sep 2021 09:08:59 +0000 (UTC) Received: from [198.52.44.129] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mR9rd-00BKoA-Sa; Fri, 17 Sep 2021 10:08:58 +0100 Date: Fri, 17 Sep 2021 10:08:56 +0100 Message-ID: <87o88rbmc7.wl-maz@kernel.org> From: Marc Zyngier To: Alyssa Rosenzweig Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi , Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , Stan Skowronek , Mark Kettenis , Sven Peter , Hector Martin , Robin Murphy , kernel-team@android.com Subject: Re: [PATCH v3 08/10] PCI: apple: Implement MSI support In-Reply-To: References: <20210913182550.264165-1-maz@kernel.org> <20210913182550.264165-9-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 198.52.44.129 X-SA-Exim-Rcpt-To: alyssa@rosenzweig.io, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, kw@linux.com, stan@corellium.com, kettenis@openbsd.org, sven@svenpeter.dev, marcan@marcan.st, Robin.Murphy@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 13 Sep 2021 21:43:23 +0100, Alyssa Rosenzweig wrote: > > > +static void apple_msi_compose_msg(struct irq_data *data, struct msi_msg *msg) > > +{ > > + BUILD_BUG_ON(upper_32_bits(DOORBELL_ADDR)); > > + > > + msg->address_hi = upper_32_bits(DOORBELL_ADDR); > > + msg->address_lo = lower_32_bits(DOORBELL_ADDR); > > + msg->data = data->hwirq; > > +} > ... > > @@ -269,6 +378,14 @@ static int apple_pcie_port_setup_irq(struct apple_pcie_port *port) > > > > irq_set_chained_handler_and_data(irq, apple_port_irq_handler, port); > > > > + /* Configure MSI base address */ > > + writel_relaxed(lower_32_bits(DOORBELL_ADDR), port->base + PORT_MSIADDR); > > + > > + /* Enable MSIs, shared between all ports */ > > + writel_relaxed(0, port->base + PORT_MSIBASE); > > + writel_relaxed((ilog2(port->pcie->nvecs) << PORT_MSICFG_L2MSINUM_SHIFT) | > > + PORT_MSICFG_EN, port->base + PORT_MSICFG); > > + > > return 0; > > } > > I think the BUILD_BUG_ON makes more sense next to configuring the base > address (which only has a 32-bit register, the BUILD_BUG_ON justifies > using writel and not writeq), rather than configuring the message (which > specifies the full 64-bits). Indeed, this makes a bit more sense. Thanks for pointing this out. M. -- Without deviation from the norm, progress is not possible.