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* [Intel-gfx] [PATCH 1/4] drm/i915: rename debugfs_gt files
@ 2021-09-09  0:49 ` Lucas De Marchi
  0 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-09  0:49 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

We shouldn't be using debugfs_ namespace for this functionality. Rename
debugfs_gt.[ch] to intel_gt_debugfs.[ch] and then make functions,
defines and structs follow suit.

While at it and since we are renaming the header, sort the includes
alphabetically.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/Makefile                  |  2 +-
 drivers/gpu/drm/i915/gt/debugfs_engines.c      |  6 +++---
 drivers/gpu/drm/i915/gt/debugfs_gt_pm.c        | 14 +++++++-------
 drivers/gpu/drm/i915/gt/intel_gt.c             |  6 +++---
 .../gt/{debugfs_gt.c => intel_gt_debugfs.c}    |  8 ++++----
 .../gt/{debugfs_gt.h => intel_gt_debugfs.h}    | 14 +++++++-------
 drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c   | 10 +++++-----
 drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 18 +++++++++---------
 .../gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c |  8 ++++----
 drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c |  6 +++---
 drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c  |  6 +++---
 11 files changed, 49 insertions(+), 49 deletions(-)
 rename drivers/gpu/drm/i915/gt/{debugfs_gt.c => intel_gt_debugfs.c} (87%)
 rename drivers/gpu/drm/i915/gt/{debugfs_gt.h => intel_gt_debugfs.h} (71%)

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c36c8a4f0716..3e171f0b5f6a 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -80,7 +80,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
 # "Graphics Technology" (aka we talk to the gpu)
 gt-y += \
 	gt/debugfs_engines.o \
-	gt/debugfs_gt.o \
 	gt/debugfs_gt_pm.o \
 	gt/gen2_engine_cs.o \
 	gt/gen6_engine_cs.o \
@@ -101,6 +100,7 @@ gt-y += \
 	gt/intel_gt.o \
 	gt/intel_gt_buffer_pool.o \
 	gt/intel_gt_clock_utils.o \
+	gt/intel_gt_debugfs.o \
 	gt/intel_gt_irq.o \
 	gt/intel_gt_pm.o \
 	gt/intel_gt_pm_irq.o \
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c b/drivers/gpu/drm/i915/gt/debugfs_engines.c
index 5e3725e62241..2980dac5b171 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
@@ -7,9 +7,9 @@
 #include <drm/drm_print.h>
 
 #include "debugfs_engines.h"
-#include "debugfs_gt.h"
 #include "i915_drv.h" /* for_each_engine! */
 #include "intel_engine.h"
+#include "intel_gt_debugfs.h"
 
 static int engines_show(struct seq_file *m, void *data)
 {
@@ -24,11 +24,11 @@ static int engines_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(engines);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
 
 void debugfs_engines_register(struct intel_gt *gt, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "engines", &engines_fops },
 	};
 
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
index f6733f279890..9222cf68c56c 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
@@ -6,11 +6,11 @@
 
 #include <linux/seq_file.h>
 
-#include "debugfs_gt.h"
 #include "debugfs_gt_pm.h"
 #include "i915_drv.h"
 #include "intel_gt.h"
 #include "intel_gt_clock_utils.h"
+#include "intel_gt_debugfs.h"
 #include "intel_gt_pm.h"
 #include "intel_llc.h"
 #include "intel_rc6.h"
@@ -36,7 +36,7 @@ static int fw_domains_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(fw_domains);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(fw_domains);
 
 static void print_rc6_res(struct seq_file *m,
 			  const char *title,
@@ -238,7 +238,7 @@ static int drpc_show(struct seq_file *m, void *unused)
 
 	return err;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(drpc);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(drpc);
 
 static int frequency_show(struct seq_file *m, void *unused)
 {
@@ -480,7 +480,7 @@ static int frequency_show(struct seq_file *m, void *unused)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(frequency);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(frequency);
 
 static int llc_show(struct seq_file *m, void *data)
 {
@@ -533,7 +533,7 @@ static bool llc_eval(void *data)
 	return HAS_LLC(gt->i915);
 }
 
-DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(llc);
 
 static const char *rps_power_to_str(unsigned int power)
 {
@@ -612,11 +612,11 @@ static bool rps_eval(void *data)
 	return HAS_RPS(gt->i915);
 }
 
-DEFINE_GT_DEBUGFS_ATTRIBUTE(rps_boost);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rps_boost);
 
 void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "drpc", &drpc_fops, NULL },
 		{ "frequency", &frequency_fops, NULL },
 		{ "forcewake", &fw_domains_fops, NULL },
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 2aeaae036a6f..9dda17553e12 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -3,7 +3,7 @@
  * Copyright © 2019 Intel Corporation
  */
 
-#include "debugfs_gt.h"
+#include "intel_gt_debugfs.h"
 
 #include "gem/i915_gem_lmem.h"
 #include "i915_drv.h"
@@ -15,11 +15,11 @@
 #include "intel_gt_requests.h"
 #include "intel_migrate.h"
 #include "intel_mocs.h"
+#include "intel_pm.h"
 #include "intel_rc6.h"
 #include "intel_renderstate.h"
 #include "intel_rps.h"
 #include "intel_uncore.h"
-#include "intel_pm.h"
 #include "shmem_utils.h"
 
 void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
@@ -434,7 +434,7 @@ void intel_gt_driver_register(struct intel_gt *gt)
 {
 	intel_rps_driver_register(&gt->rps);
 
-	debugfs_gt_register(gt);
+	intel_gt_register_debugfs(gt);
 }
 
 static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
similarity index 87%
rename from drivers/gpu/drm/i915/gt/debugfs_gt.c
rename to drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index 591eb60785db..a27ba11605d8 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -6,13 +6,13 @@
 #include <linux/debugfs.h>
 
 #include "debugfs_engines.h"
-#include "debugfs_gt.h"
 #include "debugfs_gt_pm.h"
+#include "i915_drv.h"
+#include "intel_gt_debugfs.h"
 #include "intel_sseu_debugfs.h"
 #include "uc/intel_uc_debugfs.h"
-#include "i915_drv.h"
 
-void debugfs_gt_register(struct intel_gt *gt)
+void intel_gt_register_debugfs(struct intel_gt *gt)
 {
 	struct dentry *root;
 
@@ -31,7 +31,7 @@ void debugfs_gt_register(struct intel_gt *gt)
 }
 
 void intel_gt_debugfs_register_files(struct dentry *root,
-				     const struct debugfs_gt_file *files,
+				     const struct intel_gt_debugfs_file *files,
 				     unsigned long count, void *data)
 {
 	while (count--) {
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
similarity index 71%
rename from drivers/gpu/drm/i915/gt/debugfs_gt.h
rename to drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
index f77540f727e9..cab0f2cb5009 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
@@ -3,14 +3,14 @@
  * Copyright © 2019 Intel Corporation
  */
 
-#ifndef DEBUGFS_GT_H
-#define DEBUGFS_GT_H
+#ifndef INTEL_GT_DEBUGFS_H
+#define INTEL_GT_DEBUGFS_H
 
 #include <linux/file.h>
 
 struct intel_gt;
 
-#define DEFINE_GT_DEBUGFS_ATTRIBUTE(__name)				\
+#define DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(__name)				\
 	static int __name ## _open(struct inode *inode, struct file *file) \
 {									\
 	return single_open(file, __name ## _show, inode->i_private);	\
@@ -23,16 +23,16 @@ static const struct file_operations __name ## _fops = {			\
 	.release = single_release,					\
 }
 
-void debugfs_gt_register(struct intel_gt *gt);
+void intel_gt_register_debugfs(struct intel_gt *gt);
 
-struct debugfs_gt_file {
+struct intel_gt_debugfs_file {
 	const char *name;
 	const struct file_operations *fops;
 	bool (*eval)(void *data);
 };
 
 void intel_gt_debugfs_register_files(struct dentry *root,
-				     const struct debugfs_gt_file *files,
+				     const struct intel_gt_debugfs_file *files,
 				     unsigned long count, void *data);
 
-#endif /* DEBUGFS_GT_H */
+#endif /* INTEL_GT_DEBUGFS_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
index 1ba8b7da9d37..8bb3a91dad82 100644
--- a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
@@ -4,9 +4,9 @@
  * Copyright © 2020 Intel Corporation
  */
 
-#include "debugfs_gt.h"
-#include "intel_sseu_debugfs.h"
 #include "i915_drv.h"
+#include "intel_gt_debugfs.h"
+#include "intel_sseu_debugfs.h"
 
 static void sseu_copy_subslices(const struct sseu_dev_info *sseu,
 				int slice, u8 *to_mask)
@@ -282,7 +282,7 @@ static int sseu_status_show(struct seq_file *m, void *unused)
 
 	return intel_sseu_status(m, gt);
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(sseu_status);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(sseu_status);
 
 static int rcs_topology_show(struct seq_file *m, void *unused)
 {
@@ -293,11 +293,11 @@ static int rcs_topology_show(struct seq_file *m, void *unused)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(rcs_topology);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rcs_topology);
 
 void intel_sseu_debugfs_register(struct intel_gt *gt, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "sseu_status", &sseu_status_fops, NULL },
 		{ "rcs_topology", &rcs_topology_fops, NULL },
 	};
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
index 887c8c8f35db..25f09a420561 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
@@ -5,14 +5,14 @@
 
 #include <drm/drm_print.h>
 
-#include "gt/debugfs_gt.h"
+#include "gt/intel_gt_debugfs.h"
+#include "gt/uc/intel_guc_ads.h"
+#include "gt/uc/intel_guc_ct.h"
+#include "gt/uc/intel_guc_slpc.h"
+#include "gt/uc/intel_guc_submission.h"
 #include "intel_guc.h"
 #include "intel_guc_debugfs.h"
 #include "intel_guc_log_debugfs.h"
-#include "gt/uc/intel_guc_ct.h"
-#include "gt/uc/intel_guc_ads.h"
-#include "gt/uc/intel_guc_submission.h"
-#include "gt/uc/intel_guc_slpc.h"
 
 static int guc_info_show(struct seq_file *m, void *data)
 {
@@ -35,7 +35,7 @@ static int guc_info_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_info);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_info);
 
 static int guc_registered_contexts_show(struct seq_file *m, void *data)
 {
@@ -49,7 +49,7 @@ static int guc_registered_contexts_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
 
 static int guc_slpc_info_show(struct seq_file *m, void *unused)
 {
@@ -62,7 +62,7 @@ static int guc_slpc_info_show(struct seq_file *m, void *unused)
 
 	return intel_guc_slpc_print_info(slpc, &p);
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
 
 static bool intel_eval_slpc_support(void *data)
 {
@@ -73,7 +73,7 @@ static bool intel_eval_slpc_support(void *data)
 
 void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "guc_info", &guc_info_fops, NULL },
 		{ "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
 		{ "guc_slpc_info", &guc_slpc_info_fops, &intel_eval_slpc_support},
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
index 64e0b86bf258..46026c2c1722 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
@@ -6,7 +6,7 @@
 #include <linux/fs.h>
 #include <drm/drm_print.h>
 
-#include "gt/debugfs_gt.h"
+#include "gt/intel_gt_debugfs.h"
 #include "intel_guc.h"
 #include "intel_guc_log.h"
 #include "intel_guc_log_debugfs.h"
@@ -17,7 +17,7 @@ static int guc_log_dump_show(struct seq_file *m, void *data)
 
 	return intel_guc_log_dump(m->private, &p, false);
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
 
 static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
 {
@@ -25,7 +25,7 @@ static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
 
 	return intel_guc_log_dump(m->private, &p, true);
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
 
 static int guc_log_level_get(void *data, u64 *val)
 {
@@ -109,7 +109,7 @@ static const struct file_operations guc_log_relay_fops = {
 void intel_guc_log_debugfs_register(struct intel_guc_log *log,
 				    struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "guc_log_dump", &guc_log_dump_fops, NULL },
 		{ "guc_load_err_log_dump", &guc_load_err_log_dump_fops, NULL },
 		{ "guc_log_level", &guc_log_level_fops, NULL },
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
index 5733c15fd123..15998963b863 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
@@ -5,7 +5,7 @@
 
 #include <drm/drm_print.h>
 
-#include "gt/debugfs_gt.h"
+#include "gt/intel_gt_debugfs.h"
 #include "intel_huc.h"
 #include "intel_huc_debugfs.h"
 
@@ -21,11 +21,11 @@ static int huc_info_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(huc_info);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(huc_info);
 
 void intel_huc_debugfs_register(struct intel_huc *huc, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "huc_info", &huc_info_fops, NULL },
 	};
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
index 089d98662f46..c2f7924295e7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
@@ -6,7 +6,7 @@
 #include <linux/debugfs.h>
 #include <drm/drm_print.h>
 
-#include "gt/debugfs_gt.h"
+#include "gt/intel_gt_debugfs.h"
 #include "intel_guc_debugfs.h"
 #include "intel_huc_debugfs.h"
 #include "intel_uc.h"
@@ -32,11 +32,11 @@ static int uc_usage_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(uc_usage);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(uc_usage);
 
 void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "usage", &uc_usage_fops, NULL },
 	};
 	struct dentry *root;
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 23+ messages in thread
* [PATCH 1/4] drm/i915: rename debugfs_gt files
@ 2021-09-09  0:49 ` Lucas De Marchi
  0 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-09  0:49 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

We shouldn't be using debugfs_ namespace for this functionality. Rename
debugfs_gt.[ch] to intel_gt_debugfs.[ch] and then make functions,
defines and structs follow suit.

While at it and since we are renaming the header, sort the includes
alphabetically.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/Makefile                  |  2 +-
 drivers/gpu/drm/i915/gt/debugfs_engines.c      |  6 +++---
 drivers/gpu/drm/i915/gt/debugfs_gt_pm.c        | 14 +++++++-------
 drivers/gpu/drm/i915/gt/intel_gt.c             |  6 +++---
 .../gt/{debugfs_gt.c => intel_gt_debugfs.c}    |  8 ++++----
 .../gt/{debugfs_gt.h => intel_gt_debugfs.h}    | 14 +++++++-------
 drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c   | 10 +++++-----
 drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 18 +++++++++---------
 .../gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c |  8 ++++----
 drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c |  6 +++---
 drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c  |  6 +++---
 11 files changed, 49 insertions(+), 49 deletions(-)
 rename drivers/gpu/drm/i915/gt/{debugfs_gt.c => intel_gt_debugfs.c} (87%)
 rename drivers/gpu/drm/i915/gt/{debugfs_gt.h => intel_gt_debugfs.h} (71%)

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c36c8a4f0716..3e171f0b5f6a 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -80,7 +80,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
 # "Graphics Technology" (aka we talk to the gpu)
 gt-y += \
 	gt/debugfs_engines.o \
-	gt/debugfs_gt.o \
 	gt/debugfs_gt_pm.o \
 	gt/gen2_engine_cs.o \
 	gt/gen6_engine_cs.o \
@@ -101,6 +100,7 @@ gt-y += \
 	gt/intel_gt.o \
 	gt/intel_gt_buffer_pool.o \
 	gt/intel_gt_clock_utils.o \
+	gt/intel_gt_debugfs.o \
 	gt/intel_gt_irq.o \
 	gt/intel_gt_pm.o \
 	gt/intel_gt_pm_irq.o \
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c b/drivers/gpu/drm/i915/gt/debugfs_engines.c
index 5e3725e62241..2980dac5b171 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
@@ -7,9 +7,9 @@
 #include <drm/drm_print.h>
 
 #include "debugfs_engines.h"
-#include "debugfs_gt.h"
 #include "i915_drv.h" /* for_each_engine! */
 #include "intel_engine.h"
+#include "intel_gt_debugfs.h"
 
 static int engines_show(struct seq_file *m, void *data)
 {
@@ -24,11 +24,11 @@ static int engines_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(engines);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
 
 void debugfs_engines_register(struct intel_gt *gt, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "engines", &engines_fops },
 	};
 
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
index f6733f279890..9222cf68c56c 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
@@ -6,11 +6,11 @@
 
 #include <linux/seq_file.h>
 
-#include "debugfs_gt.h"
 #include "debugfs_gt_pm.h"
 #include "i915_drv.h"
 #include "intel_gt.h"
 #include "intel_gt_clock_utils.h"
+#include "intel_gt_debugfs.h"
 #include "intel_gt_pm.h"
 #include "intel_llc.h"
 #include "intel_rc6.h"
@@ -36,7 +36,7 @@ static int fw_domains_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(fw_domains);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(fw_domains);
 
 static void print_rc6_res(struct seq_file *m,
 			  const char *title,
@@ -238,7 +238,7 @@ static int drpc_show(struct seq_file *m, void *unused)
 
 	return err;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(drpc);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(drpc);
 
 static int frequency_show(struct seq_file *m, void *unused)
 {
@@ -480,7 +480,7 @@ static int frequency_show(struct seq_file *m, void *unused)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(frequency);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(frequency);
 
 static int llc_show(struct seq_file *m, void *data)
 {
@@ -533,7 +533,7 @@ static bool llc_eval(void *data)
 	return HAS_LLC(gt->i915);
 }
 
-DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(llc);
 
 static const char *rps_power_to_str(unsigned int power)
 {
@@ -612,11 +612,11 @@ static bool rps_eval(void *data)
 	return HAS_RPS(gt->i915);
 }
 
-DEFINE_GT_DEBUGFS_ATTRIBUTE(rps_boost);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rps_boost);
 
 void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "drpc", &drpc_fops, NULL },
 		{ "frequency", &frequency_fops, NULL },
 		{ "forcewake", &fw_domains_fops, NULL },
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 2aeaae036a6f..9dda17553e12 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -3,7 +3,7 @@
  * Copyright © 2019 Intel Corporation
  */
 
-#include "debugfs_gt.h"
+#include "intel_gt_debugfs.h"
 
 #include "gem/i915_gem_lmem.h"
 #include "i915_drv.h"
@@ -15,11 +15,11 @@
 #include "intel_gt_requests.h"
 #include "intel_migrate.h"
 #include "intel_mocs.h"
+#include "intel_pm.h"
 #include "intel_rc6.h"
 #include "intel_renderstate.h"
 #include "intel_rps.h"
 #include "intel_uncore.h"
-#include "intel_pm.h"
 #include "shmem_utils.h"
 
 void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
@@ -434,7 +434,7 @@ void intel_gt_driver_register(struct intel_gt *gt)
 {
 	intel_rps_driver_register(&gt->rps);
 
-	debugfs_gt_register(gt);
+	intel_gt_register_debugfs(gt);
 }
 
 static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
similarity index 87%
rename from drivers/gpu/drm/i915/gt/debugfs_gt.c
rename to drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index 591eb60785db..a27ba11605d8 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -6,13 +6,13 @@
 #include <linux/debugfs.h>
 
 #include "debugfs_engines.h"
-#include "debugfs_gt.h"
 #include "debugfs_gt_pm.h"
+#include "i915_drv.h"
+#include "intel_gt_debugfs.h"
 #include "intel_sseu_debugfs.h"
 #include "uc/intel_uc_debugfs.h"
-#include "i915_drv.h"
 
-void debugfs_gt_register(struct intel_gt *gt)
+void intel_gt_register_debugfs(struct intel_gt *gt)
 {
 	struct dentry *root;
 
@@ -31,7 +31,7 @@ void debugfs_gt_register(struct intel_gt *gt)
 }
 
 void intel_gt_debugfs_register_files(struct dentry *root,
-				     const struct debugfs_gt_file *files,
+				     const struct intel_gt_debugfs_file *files,
 				     unsigned long count, void *data)
 {
 	while (count--) {
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
similarity index 71%
rename from drivers/gpu/drm/i915/gt/debugfs_gt.h
rename to drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
index f77540f727e9..cab0f2cb5009 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
@@ -3,14 +3,14 @@
  * Copyright © 2019 Intel Corporation
  */
 
-#ifndef DEBUGFS_GT_H
-#define DEBUGFS_GT_H
+#ifndef INTEL_GT_DEBUGFS_H
+#define INTEL_GT_DEBUGFS_H
 
 #include <linux/file.h>
 
 struct intel_gt;
 
-#define DEFINE_GT_DEBUGFS_ATTRIBUTE(__name)				\
+#define DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(__name)				\
 	static int __name ## _open(struct inode *inode, struct file *file) \
 {									\
 	return single_open(file, __name ## _show, inode->i_private);	\
@@ -23,16 +23,16 @@ static const struct file_operations __name ## _fops = {			\
 	.release = single_release,					\
 }
 
-void debugfs_gt_register(struct intel_gt *gt);
+void intel_gt_register_debugfs(struct intel_gt *gt);
 
-struct debugfs_gt_file {
+struct intel_gt_debugfs_file {
 	const char *name;
 	const struct file_operations *fops;
 	bool (*eval)(void *data);
 };
 
 void intel_gt_debugfs_register_files(struct dentry *root,
-				     const struct debugfs_gt_file *files,
+				     const struct intel_gt_debugfs_file *files,
 				     unsigned long count, void *data);
 
-#endif /* DEBUGFS_GT_H */
+#endif /* INTEL_GT_DEBUGFS_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
index 1ba8b7da9d37..8bb3a91dad82 100644
--- a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
@@ -4,9 +4,9 @@
  * Copyright © 2020 Intel Corporation
  */
 
-#include "debugfs_gt.h"
-#include "intel_sseu_debugfs.h"
 #include "i915_drv.h"
+#include "intel_gt_debugfs.h"
+#include "intel_sseu_debugfs.h"
 
 static void sseu_copy_subslices(const struct sseu_dev_info *sseu,
 				int slice, u8 *to_mask)
@@ -282,7 +282,7 @@ static int sseu_status_show(struct seq_file *m, void *unused)
 
 	return intel_sseu_status(m, gt);
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(sseu_status);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(sseu_status);
 
 static int rcs_topology_show(struct seq_file *m, void *unused)
 {
@@ -293,11 +293,11 @@ static int rcs_topology_show(struct seq_file *m, void *unused)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(rcs_topology);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rcs_topology);
 
 void intel_sseu_debugfs_register(struct intel_gt *gt, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "sseu_status", &sseu_status_fops, NULL },
 		{ "rcs_topology", &rcs_topology_fops, NULL },
 	};
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
index 887c8c8f35db..25f09a420561 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
@@ -5,14 +5,14 @@
 
 #include <drm/drm_print.h>
 
-#include "gt/debugfs_gt.h"
+#include "gt/intel_gt_debugfs.h"
+#include "gt/uc/intel_guc_ads.h"
+#include "gt/uc/intel_guc_ct.h"
+#include "gt/uc/intel_guc_slpc.h"
+#include "gt/uc/intel_guc_submission.h"
 #include "intel_guc.h"
 #include "intel_guc_debugfs.h"
 #include "intel_guc_log_debugfs.h"
-#include "gt/uc/intel_guc_ct.h"
-#include "gt/uc/intel_guc_ads.h"
-#include "gt/uc/intel_guc_submission.h"
-#include "gt/uc/intel_guc_slpc.h"
 
 static int guc_info_show(struct seq_file *m, void *data)
 {
@@ -35,7 +35,7 @@ static int guc_info_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_info);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_info);
 
 static int guc_registered_contexts_show(struct seq_file *m, void *data)
 {
@@ -49,7 +49,7 @@ static int guc_registered_contexts_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
 
 static int guc_slpc_info_show(struct seq_file *m, void *unused)
 {
@@ -62,7 +62,7 @@ static int guc_slpc_info_show(struct seq_file *m, void *unused)
 
 	return intel_guc_slpc_print_info(slpc, &p);
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
 
 static bool intel_eval_slpc_support(void *data)
 {
@@ -73,7 +73,7 @@ static bool intel_eval_slpc_support(void *data)
 
 void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "guc_info", &guc_info_fops, NULL },
 		{ "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
 		{ "guc_slpc_info", &guc_slpc_info_fops, &intel_eval_slpc_support},
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
index 64e0b86bf258..46026c2c1722 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
@@ -6,7 +6,7 @@
 #include <linux/fs.h>
 #include <drm/drm_print.h>
 
-#include "gt/debugfs_gt.h"
+#include "gt/intel_gt_debugfs.h"
 #include "intel_guc.h"
 #include "intel_guc_log.h"
 #include "intel_guc_log_debugfs.h"
@@ -17,7 +17,7 @@ static int guc_log_dump_show(struct seq_file *m, void *data)
 
 	return intel_guc_log_dump(m->private, &p, false);
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
 
 static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
 {
@@ -25,7 +25,7 @@ static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
 
 	return intel_guc_log_dump(m->private, &p, true);
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
 
 static int guc_log_level_get(void *data, u64 *val)
 {
@@ -109,7 +109,7 @@ static const struct file_operations guc_log_relay_fops = {
 void intel_guc_log_debugfs_register(struct intel_guc_log *log,
 				    struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "guc_log_dump", &guc_log_dump_fops, NULL },
 		{ "guc_load_err_log_dump", &guc_load_err_log_dump_fops, NULL },
 		{ "guc_log_level", &guc_log_level_fops, NULL },
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
index 5733c15fd123..15998963b863 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
@@ -5,7 +5,7 @@
 
 #include <drm/drm_print.h>
 
-#include "gt/debugfs_gt.h"
+#include "gt/intel_gt_debugfs.h"
 #include "intel_huc.h"
 #include "intel_huc_debugfs.h"
 
@@ -21,11 +21,11 @@ static int huc_info_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(huc_info);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(huc_info);
 
 void intel_huc_debugfs_register(struct intel_huc *huc, struct dentry *root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "huc_info", &huc_info_fops, NULL },
 	};
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
index 089d98662f46..c2f7924295e7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
@@ -6,7 +6,7 @@
 #include <linux/debugfs.h>
 #include <drm/drm_print.h>
 
-#include "gt/debugfs_gt.h"
+#include "gt/intel_gt_debugfs.h"
 #include "intel_guc_debugfs.h"
 #include "intel_huc_debugfs.h"
 #include "intel_uc.h"
@@ -32,11 +32,11 @@ static int uc_usage_show(struct seq_file *m, void *data)
 
 	return 0;
 }
-DEFINE_GT_DEBUGFS_ATTRIBUTE(uc_usage);
+DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(uc_usage);
 
 void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root)
 {
-	static const struct debugfs_gt_file files[] = {
+	static const struct intel_gt_debugfs_file files[] = {
 		{ "usage", &uc_usage_fops, NULL },
 	};
 	struct dentry *root;
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 23+ messages in thread
* [Intel-gfx] [PATCH 2/4] drm/i915: rename debugfs_engines files
  2021-09-09  0:49 ` Lucas De Marchi
@ 2021-09-09  0:49   ` Lucas De Marchi
  -1 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-09  0:49 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

We shouldn't be using debugfs_ namespace for this functionality. Rename
debugfs_engines.[ch] to intel_gt_engines_debugfs.[ch] and then make
functions, defines and structs follow suit.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/Makefile                      |  2 +-
 drivers/gpu/drm/i915/gt/debugfs_engines.h          | 14 --------------
 drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
 ...ebugfs_engines.c => intel_gt_engines_debugfs.c} |  4 ++--
 drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h | 14 ++++++++++++++
 5 files changed, 19 insertions(+), 19 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_engines.h
 rename drivers/gpu/drm/i915/gt/{debugfs_engines.c => intel_gt_engines_debugfs.c} (85%)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3e171f0b5f6a..232c9673a2e5 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
 
 # "Graphics Technology" (aka we talk to the gpu)
 gt-y += \
-	gt/debugfs_engines.o \
 	gt/debugfs_gt_pm.o \
 	gt/gen2_engine_cs.o \
 	gt/gen6_engine_cs.o \
@@ -101,6 +100,7 @@ gt-y += \
 	gt/intel_gt_buffer_pool.o \
 	gt/intel_gt_clock_utils.o \
 	gt/intel_gt_debugfs.o \
+	gt/intel_gt_engines_debugfs.o \
 	gt/intel_gt_irq.o \
 	gt/intel_gt_pm.o \
 	gt/intel_gt_pm_irq.o \
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.h b/drivers/gpu/drm/i915/gt/debugfs_engines.h
deleted file mode 100644
index f69257eaa1cc..000000000000
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2019 Intel Corporation
- */
-
-#ifndef DEBUGFS_ENGINES_H
-#define DEBUGFS_ENGINES_H
-
-struct intel_gt;
-struct dentry;
-
-void debugfs_engines_register(struct intel_gt *gt, struct dentry *root);
-
-#endif /* DEBUGFS_ENGINES_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index a27ba11605d8..e5d173c235a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -5,10 +5,10 @@
 
 #include <linux/debugfs.h>
 
-#include "debugfs_engines.h"
 #include "debugfs_gt_pm.h"
 #include "i915_drv.h"
 #include "intel_gt_debugfs.h"
+#include "intel_gt_engines_debugfs.h"
 #include "intel_sseu_debugfs.h"
 #include "uc/intel_uc_debugfs.h"
 
@@ -23,7 +23,7 @@ void intel_gt_register_debugfs(struct intel_gt *gt)
 	if (IS_ERR(root))
 		return;
 
-	debugfs_engines_register(gt, root);
+	intel_gt_engines_register_debugfs(gt, root);
 	debugfs_gt_pm_register(gt, root);
 	intel_sseu_debugfs_register(gt, root);
 
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c b/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.c
similarity index 85%
rename from drivers/gpu/drm/i915/gt/debugfs_engines.c
rename to drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.c
index 2980dac5b171..44b22384fcb2 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.c
@@ -6,10 +6,10 @@
 
 #include <drm/drm_print.h>
 
-#include "debugfs_engines.h"
 #include "i915_drv.h" /* for_each_engine! */
 #include "intel_engine.h"
 #include "intel_gt_debugfs.h"
+#include "intel_gt_engines_debugfs.h"
 
 static int engines_show(struct seq_file *m, void *data)
 {
@@ -26,7 +26,7 @@ static int engines_show(struct seq_file *m, void *data)
 }
 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
 
-void debugfs_engines_register(struct intel_gt *gt, struct dentry *root)
+void intel_gt_engines_register_debugfs(struct intel_gt *gt, struct dentry *root)
 {
 	static const struct intel_gt_debugfs_file files[] = {
 		{ "engines", &engines_fops },
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h b/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h
new file mode 100644
index 000000000000..4163b496937b
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef INTEL_GT_ENGINES_DEBUGFS_H
+#define INTEL_GT_ENGINES_DEBUGFS_H
+
+struct intel_gt;
+struct dentry;
+
+void intel_gt_engines_register_debugfs(struct intel_gt *gt, struct dentry *root);
+
+#endif /* INTEL_GT_ENGINES_DEBUGFS_H */
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 23+ messages in thread
* [PATCH 2/4] drm/i915: rename debugfs_engines files
@ 2021-09-09  0:49   ` Lucas De Marchi
  0 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-09  0:49 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

We shouldn't be using debugfs_ namespace for this functionality. Rename
debugfs_engines.[ch] to intel_gt_engines_debugfs.[ch] and then make
functions, defines and structs follow suit.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/Makefile                      |  2 +-
 drivers/gpu/drm/i915/gt/debugfs_engines.h          | 14 --------------
 drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
 ...ebugfs_engines.c => intel_gt_engines_debugfs.c} |  4 ++--
 drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h | 14 ++++++++++++++
 5 files changed, 19 insertions(+), 19 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_engines.h
 rename drivers/gpu/drm/i915/gt/{debugfs_engines.c => intel_gt_engines_debugfs.c} (85%)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3e171f0b5f6a..232c9673a2e5 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
 
 # "Graphics Technology" (aka we talk to the gpu)
 gt-y += \
-	gt/debugfs_engines.o \
 	gt/debugfs_gt_pm.o \
 	gt/gen2_engine_cs.o \
 	gt/gen6_engine_cs.o \
@@ -101,6 +100,7 @@ gt-y += \
 	gt/intel_gt_buffer_pool.o \
 	gt/intel_gt_clock_utils.o \
 	gt/intel_gt_debugfs.o \
+	gt/intel_gt_engines_debugfs.o \
 	gt/intel_gt_irq.o \
 	gt/intel_gt_pm.o \
 	gt/intel_gt_pm_irq.o \
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.h b/drivers/gpu/drm/i915/gt/debugfs_engines.h
deleted file mode 100644
index f69257eaa1cc..000000000000
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2019 Intel Corporation
- */
-
-#ifndef DEBUGFS_ENGINES_H
-#define DEBUGFS_ENGINES_H
-
-struct intel_gt;
-struct dentry;
-
-void debugfs_engines_register(struct intel_gt *gt, struct dentry *root);
-
-#endif /* DEBUGFS_ENGINES_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index a27ba11605d8..e5d173c235a3 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -5,10 +5,10 @@
 
 #include <linux/debugfs.h>
 
-#include "debugfs_engines.h"
 #include "debugfs_gt_pm.h"
 #include "i915_drv.h"
 #include "intel_gt_debugfs.h"
+#include "intel_gt_engines_debugfs.h"
 #include "intel_sseu_debugfs.h"
 #include "uc/intel_uc_debugfs.h"
 
@@ -23,7 +23,7 @@ void intel_gt_register_debugfs(struct intel_gt *gt)
 	if (IS_ERR(root))
 		return;
 
-	debugfs_engines_register(gt, root);
+	intel_gt_engines_register_debugfs(gt, root);
 	debugfs_gt_pm_register(gt, root);
 	intel_sseu_debugfs_register(gt, root);
 
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c b/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.c
similarity index 85%
rename from drivers/gpu/drm/i915/gt/debugfs_engines.c
rename to drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.c
index 2980dac5b171..44b22384fcb2 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.c
@@ -6,10 +6,10 @@
 
 #include <drm/drm_print.h>
 
-#include "debugfs_engines.h"
 #include "i915_drv.h" /* for_each_engine! */
 #include "intel_engine.h"
 #include "intel_gt_debugfs.h"
+#include "intel_gt_engines_debugfs.h"
 
 static int engines_show(struct seq_file *m, void *data)
 {
@@ -26,7 +26,7 @@ static int engines_show(struct seq_file *m, void *data)
 }
 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
 
-void debugfs_engines_register(struct intel_gt *gt, struct dentry *root)
+void intel_gt_engines_register_debugfs(struct intel_gt *gt, struct dentry *root)
 {
 	static const struct intel_gt_debugfs_file files[] = {
 		{ "engines", &engines_fops },
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h b/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h
new file mode 100644
index 000000000000..4163b496937b
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef INTEL_GT_ENGINES_DEBUGFS_H
+#define INTEL_GT_ENGINES_DEBUGFS_H
+
+struct intel_gt;
+struct dentry;
+
+void intel_gt_engines_register_debugfs(struct intel_gt *gt, struct dentry *root);
+
+#endif /* INTEL_GT_ENGINES_DEBUGFS_H */
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 23+ messages in thread
* [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files
  2021-09-09  0:49 ` Lucas De Marchi
@ 2021-09-09  0:49   ` Lucas De Marchi
  -1 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-09  0:49 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

We shouldn't be using debugfs_ namespace for this functionality. Rename
debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make
functions, defines and structs follow suit.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/Makefile                      |  2 +-
 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h            | 14 --------------
 drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
 .../gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c}  |  4 ++--
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h      | 14 ++++++++++++++
 5 files changed, 19 insertions(+), 19 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
 rename drivers/gpu/drm/i915/gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c} (99%)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 232c9673a2e5..dd656f2d7721 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
 
 # "Graphics Technology" (aka we talk to the gpu)
 gt-y += \
-	gt/debugfs_gt_pm.o \
 	gt/gen2_engine_cs.o \
 	gt/gen6_engine_cs.o \
 	gt/gen6_ppgtt.o \
@@ -103,6 +102,7 @@ gt-y += \
 	gt/intel_gt_engines_debugfs.o \
 	gt/intel_gt_irq.o \
 	gt/intel_gt_pm.o \
+	gt/intel_gt_pm_debugfs.o \
 	gt/intel_gt_pm_irq.o \
 	gt/intel_gt_requests.o \
 	gt/intel_gtt.o \
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
deleted file mode 100644
index 4cf5f5c9da7d..000000000000
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2019 Intel Corporation
- */
-
-#ifndef DEBUGFS_GT_PM_H
-#define DEBUGFS_GT_PM_H
-
-struct intel_gt;
-struct dentry;
-
-void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root);
-
-#endif /* DEBUGFS_GT_PM_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index e5d173c235a3..4096ee893b69 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -5,10 +5,10 @@
 
 #include <linux/debugfs.h>
 
-#include "debugfs_gt_pm.h"
 #include "i915_drv.h"
 #include "intel_gt_debugfs.h"
 #include "intel_gt_engines_debugfs.h"
+#include "intel_gt_pm_debugfs.h"
 #include "intel_sseu_debugfs.h"
 #include "uc/intel_uc_debugfs.h"
 
@@ -24,7 +24,7 @@ void intel_gt_register_debugfs(struct intel_gt *gt)
 		return;
 
 	intel_gt_engines_register_debugfs(gt, root);
-	debugfs_gt_pm_register(gt, root);
+	intel_gt_pm_register_debugfs(gt, root);
 	intel_sseu_debugfs_register(gt, root);
 
 	intel_uc_debugfs_register(&gt->uc, root);
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
similarity index 99%
rename from drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
rename to drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
index 9222cf68c56c..baca153c05dd 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
@@ -6,12 +6,12 @@
 
 #include <linux/seq_file.h>
 
-#include "debugfs_gt_pm.h"
 #include "i915_drv.h"
 #include "intel_gt.h"
 #include "intel_gt_clock_utils.h"
 #include "intel_gt_debugfs.h"
 #include "intel_gt_pm.h"
+#include "intel_gt_pm_debugfs.h"
 #include "intel_llc.h"
 #include "intel_rc6.h"
 #include "intel_rps.h"
@@ -614,7 +614,7 @@ static bool rps_eval(void *data)
 
 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rps_boost);
 
-void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root)
+void intel_gt_pm_register_debugfs(struct intel_gt *gt, struct dentry *root)
 {
 	static const struct intel_gt_debugfs_file files[] = {
 		{ "drpc", &drpc_fops, NULL },
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
new file mode 100644
index 000000000000..f44894579604
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef INTEL_GT_PM_DEBUGFS_H
+#define INTEL_GT_PM_DEBUGFS_H
+
+struct intel_gt;
+struct dentry;
+
+void intel_gt_pm_register_debugfs(struct intel_gt *gt, struct dentry *root);
+
+#endif /* INTEL_GT_PM_DEBUGFS_H */
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 23+ messages in thread
* [PATCH 3/4] drm/i915: rename debugfs_gt_pm files
@ 2021-09-09  0:49   ` Lucas De Marchi
  0 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-09  0:49 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

We shouldn't be using debugfs_ namespace for this functionality. Rename
debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make
functions, defines and structs follow suit.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/Makefile                      |  2 +-
 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h            | 14 --------------
 drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
 .../gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c}  |  4 ++--
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h      | 14 ++++++++++++++
 5 files changed, 19 insertions(+), 19 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
 rename drivers/gpu/drm/i915/gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c} (99%)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 232c9673a2e5..dd656f2d7721 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
 
 # "Graphics Technology" (aka we talk to the gpu)
 gt-y += \
-	gt/debugfs_gt_pm.o \
 	gt/gen2_engine_cs.o \
 	gt/gen6_engine_cs.o \
 	gt/gen6_ppgtt.o \
@@ -103,6 +102,7 @@ gt-y += \
 	gt/intel_gt_engines_debugfs.o \
 	gt/intel_gt_irq.o \
 	gt/intel_gt_pm.o \
+	gt/intel_gt_pm_debugfs.o \
 	gt/intel_gt_pm_irq.o \
 	gt/intel_gt_requests.o \
 	gt/intel_gtt.o \
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
deleted file mode 100644
index 4cf5f5c9da7d..000000000000
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* SPDX-License-Identifier: MIT */
-/*
- * Copyright © 2019 Intel Corporation
- */
-
-#ifndef DEBUGFS_GT_PM_H
-#define DEBUGFS_GT_PM_H
-
-struct intel_gt;
-struct dentry;
-
-void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root);
-
-#endif /* DEBUGFS_GT_PM_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index e5d173c235a3..4096ee893b69 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -5,10 +5,10 @@
 
 #include <linux/debugfs.h>
 
-#include "debugfs_gt_pm.h"
 #include "i915_drv.h"
 #include "intel_gt_debugfs.h"
 #include "intel_gt_engines_debugfs.h"
+#include "intel_gt_pm_debugfs.h"
 #include "intel_sseu_debugfs.h"
 #include "uc/intel_uc_debugfs.h"
 
@@ -24,7 +24,7 @@ void intel_gt_register_debugfs(struct intel_gt *gt)
 		return;
 
 	intel_gt_engines_register_debugfs(gt, root);
-	debugfs_gt_pm_register(gt, root);
+	intel_gt_pm_register_debugfs(gt, root);
 	intel_sseu_debugfs_register(gt, root);
 
 	intel_uc_debugfs_register(&gt->uc, root);
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
similarity index 99%
rename from drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
rename to drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
index 9222cf68c56c..baca153c05dd 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
@@ -6,12 +6,12 @@
 
 #include <linux/seq_file.h>
 
-#include "debugfs_gt_pm.h"
 #include "i915_drv.h"
 #include "intel_gt.h"
 #include "intel_gt_clock_utils.h"
 #include "intel_gt_debugfs.h"
 #include "intel_gt_pm.h"
+#include "intel_gt_pm_debugfs.h"
 #include "intel_llc.h"
 #include "intel_rc6.h"
 #include "intel_rps.h"
@@ -614,7 +614,7 @@ static bool rps_eval(void *data)
 
 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rps_boost);
 
-void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root)
+void intel_gt_pm_register_debugfs(struct intel_gt *gt, struct dentry *root)
 {
 	static const struct intel_gt_debugfs_file files[] = {
 		{ "drpc", &drpc_fops, NULL },
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
new file mode 100644
index 000000000000..f44894579604
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2019 Intel Corporation
+ */
+
+#ifndef INTEL_GT_PM_DEBUGFS_H
+#define INTEL_GT_PM_DEBUGFS_H
+
+struct intel_gt;
+struct dentry;
+
+void intel_gt_pm_register_debugfs(struct intel_gt *gt, struct dentry *root);
+
+#endif /* INTEL_GT_PM_DEBUGFS_H */
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 23+ messages in thread
* [Intel-gfx] [PATCH 4/4] drm/i915: deduplicate frequency dump on debugfs
  2021-09-09  0:49 ` Lucas De Marchi
@ 2021-09-09  0:49   ` Lucas De Marchi
  -1 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-09  0:49 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

Although commit 9dd4b065446a ("drm/i915/gt: Move pm debug files into a
gt aware debugfs") says it was moving debug files to gt/, the
i915_frequency_info file was left behind and its implementation copied
into drivers/gpu/drm/i915/gt/debugfs_gt_pm.c. Over time we had several
patches having to change both places to keep them in sync (and some
patches failing to do so). The initial idea was to remove
i915_frequency_info, but there are user space tools using it. From a
quick code search there are other scripts and test tools besides igt, so
it's not simply updating igt to get rid of the older file.

Here we export a function using drm_printer as parameter and make
both show() implementations to call this same function. Aside from a few
variable name differences, for i915_frequency_info this brings a few
lines that were not previously printed: RP UP EI, RP UP THRESHOLD, RP
DOWN THRESHOLD and RP DOWN EI.  These came in as part of
commit 9c878557b1eb ("drm/i915/gt: Use the RPM config register to
determine clk frequencies"), which didn't change both places.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 127 +++++-----
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h |   2 +
 drivers/gpu/drm/i915/i915_debugfs.c           | 231 +-----------------
 3 files changed, 76 insertions(+), 284 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
index baca153c05dd..31d334d3b3b5 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
@@ -240,9 +240,8 @@ static int drpc_show(struct seq_file *m, void *unused)
 }
 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(drpc);
 
-static int frequency_show(struct seq_file *m, void *unused)
+void intel_gt_pm_frequency_dump(struct intel_gt *gt, struct drm_printer *p)
 {
-	struct intel_gt *gt = m->private;
 	struct drm_i915_private *i915 = gt->i915;
 	struct intel_uncore *uncore = gt->uncore;
 	struct intel_rps *rps = &gt->rps;
@@ -254,21 +253,21 @@ static int frequency_show(struct seq_file *m, void *unused)
 		u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
 		u16 rgvstat = intel_uncore_read16(uncore, MEMSTAT_ILK);
 
-		seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
-		seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
-		seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
+		drm_printf(p, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
+		drm_printf(p, "Requested VID: %d\n", rgvswctl & 0x3f);
+		drm_printf(p, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
 			   MEMSTAT_VID_SHIFT);
-		seq_printf(m, "Current P-state: %d\n",
+		drm_printf(p, "Current P-state: %d\n",
 			   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
 	} else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
 		u32 rpmodectl, freq_sts;
 
 		rpmodectl = intel_uncore_read(uncore, GEN6_RP_CONTROL);
-		seq_printf(m, "Video Turbo Mode: %s\n",
+		drm_printf(p, "Video Turbo Mode: %s\n",
 			   yesno(rpmodectl & GEN6_RP_MEDIA_TURBO));
-		seq_printf(m, "HW control enabled: %s\n",
+		drm_printf(p, "HW control enabled: %s\n",
 			   yesno(rpmodectl & GEN6_RP_ENABLE));
-		seq_printf(m, "SW control enabled: %s\n",
+		drm_printf(p, "SW control enabled: %s\n",
 			   yesno((rpmodectl & GEN6_RP_MEDIA_MODE_MASK) ==
 				 GEN6_RP_MEDIA_SW_MODE));
 
@@ -276,25 +275,25 @@ static int frequency_show(struct seq_file *m, void *unused)
 		freq_sts = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS);
 		vlv_punit_put(i915);
 
-		seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
-		seq_printf(m, "DDR freq: %d MHz\n", i915->mem_freq);
+		drm_printf(p, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
+		drm_printf(p, "DDR freq: %d MHz\n", i915->mem_freq);
 
-		seq_printf(m, "actual GPU freq: %d MHz\n",
+		drm_printf(p, "actual GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, (freq_sts >> 8) & 0xff));
 
-		seq_printf(m, "current GPU freq: %d MHz\n",
+		drm_printf(p, "current GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->cur_freq));
 
-		seq_printf(m, "max GPU freq: %d MHz\n",
+		drm_printf(p, "max GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->max_freq));
 
-		seq_printf(m, "min GPU freq: %d MHz\n",
+		drm_printf(p, "min GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->min_freq));
 
-		seq_printf(m, "idle GPU freq: %d MHz\n",
+		drm_printf(p, "idle GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->idle_freq));
 
-		seq_printf(m, "efficient (RPe) frequency: %d MHz\n",
+		drm_printf(p, "efficient (RPe) frequency: %d MHz\n",
 			   intel_gpu_freq(rps, rps->efficient_freq));
 	} else if (GRAPHICS_VER(i915) >= 6) {
 		u32 rp_state_limits;
@@ -374,109 +373,117 @@ static int frequency_show(struct seq_file *m, void *unused)
 		}
 		pm_mask = intel_uncore_read(uncore, GEN6_PMINTRMSK);
 
-		seq_printf(m, "Video Turbo Mode: %s\n",
+		drm_printf(p, "Video Turbo Mode: %s\n",
 			   yesno(rpmodectl & GEN6_RP_MEDIA_TURBO));
-		seq_printf(m, "HW control enabled: %s\n",
+		drm_printf(p, "HW control enabled: %s\n",
 			   yesno(rpmodectl & GEN6_RP_ENABLE));
-		seq_printf(m, "SW control enabled: %s\n",
+		drm_printf(p, "SW control enabled: %s\n",
 			   yesno((rpmodectl & GEN6_RP_MEDIA_MODE_MASK) ==
 				 GEN6_RP_MEDIA_SW_MODE));
 
-		seq_printf(m, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n",
+		drm_printf(p, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n",
 			   pm_ier, pm_imr, pm_mask);
 		if (GRAPHICS_VER(i915) <= 10)
-			seq_printf(m, "PM ISR=0x%08x IIR=0x%08x\n",
+			drm_printf(p, "PM ISR=0x%08x IIR=0x%08x\n",
 				   pm_isr, pm_iir);
-		seq_printf(m, "pm_intrmsk_mbz: 0x%08x\n",
+		drm_printf(p, "pm_intrmsk_mbz: 0x%08x\n",
 			   rps->pm_intrmsk_mbz);
-		seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
-		seq_printf(m, "Render p-state ratio: %d\n",
+		drm_printf(p, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
+		drm_printf(p, "Render p-state ratio: %d\n",
 			   (gt_perf_status & (GRAPHICS_VER(i915) >= 9 ? 0x1ff00 : 0xff00)) >> 8);
-		seq_printf(m, "Render p-state VID: %d\n",
+		drm_printf(p, "Render p-state VID: %d\n",
 			   gt_perf_status & 0xff);
-		seq_printf(m, "Render p-state limit: %d\n",
+		drm_printf(p, "Render p-state limit: %d\n",
 			   rp_state_limits & 0xff);
-		seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
-		seq_printf(m, "RPMODECTL: 0x%08x\n", rpmodectl);
-		seq_printf(m, "RPINCLIMIT: 0x%08x\n", rpinclimit);
-		seq_printf(m, "RPDECLIMIT: 0x%08x\n", rpdeclimit);
-		seq_printf(m, "RPNSWREQ: %dMHz\n", reqf);
-		seq_printf(m, "CAGF: %dMHz\n", cagf);
-		seq_printf(m, "RP CUR UP EI: %d (%lldns)\n",
+		drm_printf(p, "RPSTAT1: 0x%08x\n", rpstat);
+		drm_printf(p, "RPMODECTL: 0x%08x\n", rpmodectl);
+		drm_printf(p, "RPINCLIMIT: 0x%08x\n", rpinclimit);
+		drm_printf(p, "RPDECLIMIT: 0x%08x\n", rpdeclimit);
+		drm_printf(p, "RPNSWREQ: %dMHz\n", reqf);
+		drm_printf(p, "CAGF: %dMHz\n", cagf);
+		drm_printf(p, "RP CUR UP EI: %d (%lldns)\n",
 			   rpcurupei,
 			   intel_gt_pm_interval_to_ns(gt, rpcurupei));
-		seq_printf(m, "RP CUR UP: %d (%lldns)\n",
+		drm_printf(p, "RP CUR UP: %d (%lldns)\n",
 			   rpcurup, intel_gt_pm_interval_to_ns(gt, rpcurup));
-		seq_printf(m, "RP PREV UP: %d (%lldns)\n",
+		drm_printf(p, "RP PREV UP: %d (%lldns)\n",
 			   rpprevup, intel_gt_pm_interval_to_ns(gt, rpprevup));
-		seq_printf(m, "Up threshold: %d%%\n",
+		drm_printf(p, "Up threshold: %d%%\n",
 			   rps->power.up_threshold);
-		seq_printf(m, "RP UP EI: %d (%lldns)\n",
+		drm_printf(p, "RP UP EI: %d (%lldns)\n",
 			   rpupei, intel_gt_pm_interval_to_ns(gt, rpupei));
-		seq_printf(m, "RP UP THRESHOLD: %d (%lldns)\n",
+		drm_printf(p, "RP UP THRESHOLD: %d (%lldns)\n",
 			   rpupt, intel_gt_pm_interval_to_ns(gt, rpupt));
 
-		seq_printf(m, "RP CUR DOWN EI: %d (%lldns)\n",
+		drm_printf(p, "RP CUR DOWN EI: %d (%lldns)\n",
 			   rpcurdownei,
 			   intel_gt_pm_interval_to_ns(gt, rpcurdownei));
-		seq_printf(m, "RP CUR DOWN: %d (%lldns)\n",
+		drm_printf(p, "RP CUR DOWN: %d (%lldns)\n",
 			   rpcurdown,
 			   intel_gt_pm_interval_to_ns(gt, rpcurdown));
-		seq_printf(m, "RP PREV DOWN: %d (%lldns)\n",
+		drm_printf(p, "RP PREV DOWN: %d (%lldns)\n",
 			   rpprevdown,
 			   intel_gt_pm_interval_to_ns(gt, rpprevdown));
-		seq_printf(m, "Down threshold: %d%%\n",
+		drm_printf(p, "Down threshold: %d%%\n",
 			   rps->power.down_threshold);
-		seq_printf(m, "RP DOWN EI: %d (%lldns)\n",
+		drm_printf(p, "RP DOWN EI: %d (%lldns)\n",
 			   rpdownei, intel_gt_pm_interval_to_ns(gt, rpdownei));
-		seq_printf(m, "RP DOWN THRESHOLD: %d (%lldns)\n",
+		drm_printf(p, "RP DOWN THRESHOLD: %d (%lldns)\n",
 			   rpdownt, intel_gt_pm_interval_to_ns(gt, rpdownt));
 
 		max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 0 :
 			    rp_state_cap >> 16) & 0xff;
 		max_freq *= (IS_GEN9_BC(i915) ||
 			     GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
+		drm_printf(p, "Lowest (RPN) frequency: %dMHz\n",
 			   intel_gpu_freq(rps, max_freq));
 
 		max_freq = (rp_state_cap & 0xff00) >> 8;
 		max_freq *= (IS_GEN9_BC(i915) ||
 			     GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
+		drm_printf(p, "Nominal (RP1) frequency: %dMHz\n",
 			   intel_gpu_freq(rps, max_freq));
 
 		max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 16 :
 			    rp_state_cap >> 0) & 0xff;
 		max_freq *= (IS_GEN9_BC(i915) ||
 			     GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
+		drm_printf(p, "Max non-overclocked (RP0) frequency: %dMHz\n",
 			   intel_gpu_freq(rps, max_freq));
-		seq_printf(m, "Max overclocked frequency: %dMHz\n",
+		drm_printf(p, "Max overclocked frequency: %dMHz\n",
 			   intel_gpu_freq(rps, rps->max_freq));
 
-		seq_printf(m, "Current freq: %d MHz\n",
+		drm_printf(p, "Current freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->cur_freq));
-		seq_printf(m, "Actual freq: %d MHz\n", cagf);
-		seq_printf(m, "Idle freq: %d MHz\n",
+		drm_printf(p, "Actual freq: %d MHz\n", cagf);
+		drm_printf(p, "Idle freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->idle_freq));
-		seq_printf(m, "Min freq: %d MHz\n",
+		drm_printf(p, "Min freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->min_freq));
-		seq_printf(m, "Boost freq: %d MHz\n",
+		drm_printf(p, "Boost freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->boost_freq));
-		seq_printf(m, "Max freq: %d MHz\n",
+		drm_printf(p, "Max freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->max_freq));
-		seq_printf(m,
+		drm_printf(p,
 			   "efficient (RPe) frequency: %d MHz\n",
 			   intel_gpu_freq(rps, rps->efficient_freq));
 	} else {
-		seq_puts(m, "no P-state info available\n");
+		drm_puts(p, "no P-state info available\n");
 	}
 
-	seq_printf(m, "Current CD clock frequency: %d kHz\n", i915->cdclk.hw.cdclk);
-	seq_printf(m, "Max CD clock frequency: %d kHz\n", i915->max_cdclk_freq);
-	seq_printf(m, "Max pixel clock frequency: %d kHz\n", i915->max_dotclk_freq);
+	drm_printf(p, "Current CD clock frequency: %d kHz\n", i915->cdclk.hw.cdclk);
+	drm_printf(p, "Max CD clock frequency: %d kHz\n", i915->max_cdclk_freq);
+	drm_printf(p, "Max pixel clock frequency: %d kHz\n", i915->max_dotclk_freq);
 
 	intel_runtime_pm_put(uncore->rpm, wakeref);
+}
+
+static int frequency_show(struct seq_file *m, void *unused)
+{
+	struct intel_gt *gt = m->private;
+	struct drm_printer p = drm_seq_file_printer(m);
+
+	intel_gt_pm_frequency_dump(gt, &p);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
index f44894579604..98065e2da93b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
@@ -8,7 +8,9 @@
 
 struct intel_gt;
 struct dentry;
+struct drm_printer;
 
 void intel_gt_pm_register_debugfs(struct intel_gt *gt, struct dentry *root);
+void intel_gt_pm_frequency_dump(struct intel_gt *gt, struct drm_printer *m);
 
 #endif /* INTEL_GT_PM_DEBUGFS_H */
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 04351a851586..9f2cfcf7aa6a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -32,13 +32,14 @@
 #include <drm/drm_debugfs.h>
 
 #include "gem/i915_gem_context.h"
+#include "gt/intel_gt.h"
 #include "gt/intel_gt_buffer_pool.h"
 #include "gt/intel_gt_clock_utils.h"
-#include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
+#include "gt/intel_gt_pm_debugfs.h"
 #include "gt/intel_gt_requests.h"
-#include "gt/intel_reset.h"
 #include "gt/intel_rc6.h"
+#include "gt/intel_reset.h"
 #include "gt/intel_rps.h"
 #include "gt/intel_sseu_debugfs.h"
 
@@ -354,230 +355,12 @@ static const struct file_operations i915_error_state_fops = {
 
 static int i915_frequency_info(struct seq_file *m, void *unused)
 {
-	struct drm_i915_private *dev_priv = node_to_i915(m->private);
-	struct intel_uncore *uncore = &dev_priv->uncore;
-	struct intel_rps *rps = &dev_priv->gt.rps;
-	intel_wakeref_t wakeref;
-
-	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
-
-	if (GRAPHICS_VER(dev_priv) == 5) {
-		u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
-		u16 rgvstat = intel_uncore_read16(uncore, MEMSTAT_ILK);
-
-		seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
-		seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
-		seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
-			   MEMSTAT_VID_SHIFT);
-		seq_printf(m, "Current P-state: %d\n",
-			   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
-	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
-		u32 rpmodectl, freq_sts;
-
-		rpmodectl = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CONTROL);
-		seq_printf(m, "Video Turbo Mode: %s\n",
-			   yesno(rpmodectl & GEN6_RP_MEDIA_TURBO));
-		seq_printf(m, "HW control enabled: %s\n",
-			   yesno(rpmodectl & GEN6_RP_ENABLE));
-		seq_printf(m, "SW control enabled: %s\n",
-			   yesno((rpmodectl & GEN6_RP_MEDIA_MODE_MASK) ==
-				  GEN6_RP_MEDIA_SW_MODE));
-
-		vlv_punit_get(dev_priv);
-		freq_sts = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
-		vlv_punit_put(dev_priv);
-
-		seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
-		seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
-
-		seq_printf(m, "actual GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, (freq_sts >> 8) & 0xff));
-
-		seq_printf(m, "current GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->cur_freq));
-
-		seq_printf(m, "max GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->max_freq));
-
-		seq_printf(m, "min GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->min_freq));
-
-		seq_printf(m, "idle GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->idle_freq));
-
-		seq_printf(m,
-			   "efficient (RPe) frequency: %d MHz\n",
-			   intel_gpu_freq(rps, rps->efficient_freq));
-	} else if (GRAPHICS_VER(dev_priv) >= 6) {
-		u32 rp_state_limits;
-		u32 gt_perf_status;
-		u32 rp_state_cap;
-		u32 rpmodectl, rpinclimit, rpdeclimit;
-		u32 rpstat, cagf, reqf;
-		u32 rpupei, rpcurup, rpprevup;
-		u32 rpdownei, rpcurdown, rpprevdown;
-		u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask;
-		int max_freq;
-
-		rp_state_limits = intel_uncore_read(&dev_priv->uncore, GEN6_RP_STATE_LIMITS);
-		rp_state_cap = intel_rps_read_state_cap(rps);
-		if (IS_GEN9_LP(dev_priv))
-			gt_perf_status = intel_uncore_read(&dev_priv->uncore, BXT_GT_PERF_STATUS);
-		else
-			gt_perf_status = intel_uncore_read(&dev_priv->uncore, GEN6_GT_PERF_STATUS);
-
-		/* RPSTAT1 is in the GT power well */
-		intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
-
-		reqf = intel_uncore_read(&dev_priv->uncore, GEN6_RPNSWREQ);
-		if (GRAPHICS_VER(dev_priv) >= 9)
-			reqf >>= 23;
-		else {
-			reqf &= ~GEN6_TURBO_DISABLE;
-			if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
-				reqf >>= 24;
-			else
-				reqf >>= 25;
-		}
-		reqf = intel_gpu_freq(rps, reqf);
-
-		rpmodectl = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CONTROL);
-		rpinclimit = intel_uncore_read(&dev_priv->uncore, GEN6_RP_UP_THRESHOLD);
-		rpdeclimit = intel_uncore_read(&dev_priv->uncore, GEN6_RP_DOWN_THRESHOLD);
-
-		rpstat = intel_uncore_read(&dev_priv->uncore, GEN6_RPSTAT1);
-		rpupei = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CUR_UP_EI) & GEN6_CURICONT_MASK;
-		rpcurup = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CUR_UP) & GEN6_CURBSYTAVG_MASK;
-		rpprevup = intel_uncore_read(&dev_priv->uncore, GEN6_RP_PREV_UP) & GEN6_CURBSYTAVG_MASK;
-		rpdownei = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CUR_DOWN_EI) & GEN6_CURIAVG_MASK;
-		rpcurdown = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CUR_DOWN) & GEN6_CURBSYTAVG_MASK;
-		rpprevdown = intel_uncore_read(&dev_priv->uncore, GEN6_RP_PREV_DOWN) & GEN6_CURBSYTAVG_MASK;
-		cagf = intel_rps_read_actual_frequency(rps);
-
-		intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
-
-		if (GRAPHICS_VER(dev_priv) >= 11) {
-			pm_ier = intel_uncore_read(&dev_priv->uncore, GEN11_GPM_WGBOXPERF_INTR_ENABLE);
-			pm_imr = intel_uncore_read(&dev_priv->uncore, GEN11_GPM_WGBOXPERF_INTR_MASK);
-			/*
-			 * The equivalent to the PM ISR & IIR cannot be read
-			 * without affecting the current state of the system
-			 */
-			pm_isr = 0;
-			pm_iir = 0;
-		} else if (GRAPHICS_VER(dev_priv) >= 8) {
-			pm_ier = intel_uncore_read(&dev_priv->uncore, GEN8_GT_IER(2));
-			pm_imr = intel_uncore_read(&dev_priv->uncore, GEN8_GT_IMR(2));
-			pm_isr = intel_uncore_read(&dev_priv->uncore, GEN8_GT_ISR(2));
-			pm_iir = intel_uncore_read(&dev_priv->uncore, GEN8_GT_IIR(2));
-		} else {
-			pm_ier = intel_uncore_read(&dev_priv->uncore, GEN6_PMIER);
-			pm_imr = intel_uncore_read(&dev_priv->uncore, GEN6_PMIMR);
-			pm_isr = intel_uncore_read(&dev_priv->uncore, GEN6_PMISR);
-			pm_iir = intel_uncore_read(&dev_priv->uncore, GEN6_PMIIR);
-		}
-		pm_mask = intel_uncore_read(&dev_priv->uncore, GEN6_PMINTRMSK);
-
-		seq_printf(m, "Video Turbo Mode: %s\n",
-			   yesno(rpmodectl & GEN6_RP_MEDIA_TURBO));
-		seq_printf(m, "HW control enabled: %s\n",
-			   yesno(rpmodectl & GEN6_RP_ENABLE));
-		seq_printf(m, "SW control enabled: %s\n",
-			   yesno((rpmodectl & GEN6_RP_MEDIA_MODE_MASK) ==
-				  GEN6_RP_MEDIA_SW_MODE));
-
-		seq_printf(m, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n",
-			   pm_ier, pm_imr, pm_mask);
-		if (GRAPHICS_VER(dev_priv) <= 10)
-			seq_printf(m, "PM ISR=0x%08x IIR=0x%08x\n",
-				   pm_isr, pm_iir);
-		seq_printf(m, "pm_intrmsk_mbz: 0x%08x\n",
-			   rps->pm_intrmsk_mbz);
-		seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
-		seq_printf(m, "Render p-state ratio: %d\n",
-			   (gt_perf_status & (GRAPHICS_VER(dev_priv) >= 9 ? 0x1ff00 : 0xff00)) >> 8);
-		seq_printf(m, "Render p-state VID: %d\n",
-			   gt_perf_status & 0xff);
-		seq_printf(m, "Render p-state limit: %d\n",
-			   rp_state_limits & 0xff);
-		seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
-		seq_printf(m, "RPMODECTL: 0x%08x\n", rpmodectl);
-		seq_printf(m, "RPINCLIMIT: 0x%08x\n", rpinclimit);
-		seq_printf(m, "RPDECLIMIT: 0x%08x\n", rpdeclimit);
-		seq_printf(m, "RPNSWREQ: %dMHz\n", reqf);
-		seq_printf(m, "CAGF: %dMHz\n", cagf);
-		seq_printf(m, "RP CUR UP EI: %d (%lldns)\n",
-			   rpupei,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt, rpupei));
-		seq_printf(m, "RP CUR UP: %d (%lldun)\n",
-			   rpcurup,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt, rpcurup));
-		seq_printf(m, "RP PREV UP: %d (%lldns)\n",
-			   rpprevup,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt, rpprevup));
-		seq_printf(m, "Up threshold: %d%%\n",
-			   rps->power.up_threshold);
-
-		seq_printf(m, "RP CUR DOWN EI: %d (%lldns)\n",
-			   rpdownei,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt,
-						      rpdownei));
-		seq_printf(m, "RP CUR DOWN: %d (%lldns)\n",
-			   rpcurdown,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt,
-						      rpcurdown));
-		seq_printf(m, "RP PREV DOWN: %d (%lldns)\n",
-			   rpprevdown,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt,
-						      rpprevdown));
-		seq_printf(m, "Down threshold: %d%%\n",
-			   rps->power.down_threshold);
-
-		max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 0 :
-			    rp_state_cap >> 16) & 0xff;
-		max_freq *= (IS_GEN9_BC(dev_priv) ||
-			     GRAPHICS_VER(dev_priv) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
-			   intel_gpu_freq(rps, max_freq));
-
-		max_freq = (rp_state_cap & 0xff00) >> 8;
-		max_freq *= (IS_GEN9_BC(dev_priv) ||
-			     GRAPHICS_VER(dev_priv) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
-			   intel_gpu_freq(rps, max_freq));
-
-		max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 16 :
-			    rp_state_cap >> 0) & 0xff;
-		max_freq *= (IS_GEN9_BC(dev_priv) ||
-			     GRAPHICS_VER(dev_priv) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
-			   intel_gpu_freq(rps, max_freq));
-		seq_printf(m, "Max overclocked frequency: %dMHz\n",
-			   intel_gpu_freq(rps, rps->max_freq));
-
-		seq_printf(m, "Current freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->cur_freq));
-		seq_printf(m, "Actual freq: %d MHz\n", cagf);
-		seq_printf(m, "Idle freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->idle_freq));
-		seq_printf(m, "Min freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->min_freq));
-		seq_printf(m, "Boost freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->boost_freq));
-		seq_printf(m, "Max freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->max_freq));
-		seq_printf(m,
-			   "efficient (RPe) frequency: %d MHz\n",
-			   intel_gpu_freq(rps, rps->efficient_freq));
-	} else {
-		seq_puts(m, "no P-state info available\n");
-	}
+	struct drm_i915_private *i915 = node_to_i915(m->private);
+	struct intel_gt *gt = &i915->gt;
+	struct drm_printer p = drm_seq_file_printer(m);
 
-	seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk.hw.cdclk);
-	seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq);
-	seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq);
+	intel_gt_pm_frequency_dump(gt, &p);
 
-	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
 	return 0;
 }
 
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 23+ messages in thread
* [PATCH 4/4] drm/i915: deduplicate frequency dump on debugfs
@ 2021-09-09  0:49   ` Lucas De Marchi
  0 siblings, 0 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-09  0:49 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

Although commit 9dd4b065446a ("drm/i915/gt: Move pm debug files into a
gt aware debugfs") says it was moving debug files to gt/, the
i915_frequency_info file was left behind and its implementation copied
into drivers/gpu/drm/i915/gt/debugfs_gt_pm.c. Over time we had several
patches having to change both places to keep them in sync (and some
patches failing to do so). The initial idea was to remove
i915_frequency_info, but there are user space tools using it. From a
quick code search there are other scripts and test tools besides igt, so
it's not simply updating igt to get rid of the older file.

Here we export a function using drm_printer as parameter and make
both show() implementations to call this same function. Aside from a few
variable name differences, for i915_frequency_info this brings a few
lines that were not previously printed: RP UP EI, RP UP THRESHOLD, RP
DOWN THRESHOLD and RP DOWN EI.  These came in as part of
commit 9c878557b1eb ("drm/i915/gt: Use the RPM config register to
determine clk frequencies"), which didn't change both places.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 127 +++++-----
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h |   2 +
 drivers/gpu/drm/i915/i915_debugfs.c           | 231 +-----------------
 3 files changed, 76 insertions(+), 284 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
index baca153c05dd..31d334d3b3b5 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
@@ -240,9 +240,8 @@ static int drpc_show(struct seq_file *m, void *unused)
 }
 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(drpc);
 
-static int frequency_show(struct seq_file *m, void *unused)
+void intel_gt_pm_frequency_dump(struct intel_gt *gt, struct drm_printer *p)
 {
-	struct intel_gt *gt = m->private;
 	struct drm_i915_private *i915 = gt->i915;
 	struct intel_uncore *uncore = gt->uncore;
 	struct intel_rps *rps = &gt->rps;
@@ -254,21 +253,21 @@ static int frequency_show(struct seq_file *m, void *unused)
 		u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
 		u16 rgvstat = intel_uncore_read16(uncore, MEMSTAT_ILK);
 
-		seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
-		seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
-		seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
+		drm_printf(p, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
+		drm_printf(p, "Requested VID: %d\n", rgvswctl & 0x3f);
+		drm_printf(p, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
 			   MEMSTAT_VID_SHIFT);
-		seq_printf(m, "Current P-state: %d\n",
+		drm_printf(p, "Current P-state: %d\n",
 			   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
 	} else if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
 		u32 rpmodectl, freq_sts;
 
 		rpmodectl = intel_uncore_read(uncore, GEN6_RP_CONTROL);
-		seq_printf(m, "Video Turbo Mode: %s\n",
+		drm_printf(p, "Video Turbo Mode: %s\n",
 			   yesno(rpmodectl & GEN6_RP_MEDIA_TURBO));
-		seq_printf(m, "HW control enabled: %s\n",
+		drm_printf(p, "HW control enabled: %s\n",
 			   yesno(rpmodectl & GEN6_RP_ENABLE));
-		seq_printf(m, "SW control enabled: %s\n",
+		drm_printf(p, "SW control enabled: %s\n",
 			   yesno((rpmodectl & GEN6_RP_MEDIA_MODE_MASK) ==
 				 GEN6_RP_MEDIA_SW_MODE));
 
@@ -276,25 +275,25 @@ static int frequency_show(struct seq_file *m, void *unused)
 		freq_sts = vlv_punit_read(i915, PUNIT_REG_GPU_FREQ_STS);
 		vlv_punit_put(i915);
 
-		seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
-		seq_printf(m, "DDR freq: %d MHz\n", i915->mem_freq);
+		drm_printf(p, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
+		drm_printf(p, "DDR freq: %d MHz\n", i915->mem_freq);
 
-		seq_printf(m, "actual GPU freq: %d MHz\n",
+		drm_printf(p, "actual GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, (freq_sts >> 8) & 0xff));
 
-		seq_printf(m, "current GPU freq: %d MHz\n",
+		drm_printf(p, "current GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->cur_freq));
 
-		seq_printf(m, "max GPU freq: %d MHz\n",
+		drm_printf(p, "max GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->max_freq));
 
-		seq_printf(m, "min GPU freq: %d MHz\n",
+		drm_printf(p, "min GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->min_freq));
 
-		seq_printf(m, "idle GPU freq: %d MHz\n",
+		drm_printf(p, "idle GPU freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->idle_freq));
 
-		seq_printf(m, "efficient (RPe) frequency: %d MHz\n",
+		drm_printf(p, "efficient (RPe) frequency: %d MHz\n",
 			   intel_gpu_freq(rps, rps->efficient_freq));
 	} else if (GRAPHICS_VER(i915) >= 6) {
 		u32 rp_state_limits;
@@ -374,109 +373,117 @@ static int frequency_show(struct seq_file *m, void *unused)
 		}
 		pm_mask = intel_uncore_read(uncore, GEN6_PMINTRMSK);
 
-		seq_printf(m, "Video Turbo Mode: %s\n",
+		drm_printf(p, "Video Turbo Mode: %s\n",
 			   yesno(rpmodectl & GEN6_RP_MEDIA_TURBO));
-		seq_printf(m, "HW control enabled: %s\n",
+		drm_printf(p, "HW control enabled: %s\n",
 			   yesno(rpmodectl & GEN6_RP_ENABLE));
-		seq_printf(m, "SW control enabled: %s\n",
+		drm_printf(p, "SW control enabled: %s\n",
 			   yesno((rpmodectl & GEN6_RP_MEDIA_MODE_MASK) ==
 				 GEN6_RP_MEDIA_SW_MODE));
 
-		seq_printf(m, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n",
+		drm_printf(p, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n",
 			   pm_ier, pm_imr, pm_mask);
 		if (GRAPHICS_VER(i915) <= 10)
-			seq_printf(m, "PM ISR=0x%08x IIR=0x%08x\n",
+			drm_printf(p, "PM ISR=0x%08x IIR=0x%08x\n",
 				   pm_isr, pm_iir);
-		seq_printf(m, "pm_intrmsk_mbz: 0x%08x\n",
+		drm_printf(p, "pm_intrmsk_mbz: 0x%08x\n",
 			   rps->pm_intrmsk_mbz);
-		seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
-		seq_printf(m, "Render p-state ratio: %d\n",
+		drm_printf(p, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
+		drm_printf(p, "Render p-state ratio: %d\n",
 			   (gt_perf_status & (GRAPHICS_VER(i915) >= 9 ? 0x1ff00 : 0xff00)) >> 8);
-		seq_printf(m, "Render p-state VID: %d\n",
+		drm_printf(p, "Render p-state VID: %d\n",
 			   gt_perf_status & 0xff);
-		seq_printf(m, "Render p-state limit: %d\n",
+		drm_printf(p, "Render p-state limit: %d\n",
 			   rp_state_limits & 0xff);
-		seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
-		seq_printf(m, "RPMODECTL: 0x%08x\n", rpmodectl);
-		seq_printf(m, "RPINCLIMIT: 0x%08x\n", rpinclimit);
-		seq_printf(m, "RPDECLIMIT: 0x%08x\n", rpdeclimit);
-		seq_printf(m, "RPNSWREQ: %dMHz\n", reqf);
-		seq_printf(m, "CAGF: %dMHz\n", cagf);
-		seq_printf(m, "RP CUR UP EI: %d (%lldns)\n",
+		drm_printf(p, "RPSTAT1: 0x%08x\n", rpstat);
+		drm_printf(p, "RPMODECTL: 0x%08x\n", rpmodectl);
+		drm_printf(p, "RPINCLIMIT: 0x%08x\n", rpinclimit);
+		drm_printf(p, "RPDECLIMIT: 0x%08x\n", rpdeclimit);
+		drm_printf(p, "RPNSWREQ: %dMHz\n", reqf);
+		drm_printf(p, "CAGF: %dMHz\n", cagf);
+		drm_printf(p, "RP CUR UP EI: %d (%lldns)\n",
 			   rpcurupei,
 			   intel_gt_pm_interval_to_ns(gt, rpcurupei));
-		seq_printf(m, "RP CUR UP: %d (%lldns)\n",
+		drm_printf(p, "RP CUR UP: %d (%lldns)\n",
 			   rpcurup, intel_gt_pm_interval_to_ns(gt, rpcurup));
-		seq_printf(m, "RP PREV UP: %d (%lldns)\n",
+		drm_printf(p, "RP PREV UP: %d (%lldns)\n",
 			   rpprevup, intel_gt_pm_interval_to_ns(gt, rpprevup));
-		seq_printf(m, "Up threshold: %d%%\n",
+		drm_printf(p, "Up threshold: %d%%\n",
 			   rps->power.up_threshold);
-		seq_printf(m, "RP UP EI: %d (%lldns)\n",
+		drm_printf(p, "RP UP EI: %d (%lldns)\n",
 			   rpupei, intel_gt_pm_interval_to_ns(gt, rpupei));
-		seq_printf(m, "RP UP THRESHOLD: %d (%lldns)\n",
+		drm_printf(p, "RP UP THRESHOLD: %d (%lldns)\n",
 			   rpupt, intel_gt_pm_interval_to_ns(gt, rpupt));
 
-		seq_printf(m, "RP CUR DOWN EI: %d (%lldns)\n",
+		drm_printf(p, "RP CUR DOWN EI: %d (%lldns)\n",
 			   rpcurdownei,
 			   intel_gt_pm_interval_to_ns(gt, rpcurdownei));
-		seq_printf(m, "RP CUR DOWN: %d (%lldns)\n",
+		drm_printf(p, "RP CUR DOWN: %d (%lldns)\n",
 			   rpcurdown,
 			   intel_gt_pm_interval_to_ns(gt, rpcurdown));
-		seq_printf(m, "RP PREV DOWN: %d (%lldns)\n",
+		drm_printf(p, "RP PREV DOWN: %d (%lldns)\n",
 			   rpprevdown,
 			   intel_gt_pm_interval_to_ns(gt, rpprevdown));
-		seq_printf(m, "Down threshold: %d%%\n",
+		drm_printf(p, "Down threshold: %d%%\n",
 			   rps->power.down_threshold);
-		seq_printf(m, "RP DOWN EI: %d (%lldns)\n",
+		drm_printf(p, "RP DOWN EI: %d (%lldns)\n",
 			   rpdownei, intel_gt_pm_interval_to_ns(gt, rpdownei));
-		seq_printf(m, "RP DOWN THRESHOLD: %d (%lldns)\n",
+		drm_printf(p, "RP DOWN THRESHOLD: %d (%lldns)\n",
 			   rpdownt, intel_gt_pm_interval_to_ns(gt, rpdownt));
 
 		max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 0 :
 			    rp_state_cap >> 16) & 0xff;
 		max_freq *= (IS_GEN9_BC(i915) ||
 			     GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
+		drm_printf(p, "Lowest (RPN) frequency: %dMHz\n",
 			   intel_gpu_freq(rps, max_freq));
 
 		max_freq = (rp_state_cap & 0xff00) >> 8;
 		max_freq *= (IS_GEN9_BC(i915) ||
 			     GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
+		drm_printf(p, "Nominal (RP1) frequency: %dMHz\n",
 			   intel_gpu_freq(rps, max_freq));
 
 		max_freq = (IS_GEN9_LP(i915) ? rp_state_cap >> 16 :
 			    rp_state_cap >> 0) & 0xff;
 		max_freq *= (IS_GEN9_BC(i915) ||
 			     GRAPHICS_VER(i915) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
+		drm_printf(p, "Max non-overclocked (RP0) frequency: %dMHz\n",
 			   intel_gpu_freq(rps, max_freq));
-		seq_printf(m, "Max overclocked frequency: %dMHz\n",
+		drm_printf(p, "Max overclocked frequency: %dMHz\n",
 			   intel_gpu_freq(rps, rps->max_freq));
 
-		seq_printf(m, "Current freq: %d MHz\n",
+		drm_printf(p, "Current freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->cur_freq));
-		seq_printf(m, "Actual freq: %d MHz\n", cagf);
-		seq_printf(m, "Idle freq: %d MHz\n",
+		drm_printf(p, "Actual freq: %d MHz\n", cagf);
+		drm_printf(p, "Idle freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->idle_freq));
-		seq_printf(m, "Min freq: %d MHz\n",
+		drm_printf(p, "Min freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->min_freq));
-		seq_printf(m, "Boost freq: %d MHz\n",
+		drm_printf(p, "Boost freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->boost_freq));
-		seq_printf(m, "Max freq: %d MHz\n",
+		drm_printf(p, "Max freq: %d MHz\n",
 			   intel_gpu_freq(rps, rps->max_freq));
-		seq_printf(m,
+		drm_printf(p,
 			   "efficient (RPe) frequency: %d MHz\n",
 			   intel_gpu_freq(rps, rps->efficient_freq));
 	} else {
-		seq_puts(m, "no P-state info available\n");
+		drm_puts(p, "no P-state info available\n");
 	}
 
-	seq_printf(m, "Current CD clock frequency: %d kHz\n", i915->cdclk.hw.cdclk);
-	seq_printf(m, "Max CD clock frequency: %d kHz\n", i915->max_cdclk_freq);
-	seq_printf(m, "Max pixel clock frequency: %d kHz\n", i915->max_dotclk_freq);
+	drm_printf(p, "Current CD clock frequency: %d kHz\n", i915->cdclk.hw.cdclk);
+	drm_printf(p, "Max CD clock frequency: %d kHz\n", i915->max_cdclk_freq);
+	drm_printf(p, "Max pixel clock frequency: %d kHz\n", i915->max_dotclk_freq);
 
 	intel_runtime_pm_put(uncore->rpm, wakeref);
+}
+
+static int frequency_show(struct seq_file *m, void *unused)
+{
+	struct intel_gt *gt = m->private;
+	struct drm_printer p = drm_seq_file_printer(m);
+
+	intel_gt_pm_frequency_dump(gt, &p);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
index f44894579604..98065e2da93b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
@@ -8,7 +8,9 @@
 
 struct intel_gt;
 struct dentry;
+struct drm_printer;
 
 void intel_gt_pm_register_debugfs(struct intel_gt *gt, struct dentry *root);
+void intel_gt_pm_frequency_dump(struct intel_gt *gt, struct drm_printer *m);
 
 #endif /* INTEL_GT_PM_DEBUGFS_H */
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 04351a851586..9f2cfcf7aa6a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -32,13 +32,14 @@
 #include <drm/drm_debugfs.h>
 
 #include "gem/i915_gem_context.h"
+#include "gt/intel_gt.h"
 #include "gt/intel_gt_buffer_pool.h"
 #include "gt/intel_gt_clock_utils.h"
-#include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
+#include "gt/intel_gt_pm_debugfs.h"
 #include "gt/intel_gt_requests.h"
-#include "gt/intel_reset.h"
 #include "gt/intel_rc6.h"
+#include "gt/intel_reset.h"
 #include "gt/intel_rps.h"
 #include "gt/intel_sseu_debugfs.h"
 
@@ -354,230 +355,12 @@ static const struct file_operations i915_error_state_fops = {
 
 static int i915_frequency_info(struct seq_file *m, void *unused)
 {
-	struct drm_i915_private *dev_priv = node_to_i915(m->private);
-	struct intel_uncore *uncore = &dev_priv->uncore;
-	struct intel_rps *rps = &dev_priv->gt.rps;
-	intel_wakeref_t wakeref;
-
-	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
-
-	if (GRAPHICS_VER(dev_priv) == 5) {
-		u16 rgvswctl = intel_uncore_read16(uncore, MEMSWCTL);
-		u16 rgvstat = intel_uncore_read16(uncore, MEMSTAT_ILK);
-
-		seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
-		seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
-		seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
-			   MEMSTAT_VID_SHIFT);
-		seq_printf(m, "Current P-state: %d\n",
-			   (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
-	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
-		u32 rpmodectl, freq_sts;
-
-		rpmodectl = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CONTROL);
-		seq_printf(m, "Video Turbo Mode: %s\n",
-			   yesno(rpmodectl & GEN6_RP_MEDIA_TURBO));
-		seq_printf(m, "HW control enabled: %s\n",
-			   yesno(rpmodectl & GEN6_RP_ENABLE));
-		seq_printf(m, "SW control enabled: %s\n",
-			   yesno((rpmodectl & GEN6_RP_MEDIA_MODE_MASK) ==
-				  GEN6_RP_MEDIA_SW_MODE));
-
-		vlv_punit_get(dev_priv);
-		freq_sts = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
-		vlv_punit_put(dev_priv);
-
-		seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
-		seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
-
-		seq_printf(m, "actual GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, (freq_sts >> 8) & 0xff));
-
-		seq_printf(m, "current GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->cur_freq));
-
-		seq_printf(m, "max GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->max_freq));
-
-		seq_printf(m, "min GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->min_freq));
-
-		seq_printf(m, "idle GPU freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->idle_freq));
-
-		seq_printf(m,
-			   "efficient (RPe) frequency: %d MHz\n",
-			   intel_gpu_freq(rps, rps->efficient_freq));
-	} else if (GRAPHICS_VER(dev_priv) >= 6) {
-		u32 rp_state_limits;
-		u32 gt_perf_status;
-		u32 rp_state_cap;
-		u32 rpmodectl, rpinclimit, rpdeclimit;
-		u32 rpstat, cagf, reqf;
-		u32 rpupei, rpcurup, rpprevup;
-		u32 rpdownei, rpcurdown, rpprevdown;
-		u32 pm_ier, pm_imr, pm_isr, pm_iir, pm_mask;
-		int max_freq;
-
-		rp_state_limits = intel_uncore_read(&dev_priv->uncore, GEN6_RP_STATE_LIMITS);
-		rp_state_cap = intel_rps_read_state_cap(rps);
-		if (IS_GEN9_LP(dev_priv))
-			gt_perf_status = intel_uncore_read(&dev_priv->uncore, BXT_GT_PERF_STATUS);
-		else
-			gt_perf_status = intel_uncore_read(&dev_priv->uncore, GEN6_GT_PERF_STATUS);
-
-		/* RPSTAT1 is in the GT power well */
-		intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL);
-
-		reqf = intel_uncore_read(&dev_priv->uncore, GEN6_RPNSWREQ);
-		if (GRAPHICS_VER(dev_priv) >= 9)
-			reqf >>= 23;
-		else {
-			reqf &= ~GEN6_TURBO_DISABLE;
-			if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
-				reqf >>= 24;
-			else
-				reqf >>= 25;
-		}
-		reqf = intel_gpu_freq(rps, reqf);
-
-		rpmodectl = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CONTROL);
-		rpinclimit = intel_uncore_read(&dev_priv->uncore, GEN6_RP_UP_THRESHOLD);
-		rpdeclimit = intel_uncore_read(&dev_priv->uncore, GEN6_RP_DOWN_THRESHOLD);
-
-		rpstat = intel_uncore_read(&dev_priv->uncore, GEN6_RPSTAT1);
-		rpupei = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CUR_UP_EI) & GEN6_CURICONT_MASK;
-		rpcurup = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CUR_UP) & GEN6_CURBSYTAVG_MASK;
-		rpprevup = intel_uncore_read(&dev_priv->uncore, GEN6_RP_PREV_UP) & GEN6_CURBSYTAVG_MASK;
-		rpdownei = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CUR_DOWN_EI) & GEN6_CURIAVG_MASK;
-		rpcurdown = intel_uncore_read(&dev_priv->uncore, GEN6_RP_CUR_DOWN) & GEN6_CURBSYTAVG_MASK;
-		rpprevdown = intel_uncore_read(&dev_priv->uncore, GEN6_RP_PREV_DOWN) & GEN6_CURBSYTAVG_MASK;
-		cagf = intel_rps_read_actual_frequency(rps);
-
-		intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
-
-		if (GRAPHICS_VER(dev_priv) >= 11) {
-			pm_ier = intel_uncore_read(&dev_priv->uncore, GEN11_GPM_WGBOXPERF_INTR_ENABLE);
-			pm_imr = intel_uncore_read(&dev_priv->uncore, GEN11_GPM_WGBOXPERF_INTR_MASK);
-			/*
-			 * The equivalent to the PM ISR & IIR cannot be read
-			 * without affecting the current state of the system
-			 */
-			pm_isr = 0;
-			pm_iir = 0;
-		} else if (GRAPHICS_VER(dev_priv) >= 8) {
-			pm_ier = intel_uncore_read(&dev_priv->uncore, GEN8_GT_IER(2));
-			pm_imr = intel_uncore_read(&dev_priv->uncore, GEN8_GT_IMR(2));
-			pm_isr = intel_uncore_read(&dev_priv->uncore, GEN8_GT_ISR(2));
-			pm_iir = intel_uncore_read(&dev_priv->uncore, GEN8_GT_IIR(2));
-		} else {
-			pm_ier = intel_uncore_read(&dev_priv->uncore, GEN6_PMIER);
-			pm_imr = intel_uncore_read(&dev_priv->uncore, GEN6_PMIMR);
-			pm_isr = intel_uncore_read(&dev_priv->uncore, GEN6_PMISR);
-			pm_iir = intel_uncore_read(&dev_priv->uncore, GEN6_PMIIR);
-		}
-		pm_mask = intel_uncore_read(&dev_priv->uncore, GEN6_PMINTRMSK);
-
-		seq_printf(m, "Video Turbo Mode: %s\n",
-			   yesno(rpmodectl & GEN6_RP_MEDIA_TURBO));
-		seq_printf(m, "HW control enabled: %s\n",
-			   yesno(rpmodectl & GEN6_RP_ENABLE));
-		seq_printf(m, "SW control enabled: %s\n",
-			   yesno((rpmodectl & GEN6_RP_MEDIA_MODE_MASK) ==
-				  GEN6_RP_MEDIA_SW_MODE));
-
-		seq_printf(m, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n",
-			   pm_ier, pm_imr, pm_mask);
-		if (GRAPHICS_VER(dev_priv) <= 10)
-			seq_printf(m, "PM ISR=0x%08x IIR=0x%08x\n",
-				   pm_isr, pm_iir);
-		seq_printf(m, "pm_intrmsk_mbz: 0x%08x\n",
-			   rps->pm_intrmsk_mbz);
-		seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
-		seq_printf(m, "Render p-state ratio: %d\n",
-			   (gt_perf_status & (GRAPHICS_VER(dev_priv) >= 9 ? 0x1ff00 : 0xff00)) >> 8);
-		seq_printf(m, "Render p-state VID: %d\n",
-			   gt_perf_status & 0xff);
-		seq_printf(m, "Render p-state limit: %d\n",
-			   rp_state_limits & 0xff);
-		seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
-		seq_printf(m, "RPMODECTL: 0x%08x\n", rpmodectl);
-		seq_printf(m, "RPINCLIMIT: 0x%08x\n", rpinclimit);
-		seq_printf(m, "RPDECLIMIT: 0x%08x\n", rpdeclimit);
-		seq_printf(m, "RPNSWREQ: %dMHz\n", reqf);
-		seq_printf(m, "CAGF: %dMHz\n", cagf);
-		seq_printf(m, "RP CUR UP EI: %d (%lldns)\n",
-			   rpupei,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt, rpupei));
-		seq_printf(m, "RP CUR UP: %d (%lldun)\n",
-			   rpcurup,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt, rpcurup));
-		seq_printf(m, "RP PREV UP: %d (%lldns)\n",
-			   rpprevup,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt, rpprevup));
-		seq_printf(m, "Up threshold: %d%%\n",
-			   rps->power.up_threshold);
-
-		seq_printf(m, "RP CUR DOWN EI: %d (%lldns)\n",
-			   rpdownei,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt,
-						      rpdownei));
-		seq_printf(m, "RP CUR DOWN: %d (%lldns)\n",
-			   rpcurdown,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt,
-						      rpcurdown));
-		seq_printf(m, "RP PREV DOWN: %d (%lldns)\n",
-			   rpprevdown,
-			   intel_gt_pm_interval_to_ns(&dev_priv->gt,
-						      rpprevdown));
-		seq_printf(m, "Down threshold: %d%%\n",
-			   rps->power.down_threshold);
-
-		max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 0 :
-			    rp_state_cap >> 16) & 0xff;
-		max_freq *= (IS_GEN9_BC(dev_priv) ||
-			     GRAPHICS_VER(dev_priv) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
-			   intel_gpu_freq(rps, max_freq));
-
-		max_freq = (rp_state_cap & 0xff00) >> 8;
-		max_freq *= (IS_GEN9_BC(dev_priv) ||
-			     GRAPHICS_VER(dev_priv) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
-			   intel_gpu_freq(rps, max_freq));
-
-		max_freq = (IS_GEN9_LP(dev_priv) ? rp_state_cap >> 16 :
-			    rp_state_cap >> 0) & 0xff;
-		max_freq *= (IS_GEN9_BC(dev_priv) ||
-			     GRAPHICS_VER(dev_priv) >= 11 ? GEN9_FREQ_SCALER : 1);
-		seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
-			   intel_gpu_freq(rps, max_freq));
-		seq_printf(m, "Max overclocked frequency: %dMHz\n",
-			   intel_gpu_freq(rps, rps->max_freq));
-
-		seq_printf(m, "Current freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->cur_freq));
-		seq_printf(m, "Actual freq: %d MHz\n", cagf);
-		seq_printf(m, "Idle freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->idle_freq));
-		seq_printf(m, "Min freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->min_freq));
-		seq_printf(m, "Boost freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->boost_freq));
-		seq_printf(m, "Max freq: %d MHz\n",
-			   intel_gpu_freq(rps, rps->max_freq));
-		seq_printf(m,
-			   "efficient (RPe) frequency: %d MHz\n",
-			   intel_gpu_freq(rps, rps->efficient_freq));
-	} else {
-		seq_puts(m, "no P-state info available\n");
-	}
+	struct drm_i915_private *i915 = node_to_i915(m->private);
+	struct intel_gt *gt = &i915->gt;
+	struct drm_printer p = drm_seq_file_printer(m);
 
-	seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk.hw.cdclk);
-	seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq);
-	seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq);
+	intel_gt_pm_frequency_dump(gt, &p);
 
-	intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
 	return 0;
 }
 
-- 
2.32.0


^ permalink raw reply related	[flat|nested] 23+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: rename debugfs_gt files
  2021-09-09  0:49 ` Lucas De Marchi
                   ` (3 preceding siblings ...)
  (?)
@ 2021-09-09  1:06 ` Patchwork
  -1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-09-09  1:06 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915: rename debugfs_gt files
URL   : https://patchwork.freedesktop.org/series/94489/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
dc1cedc411a9 drm/i915: rename debugfs_gt files
-:168: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#168: 
rename from drivers/gpu/drm/i915/gt/debugfs_gt.c

total: 0 errors, 1 warnings, 0 checks, 340 lines checked
bdf1cc706705 drm/i915: rename debugfs_engines files
-:33: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 66 lines checked
139ac6e275d3 drm/i915: rename debugfs_gt_pm files
-:33: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 68 lines checked
9c1930918f14 drm/i915: deduplicate frequency dump on debugfs



^ permalink raw reply	[flat|nested] 23+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: rename debugfs_gt files
  2021-09-09  0:49 ` Lucas De Marchi
                   ` (4 preceding siblings ...)
  (?)
@ 2021-09-09  1:36 ` Patchwork
  -1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-09-09  1:36 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 4225 bytes --]

== Series Details ==

Series: series starting with [1/4] drm/i915: rename debugfs_gt files
URL   : https://patchwork.freedesktop.org/series/94489/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10565 -> Patchwork_20993
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/index.html

Known issues
------------

  Here are the changes found in Patchwork_20993 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@semaphore:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html

  * igt@core_hotunplug@unbind-rebind:
    - fi-bdw-5557u:       NOTRUN -> [WARN][2] ([i915#3718])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_selftest@live@execlists:
    - fi-bsw-n3050:       [PASS][3] -> [INCOMPLETE][4] ([i915#2940])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/fi-bsw-n3050/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-tgl-y:           [PASS][5] -> [DMESG-FAIL][6] ([i915#541])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html

  * igt@runner@aborted:
    - fi-bsw-n3050:       NOTRUN -> [FAIL][8] ([fdo#109271] / [i915#1436] / [i915#2722] / [i915#3428])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/fi-bsw-n3050/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_pm:
    - {fi-jsl-1}:         [DMESG-FAIL][9] ([i915#1886]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/fi-jsl-1/igt@i915_selftest@live@gt_pm.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/fi-jsl-1/igt@i915_selftest@live@gt_pm.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
  [i915#3718]: https://gitlab.freedesktop.org/drm/intel/issues/3718
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541


Participating hosts (47 -> 38)
------------------------------

  Missing    (9): fi-kbl-soraka fi-ilk-m540 bat-adls-5 bat-dg1-6 fi-bsw-cyan bat-adlp-4 fi-ctg-p8600 fi-bdw-samus bat-jsl-1 


Build changes
-------------

  * Linux: CI_DRM_10565 -> Patchwork_20993

  CI-20190529: 20190529
  CI_DRM_10565: 8c3cd60dcfa81a649b14f0705eb5e5c9336f1881 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6201: be0d02ff0775235ead63ccb1e3a1e8c10f0209cf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_20993: 9c1930918f14247079ef11b7af3fbf06488fbb57 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

9c1930918f14 drm/i915: deduplicate frequency dump on debugfs
139ac6e275d3 drm/i915: rename debugfs_gt_pm files
bdf1cc706705 drm/i915: rename debugfs_engines files
dc1cedc411a9 drm/i915: rename debugfs_gt files

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/index.html

[-- Attachment #2: Type: text/html, Size: 5140 bytes --]

^ permalink raw reply	[flat|nested] 23+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915: rename debugfs_gt files
  2021-09-09  0:49 ` Lucas De Marchi
                   ` (5 preceding siblings ...)
  (?)
@ 2021-09-09  2:50 ` Patchwork
  -1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-09-09  2:50 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30283 bytes --]

== Series Details ==

Series: series starting with [1/4] drm/i915: rename debugfs_gt files
URL   : https://patchwork.freedesktop.org/series/94489/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10565_full -> Patchwork_20993_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_20993_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_20993_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_20993_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_endless@dispatch@vcs1:
    - shard-tglb:         [PASS][1] -> [INCOMPLETE][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb7/igt@gem_exec_endless@dispatch@vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb8/igt@gem_exec_endless@dispatch@vcs1.html

  * igt@kms_atomic@plane-cursor-legacy:
    - shard-iclb:         [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb4/igt@kms_atomic@plane-cursor-legacy.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb2/igt@kms_atomic@plane-cursor-legacy.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_eio@hibernate:
    - {shard-rkl}:        [TIMEOUT][5] ([i915#3811]) -> [FAIL][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@gem_eio@hibernate.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-2/igt@gem_eio@hibernate.html

  * igt@gem_flink_race@flink_close:
    - {shard-rkl}:        [PASS][7] -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-6/igt@gem_flink_race@flink_close.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-2/igt@gem_flink_race@flink_close.html

  
Known issues
------------

  Here are the changes found in Patchwork_20993_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-massive:
    - shard-apl:          NOTRUN -> [DMESG-WARN][9] ([i915#3002])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl6/igt@gem_create@create-massive.html

  * igt@gem_ctx_persistence@smoketest:
    - shard-snb:          NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-snb5/igt@gem_ctx_persistence@smoketest.html

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-iclb:         [PASS][11] -> [TIMEOUT][12] ([i915#3070])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb4/igt@gem_eio@in-flight-contexts-10ms.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb3/igt@gem_eio@in-flight-contexts-10ms.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-tglb:         [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb3/igt@gem_exec_fair@basic-pace@vcs1.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb3/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-kbl:          [PASS][15] -> [FAIL][16] ([i915#2842])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl2/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-snb:          NOTRUN -> [SKIP][17] ([fdo#109271]) +250 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-snb7/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_gttfill@all:
    - shard-glk:          [PASS][18] -> [DMESG-WARN][19] ([i915#118] / [i915#95])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-glk6/igt@gem_exec_gttfill@all.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-glk4/igt@gem_exec_gttfill@all.html

  * igt@gem_mmap_gtt@cpuset-medium-copy:
    - shard-skl:          [PASS][20] -> [DMESG-WARN][21] ([i915#1982])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl6/igt@gem_mmap_gtt@cpuset-medium-copy.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl6/igt@gem_mmap_gtt@cpuset-medium-copy.html

  * igt@gem_render_copy@linear-to-vebox-y-tiled:
    - shard-glk:          NOTRUN -> [SKIP][22] ([fdo#109271]) +3 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-glk7/igt@gem_render_copy@linear-to-vebox-y-tiled.html
    - shard-iclb:         NOTRUN -> [SKIP][23] ([i915#768])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@gem_render_copy@linear-to-vebox-y-tiled.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-tglb:         NOTRUN -> [SKIP][24] ([i915#3297])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb1/igt@gem_userptr_blits@dmabuf-unsync.html
    - shard-iclb:         NOTRUN -> [SKIP][25] ([i915#3297])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@input-checking:
    - shard-snb:          NOTRUN -> [DMESG-WARN][26] ([i915#3002])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-snb6/igt@gem_userptr_blits@input-checking.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [PASS][27] -> [FAIL][28] ([i915#454])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          NOTRUN -> [DMESG-WARN][29] ([i915#180])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl7/igt@i915_suspend@sysfs-reader.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-skl:          [PASS][30] -> [FAIL][31] ([i915#2521])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl5/igt@kms_async_flips@alternate-sync-async-flip.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl1/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-90:
    - shard-skl:          NOTRUN -> [DMESG-WARN][32] ([i915#1982])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl4/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][33] ([fdo#110725] / [fdo#111614])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
    - shard-iclb:         NOTRUN -> [SKIP][34] ([fdo#110723])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@kms_big_fb@yf-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-tglb:         NOTRUN -> [SKIP][35] ([fdo#111615])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb5/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3777]) +3 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][37] ([i915#3722])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
    - shard-skl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3886])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl4/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886]) +9 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl7/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - shard-glk:          NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3886])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-glk7/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
    - shard-iclb:         NOTRUN -> [SKIP][41] ([fdo#109278] / [i915#3886])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-d-bad-rotation-90-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][42] ([i915#3689]) +1 similar issue
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb8/igt@kms_ccs@pipe-d-bad-rotation-90-y_tiled_gen12_mc_ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-apl:          NOTRUN -> [SKIP][43] ([fdo#109271]) +269 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl2/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium@vga-hpd:
    - shard-apl:          NOTRUN -> [SKIP][44] ([fdo#109271] / [fdo#111827]) +22 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl2/igt@kms_chamelium@vga-hpd.html

  * igt@kms_color_chamelium@pipe-a-ctm-negative:
    - shard-kbl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [fdo#111827])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl3/igt@kms_color_chamelium@pipe-a-ctm-negative.html

  * igt@kms_color_chamelium@pipe-b-gamma:
    - shard-iclb:         NOTRUN -> [SKIP][46] ([fdo#109284] / [fdo#111827]) +1 similar issue
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@kms_color_chamelium@pipe-b-gamma.html
    - shard-glk:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-glk7/igt@kms_color_chamelium@pipe-b-gamma.html

  * igt@kms_color_chamelium@pipe-d-ctm-0-25:
    - shard-skl:          NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl9/igt@kms_color_chamelium@pipe-d-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-d-ctm-blue-to-red:
    - shard-tglb:         NOTRUN -> [SKIP][49] ([fdo#109284] / [fdo#111827]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb8/igt@kms_color_chamelium@pipe-d-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes:
    - shard-snb:          NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-snb5/igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes.html

  * igt@kms_content_protection@srm:
    - shard-apl:          NOTRUN -> [TIMEOUT][51] ([i915#1319])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl7/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@pipe-a-cursor-32x10-random:
    - shard-tglb:         NOTRUN -> [SKIP][52] ([i915#3359])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb5/igt@kms_cursor_crc@pipe-a-cursor-32x10-random.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][53] ([i915#3319])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb1/igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement.html

  * igt@kms_cursor_crc@pipe-d-cursor-dpms:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([fdo#109278]) +4 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@kms_cursor_crc@pipe-d-cursor-dpms.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
    - shard-iclb:         NOTRUN -> [SKIP][55] ([fdo#109274] / [fdo#109278])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-skl:          [PASS][56] -> [FAIL][57] ([i915#2346])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@pipe-d-single-bo:
    - shard-skl:          NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#533])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl4/igt@kms_cursor_legacy@pipe-d-single-bo.html

  * igt@kms_cursor_legacy@pipe-d-torture-bo:
    - shard-apl:          NOTRUN -> [SKIP][59] ([fdo#109271] / [i915#533])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl2/igt@kms_cursor_legacy@pipe-d-torture-bo.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-skl:          [PASS][60] -> [FAIL][61] ([i915#79])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl6/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-kbl:          [PASS][62] -> [DMESG-WARN][63] ([i915#180])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
    - shard-tglb:         [PASS][64] -> [INCOMPLETE][65] ([i915#2411] / [i915#456])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb1/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb7/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
    - shard-skl:          [PASS][66] -> [FAIL][67] ([i915#2122]) +1 similar issue
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
    - shard-apl:          NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#2672])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
    - shard-iclb:         NOTRUN -> [SKIP][69] ([fdo#109280]) +5 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite:
    - shard-tglb:         NOTRUN -> [SKIP][70] ([fdo#111825]) +5 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-skl:          NOTRUN -> [SKIP][71] ([fdo#109271]) +47 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render:
    - shard-kbl:          NOTRUN -> [SKIP][72] ([fdo#109271]) +10 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-render.html

  * igt@kms_hdr@static-toggle:
    - shard-tglb:         NOTRUN -> [SKIP][73] ([i915#1187])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb8/igt@kms_hdr@static-toggle.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-tglb:         [PASS][74] -> [INCOMPLETE][75] ([i915#456])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb5/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][76] ([fdo#108145] / [i915#265]) +3 similar issues
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb:
    - shard-apl:          NOTRUN -> [FAIL][77] ([i915#265])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][78] ([fdo#108145] / [i915#265])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][79] -> [FAIL][80] ([fdo#108145] / [i915#265]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-b-tiling-x:
    - shard-iclb:         NOTRUN -> [SKIP][81] ([i915#3536])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@kms_plane_lowres@pipe-b-tiling-x.html

  * igt@kms_psr2_sf@cursor-plane-update-sf:
    - shard-tglb:         NOTRUN -> [SKIP][82] ([i915#2920]) +1 similar issue
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb6/igt@kms_psr2_sf@cursor-plane-update-sf.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
    - shard-kbl:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#658])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3:
    - shard-apl:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#658]) +3 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-iclb:         NOTRUN -> [SKIP][85] ([i915#658])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [PASS][86] -> [SKIP][87] ([fdo#109441])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb8/igt@kms_psr@psr2_primary_page_flip.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-kbl:          NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#2437])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl3/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@perf@polling-parameterized:
    - shard-skl:          NOTRUN -> [FAIL][89] ([i915#1542])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl4/igt@perf@polling-parameterized.html

  * igt@sysfs_clients@pidname:
    - shard-apl:          NOTRUN -> [SKIP][90] ([fdo#109271] / [i915#2994]) +4 similar issues
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-apl7/igt@sysfs_clients@pidname.html

  * igt@sysfs_clients@split-50:
    - shard-skl:          NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#2994])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl4/igt@sysfs_clients@split-50.html

  
#### Possible fixes ####

  * igt@fbdev@nullptr:
    - {shard-rkl}:        [SKIP][92] ([i915#2582]) -> [PASS][93]
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@fbdev@nullptr.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@fbdev@nullptr.html

  * igt@gem_eio@unwedge-stress:
    - {shard-rkl}:        [FAIL][94] ([i915#3115]) -> [PASS][95]
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-2/igt@gem_eio@unwedge-stress.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-1/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - {shard-rkl}:        [FAIL][96] ([i915#2842]) -> [PASS][97] +1 similar issue
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-iclb:         [FAIL][98] ([i915#2842]) -> [PASS][99]
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb2/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb1/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-kbl:          [SKIP][100] ([fdo#109271]) -> [PASS][101] +1 similar issue
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl6/igt@gem_exec_fair@basic-pace@rcs0.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl2/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
    - shard-kbl:          [FAIL][102] ([i915#2842]) -> [PASS][103]
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs0.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs0.html
    - shard-tglb:         [FAIL][104] ([i915#2842]) -> [PASS][105]
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb3/igt@gem_exec_fair@basic-pace@vcs0.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb3/igt@gem_exec_fair@basic-pace@vcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-iclb:         [FAIL][106] ([i915#2849]) -> [PASS][107]
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_workarounds@suspend-resume:
    - shard-tglb:         [INCOMPLETE][108] ([i915#456]) -> [PASS][109]
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb7/igt@gem_workarounds@suspend-resume.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb8/igt@gem_workarounds@suspend-resume.html

  * igt@i915_pm_rpm@i2c:
    - {shard-rkl}:        [SKIP][110] ([fdo#109308]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@i915_pm_rpm@i2c.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@i915_pm_rpm@i2c.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-tglb:         [INCOMPLETE][112] -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb7/igt@i915_suspend@fence-restore-tiled2untiled.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-tglb6/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_async_flips@async-flip-with-page-flip-events:
    - {shard-rkl}:        [SKIP][114] ([i915#1845]) -> [PASS][115] +24 similar issues
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_async_flips@async-flip-with-page-flip-events.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_async_flips@async-flip-with-page-flip-events.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - {shard-rkl}:        [SKIP][116] ([i915#3638]) -> [PASS][117] +1 similar issue
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-2/igt@kms_big_fb@linear-32bpp-rotate-0.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180:
    - {shard-rkl}:        [SKIP][118] ([i915#3721]) -> [PASS][119] +7 similar issues
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_color@pipe-a-ctm-0-25:
    - shard-skl:          [DMESG-WARN][120] ([i915#1982]) -> [PASS][121]
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl2/igt@kms_color@pipe-a-ctm-0-25.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl8/igt@kms_color@pipe-a-ctm-0-25.html

  * igt@kms_color@pipe-a-ctm-max:
    - {shard-rkl}:        [SKIP][122] ([i915#1149] / [i915#1849] / [i915#4070]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-2/igt@kms_color@pipe-a-ctm-max.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_color@pipe-a-ctm-max.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - {shard-rkl}:        [SKIP][124] ([fdo#112022] / [i915#4070]) -> [PASS][125] +5 similar issues
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
    - shard-kbl:          [DMESG-WARN][126] ([i915#180]) -> [PASS][127]
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [FAIL][128] ([i915#2346]) -> [PASS][129]
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - {shard-rkl}:        [SKIP][130] ([fdo#111825] / [i915#4070]) -> [PASS][131] +2 similar issues
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_dp_aux_dev:
    - {shard-rkl}:        [SKIP][132] ([i915#1257]) -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_dp_aux_dev.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_dp_aux_dev.html

  * igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled:
    - {shard-rkl}:        [SKIP][134] ([fdo#111314]) -> [PASS][135] +6 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_draw_crc@draw-method-rgb565-mmap-cpu-ytiled.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - {shard-rkl}:        [SKIP][136] ([fdo#110189] / [i915#3955]) -> [PASS][137]
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_fbcon_fbt@psr-suspend.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-skl:          [FAIL][138] ([i915#79]) -> [PASS][139] +1 similar issue
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1:
    - shard-kbl:          [FAIL][140] ([i915#79]) -> [PASS][141]
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/shard-kbl3/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1.html

  * igt@kms_fli

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20993/index.html

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^ permalink raw reply	[flat|nested] 23+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: rename debugfs_gt files (rev2)
  2021-09-09  0:49 ` Lucas De Marchi
                   ` (6 preceding siblings ...)
  (?)
@ 2021-09-09  6:44 ` Patchwork
  -1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-09-09  6:44 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915: rename debugfs_gt files (rev2)
URL   : https://patchwork.freedesktop.org/series/94489/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
432bfa5f078a drm/i915: rename debugfs_gt files
-:168: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#168: 
rename from drivers/gpu/drm/i915/gt/debugfs_gt.c

total: 0 errors, 1 warnings, 0 checks, 340 lines checked
3a81fa262389 drm/i915: rename debugfs_engines files
-:33: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 66 lines checked
51f63f32325f drm/i915: rename debugfs_gt_pm files
-:33: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#33: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 68 lines checked
10a81e9deb43 drm/i915: deduplicate frequency dump on debugfs



^ permalink raw reply	[flat|nested] 23+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: rename debugfs_gt files (rev2)
  2021-09-09  0:49 ` Lucas De Marchi
                   ` (7 preceding siblings ...)
  (?)
@ 2021-09-09  7:13 ` Patchwork
  -1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-09-09  7:13 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 2988 bytes --]

== Series Details ==

Series: series starting with [1/4] drm/i915: rename debugfs_gt files (rev2)
URL   : https://patchwork.freedesktop.org/series/94489/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10565 -> Patchwork_20998
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/index.html

Known issues
------------

  Here are the changes found in Patchwork_20998 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@semaphore:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][1] ([fdo#109271]) +27 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html

  * igt@core_hotunplug@unbind-rebind:
    - fi-bdw-5557u:       NOTRUN -> [WARN][2] ([i915#3718])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][3] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@gt_pm:
    - {fi-jsl-1}:         [DMESG-FAIL][4] ([i915#1886]) -> [PASS][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/fi-jsl-1/igt@i915_selftest@live@gt_pm.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/fi-jsl-1/igt@i915_selftest@live@gt_pm.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#3718]: https://gitlab.freedesktop.org/drm/intel/issues/3718


Participating hosts (47 -> 38)
------------------------------

  Missing    (9): fi-ilk-m540 bat-adls-5 bat-dg1-6 fi-tgl-1115g4 fi-bsw-cyan bat-adlp-4 fi-ctg-p8600 fi-bdw-samus bat-jsl-1 


Build changes
-------------

  * Linux: CI_DRM_10565 -> Patchwork_20998

  CI-20190529: 20190529
  CI_DRM_10565: 8c3cd60dcfa81a649b14f0705eb5e5c9336f1881 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6201: be0d02ff0775235ead63ccb1e3a1e8c10f0209cf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_20998: 10a81e9deb43c47a8324b3f8aee2efe8c2c7bdbe @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

10a81e9deb43 drm/i915: deduplicate frequency dump on debugfs
51f63f32325f drm/i915: rename debugfs_gt_pm files
3a81fa262389 drm/i915: rename debugfs_engines files
432bfa5f078a drm/i915: rename debugfs_gt files

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/index.html

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^ permalink raw reply	[flat|nested] 23+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915: rename debugfs_gt files (rev2)
  2021-09-09  0:49 ` Lucas De Marchi
                   ` (8 preceding siblings ...)
  (?)
@ 2021-09-09  8:51 ` Patchwork
  -1 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2021-09-09  8:51 UTC (permalink / raw)
  To: Lucas De Marchi; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 30290 bytes --]

== Series Details ==

Series: series starting with [1/4] drm/i915: rename debugfs_gt files (rev2)
URL   : https://patchwork.freedesktop.org/series/94489/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10565_full -> Patchwork_20998_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_20998_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_20998_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_20998_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_suspend@basic-s3:
    - shard-tglb:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb1/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb7/igt@gem_exec_suspend@basic-s3.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
    - shard-iclb:         [PASS][3] -> [SKIP][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_eio@hibernate:
    - {shard-rkl}:        [TIMEOUT][5] ([i915#3811]) -> [FAIL][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@gem_eio@hibernate.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-2/igt@gem_eio@hibernate.html

  
Known issues
------------

  Here are the changes found in Patchwork_20998_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_persistence@smoketest:
    - shard-snb:          NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-snb2/igt@gem_ctx_persistence@smoketest.html

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-iclb:         [PASS][8] -> [TIMEOUT][9] ([i915#3070])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb4/igt@gem_eio@in-flight-contexts-10ms.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb5/igt@gem_eio@in-flight-contexts-10ms.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [PASS][10] -> [TIMEOUT][11] ([i915#2369] / [i915#3063] / [i915#3648])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb3/igt@gem_eio@unwedge-stress.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb1/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-glk:          [PASS][12] -> [FAIL][13] ([i915#2842])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-glk2/igt@gem_exec_fair@basic-none-share@rcs0.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-glk2/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-kbl:          [PASS][14] -> [FAIL][15] ([i915#2842]) +1 similar issue
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl4/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-tglb:         [PASS][16] -> [FAIL][17] ([i915#2842]) +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb3/igt@gem_exec_fair@basic-pace@vcs1.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb3/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-kbl:          [PASS][18] -> [SKIP][19] ([fdo#109271])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl3/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-snb:          NOTRUN -> [SKIP][20] ([fdo#109271]) +397 similar issues
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-snb2/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_gttfill@all:
    - shard-glk:          [PASS][21] -> [DMESG-WARN][22] ([i915#118] / [i915#95]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-glk6/igt@gem_exec_gttfill@all.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-glk2/igt@gem_exec_gttfill@all.html

  * igt@gem_mmap_gtt@cpuset-big-copy-odd:
    - shard-glk:          [PASS][23] -> [FAIL][24] ([i915#1888] / [i915#307])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-glk7/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-glk8/igt@gem_mmap_gtt@cpuset-big-copy-odd.html

  * igt@gem_render_copy@linear-to-vebox-y-tiled:
    - shard-glk:          NOTRUN -> [SKIP][25] ([fdo#109271]) +3 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-glk7/igt@gem_render_copy@linear-to-vebox-y-tiled.html
    - shard-iclb:         NOTRUN -> [SKIP][26] ([i915#768])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@gem_render_copy@linear-to-vebox-y-tiled.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-tglb:         NOTRUN -> [SKIP][27] ([i915#3297])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb2/igt@gem_userptr_blits@dmabuf-unsync.html
    - shard-iclb:         NOTRUN -> [SKIP][28] ([i915#3297])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@input-checking:
    - shard-snb:          NOTRUN -> [DMESG-WARN][29] ([i915#3002])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-snb5/igt@gem_userptr_blits@input-checking.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-kbl:          [PASS][30] -> [DMESG-WARN][31] ([i915#180]) +3 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl3/igt@gem_workarounds@suspend-resume-fd.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl3/igt@gem_workarounds@suspend-resume-fd.html

  * igt@i915_pm_rpm@system-suspend-modeset:
    - shard-skl:          [PASS][32] -> [INCOMPLETE][33] ([i915#151])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl4/igt@i915_pm_rpm@system-suspend-modeset.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl3/igt@i915_pm_rpm@system-suspend-modeset.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][34] ([fdo#110725] / [fdo#111614])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
    - shard-iclb:         NOTRUN -> [SKIP][35] ([fdo#110723])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@kms_big_fb@yf-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-tglb:         NOTRUN -> [SKIP][36] ([fdo#111615])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb6/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-apl:          NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) +3 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-skl:          NOTRUN -> [FAIL][38] ([i915#3722])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
    - shard-skl:          NOTRUN -> [SKIP][39] ([fdo#109271] / [i915#3886])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl1/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][40] ([fdo#109271] / [i915#3886]) +9 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl6/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][41] ([i915#3689])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb2/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_ccs.html

  * igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
    - shard-glk:          NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3886])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-glk7/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
    - shard-iclb:         NOTRUN -> [SKIP][43] ([fdo#109278] / [i915#3886])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl1/igt@kms_ccs@pipe-b-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_cdclk@mode-transition:
    - shard-apl:          NOTRUN -> [SKIP][45] ([fdo#109271]) +294 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl3/igt@kms_cdclk@mode-transition.html

  * igt@kms_chamelium@vga-hpd:
    - shard-apl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [fdo#111827]) +23 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl3/igt@kms_chamelium@vga-hpd.html

  * igt@kms_chamelium@vga-hpd-for-each-pipe:
    - shard-kbl:          NOTRUN -> [SKIP][47] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl1/igt@kms_chamelium@vga-hpd-for-each-pipe.html

  * igt@kms_chamelium@vga-hpd-without-ddc:
    - shard-tglb:         NOTRUN -> [SKIP][48] ([fdo#109284] / [fdo#111827])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb2/igt@kms_chamelium@vga-hpd-without-ddc.html

  * igt@kms_color@pipe-a-ctm-0-75:
    - shard-skl:          [PASS][49] -> [DMESG-WARN][50] ([i915#1982]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl1/igt@kms_color@pipe-a-ctm-0-75.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl8/igt@kms_color@pipe-a-ctm-0-75.html

  * igt@kms_color_chamelium@pipe-b-gamma:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#109284] / [fdo#111827]) +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@kms_color_chamelium@pipe-b-gamma.html
    - shard-glk:          NOTRUN -> [SKIP][52] ([fdo#109271] / [fdo#111827])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-glk7/igt@kms_color_chamelium@pipe-b-gamma.html

  * igt@kms_color_chamelium@pipe-d-ctm-0-25:
    - shard-skl:          NOTRUN -> [SKIP][53] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl2/igt@kms_color_chamelium@pipe-d-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes:
    - shard-snb:          NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111827]) +15 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-snb2/igt@kms_color_chamelium@pipe-invalid-ctm-matrix-sizes.html

  * igt@kms_content_protection@srm:
    - shard-apl:          NOTRUN -> [TIMEOUT][55] ([i915#1319])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl6/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@pipe-a-cursor-32x10-random:
    - shard-tglb:         NOTRUN -> [SKIP][56] ([i915#3359])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb5/igt@kms_cursor_crc@pipe-a-cursor-32x10-random.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement:
    - shard-tglb:         NOTRUN -> [SKIP][57] ([i915#3319])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb2/igt@kms_cursor_crc@pipe-c-cursor-32x32-rapid-movement.html

  * igt@kms_cursor_crc@pipe-d-cursor-dpms:
    - shard-iclb:         NOTRUN -> [SKIP][58] ([fdo#109278]) +4 similar issues
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@kms_cursor_crc@pipe-d-cursor-dpms.html

  * igt@kms_cursor_crc@pipe-d-cursor-suspend:
    - shard-kbl:          NOTRUN -> [SKIP][59] ([fdo#109271]) +41 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl1/igt@kms_cursor_crc@pipe-d-cursor-suspend.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
    - shard-iclb:         NOTRUN -> [SKIP][60] ([fdo#109274] / [fdo#109278])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html

  * igt@kms_cursor_legacy@pipe-d-torture-bo:
    - shard-kbl:          NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#533])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl1/igt@kms_cursor_legacy@pipe-d-torture-bo.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1:
    - shard-skl:          [PASS][62] -> [FAIL][63] ([i915#2122])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs:
    - shard-apl:          NOTRUN -> [SKIP][64] ([fdo#109271] / [i915#2672])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
    - shard-iclb:         NOTRUN -> [SKIP][65] ([fdo#109280]) +5 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite:
    - shard-tglb:         NOTRUN -> [SKIP][66] ([fdo#111825]) +3 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-skl:          NOTRUN -> [SKIP][67] ([fdo#109271]) +50 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-skl:          [PASS][68] -> [FAIL][69] ([i915#1188])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl2/igt@kms_hdr@bpc-switch-dpms.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl6/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - shard-apl:          NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#533]) +1 similar issue
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl6/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-apl:          [PASS][71] -> [DMESG-WARN][72] ([i915#180])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-apl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
    - shard-kbl:          [PASS][73] -> [INCOMPLETE][74] ([i915#155])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
    - shard-skl:          NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#533]) +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-kbl:          NOTRUN -> [FAIL][76] ([fdo#108145] / [i915#265]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl1/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][77] ([fdo#108145] / [i915#265]) +3 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][78] -> [FAIL][79] ([fdo#108145] / [i915#265]) +1 similar issue
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_plane_lowres@pipe-b-tiling-x:
    - shard-iclb:         NOTRUN -> [SKIP][80] ([i915#3536])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@kms_plane_lowres@pipe-b-tiling-x.html

  * igt@kms_psr2_sf@cursor-plane-update-sf:
    - shard-tglb:         NOTRUN -> [SKIP][81] ([i915#2920]) +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb2/igt@kms_psr2_sf@cursor-plane-update-sf.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3:
    - shard-kbl:          NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#658])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-3.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3:
    - shard-apl:          NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#658]) +5 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4:
    - shard-iclb:         NOTRUN -> [SKIP][84] ([i915#658])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-4.html

  * igt@kms_psr@suspend:
    - shard-skl:          [PASS][85] -> [INCOMPLETE][86] ([i915#198])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl1/igt@kms_psr@suspend.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl6/igt@kms_psr@suspend.html

  * igt@perf@polling:
    - shard-skl:          [PASS][87] -> [FAIL][88] ([i915#1542])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl9/igt@perf@polling.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl7/igt@perf@polling.html

  * igt@perf@polling-parameterized:
    - shard-glk:          [PASS][89] -> [FAIL][90] ([i915#1542])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-glk3/igt@perf@polling-parameterized.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-glk1/igt@perf@polling-parameterized.html
    - shard-skl:          NOTRUN -> [FAIL][91] ([i915#1542])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl1/igt@perf@polling-parameterized.html

  * igt@sysfs_clients@fair-0:
    - shard-kbl:          NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2994])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl1/igt@sysfs_clients@fair-0.html

  * igt@sysfs_clients@pidname:
    - shard-apl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#2994]) +3 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-apl6/igt@sysfs_clients@pidname.html

  * igt@sysfs_clients@split-50:
    - shard-skl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl1/igt@sysfs_clients@split-50.html

  
#### Possible fixes ####

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - {shard-rkl}:        [FAIL][95] ([i915#2842]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-2/igt@gem_exec_fair@basic-none-share@rcs0.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-2/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-kbl:          [FAIL][97] ([i915#2842]) -> [PASS][98] +3 similar issues
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl2/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][99] ([i915#2842]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-glk8/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-kbl:          [SKIP][101] ([fdo#109271]) -> [PASS][102] +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl6/igt@gem_exec_fair@basic-pace@rcs0.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl3/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-iclb:         [FAIL][103] ([i915#2849]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_reloc@basic-scanout@vecs0:
    - {shard-rkl}:        [SKIP][105] ([i915#3639]) -> [PASS][106] +3 similar issues
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@gem_exec_reloc@basic-scanout@vecs0.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@gem_exec_reloc@basic-scanout@vecs0.html

  * igt@i915_pm_dc@dc6-psr:
    - {shard-rkl}:        [SKIP][107] ([i915#658]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@i915_pm_dc@dc6-psr.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@drm-resources-equal:
    - {shard-rkl}:        [SKIP][109] ([fdo#109308]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@i915_pm_rpm@drm-resources-equal.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@i915_pm_rpm@drm-resources-equal.html

  * igt@i915_pm_rpm@modeset-lpsp-stress-no-wait:
    - {shard-rkl}:        [SKIP][111] ([i915#1397]) -> [PASS][112]
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@i915_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-tglb:         [INCOMPLETE][113] -> [PASS][114]
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-tglb7/igt@i915_suspend@fence-restore-tiled2untiled.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-tglb2/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-180:
    - {shard-rkl}:        [SKIP][115] ([i915#3638]) -> [PASS][116] +3 similar issues
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-90:
    - {shard-rkl}:        [SKIP][117] ([fdo#111614]) -> [PASS][118] +1 similar issue
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_big_fb@y-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-180:
    - shard-iclb:         [DMESG-WARN][119] ([i915#1226]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-iclb6/igt@kms_big_fb@y-tiled-32bpp-rotate-180.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-iclb3/igt@kms_big_fb@y-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - {shard-rkl}:        [SKIP][121] ([i915#3721]) -> [PASS][122] +4 similar issues
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_color@pipe-a-ctm-0-25:
    - shard-skl:          [DMESG-WARN][123] ([i915#1982]) -> [PASS][124]
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl2/igt@kms_color@pipe-a-ctm-0-25.html
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl9/igt@kms_color@pipe-a-ctm-0-25.html

  * igt@kms_color@pipe-b-ctm-0-5:
    - {shard-rkl}:        [SKIP][125] ([i915#1149] / [i915#1849] / [i915#4070]) -> [PASS][126] +5 similar issues
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_color@pipe-b-ctm-0-5.html
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_color@pipe-b-ctm-0-5.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen:
    - {shard-rkl}:        [SKIP][127] ([fdo#112022] / [i915#4070]) -> [PASS][128] +8 similar issues
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html

  * igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge:
    - {shard-rkl}:        [SKIP][129] ([i915#1849] / [i915#4070]) -> [PASS][130] +6 similar issues
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge.html
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_cursor_edge_walk@pipe-a-128x128-top-edge.html

  * igt@kms_cursor_legacy@cursor-vs-flip-legacy:
    - {shard-rkl}:        [SKIP][131] ([fdo#111825] / [i915#4070]) -> [PASS][132] +5 similar issues
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-1/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html

  * igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled:
    - {shard-rkl}:        [SKIP][133] ([fdo#111314]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled.html

  * igt@kms_fbcon_fbt@psr:
    - {shard-rkl}:        [SKIP][135] ([fdo#110189] / [i915#3955]) -> [PASS][136]
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-rkl-5/igt@kms_fbcon_fbt@psr.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-rkl-6/igt@kms_fbcon_fbt@psr.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-skl:          [FAIL][137] ([i915#79]) -> [PASS][138] +1 similar issue
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1:
    - shard-kbl:          [FAIL][139] ([i915#79]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10565/shard-kbl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1.html
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/shard-kbl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a1:
    - shard-glk:          [FAIL][141] ([i915#79]) -> [PASS][142] +2 similar issues
   [141]: https://intel-gfx-ci.01.org/t

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20998/index.html

[-- Attachment #2: Type: text/html, Size: 33499 bytes --]

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files
  2021-09-09  0:49   ` Lucas De Marchi
  (?)
@ 2021-09-10 17:52   ` Lucas De Marchi
  2021-09-10 21:14     ` Yokoyama, Caz
  2021-09-15  0:24     ` Matt Roper
  -1 siblings, 2 replies; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-10 17:52 UTC (permalink / raw)
  To: intel-gfx
  Cc: dri-devel, Jani Nikula, Andi Shyti, Chris Wilson, Joonas Lahtinen

On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote:
>We shouldn't be using debugfs_ namespace for this functionality. Rename
>debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make
>functions, defines and structs follow suit.
>
>Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>---
> drivers/gpu/drm/i915/Makefile                      |  2 +-
> drivers/gpu/drm/i915/gt/debugfs_gt_pm.h            | 14 --------------
> drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
> .../gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c}  |  4 ++--
> drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h      | 14 ++++++++++++++
> 5 files changed, 19 insertions(+), 19 deletions(-)
> delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> rename drivers/gpu/drm/i915/gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c} (99%)
> create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
>
>diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
>index 232c9673a2e5..dd656f2d7721 100644
>--- a/drivers/gpu/drm/i915/Makefile
>+++ b/drivers/gpu/drm/i915/Makefile
>@@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
>
> # "Graphics Technology" (aka we talk to the gpu)
> gt-y += \
>-	gt/debugfs_gt_pm.o \
> 	gt/gen2_engine_cs.o \
> 	gt/gen6_engine_cs.o \
> 	gt/gen6_ppgtt.o \
>@@ -103,6 +102,7 @@ gt-y += \
> 	gt/intel_gt_engines_debugfs.o \
> 	gt/intel_gt_irq.o \
> 	gt/intel_gt_pm.o \
>+	gt/intel_gt_pm_debugfs.o \
> 	gt/intel_gt_pm_irq.o \
> 	gt/intel_gt_requests.o \
> 	gt/intel_gtt.o \
>diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
>deleted file mode 100644
>index 4cf5f5c9da7d..000000000000
>--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
>+++ /dev/null
>@@ -1,14 +0,0 @@
>-/* SPDX-License-Identifier: MIT */
>-/*
>- * Copyright © 2019 Intel Corporation
>- */
>-
>-#ifndef DEBUGFS_GT_PM_H
>-#define DEBUGFS_GT_PM_H
>-
>-struct intel_gt;
>-struct dentry;
>-
>-void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root);
>-
>-#endif /* DEBUGFS_GT_PM_H */
>diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
>index e5d173c235a3..4096ee893b69 100644
>--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
>+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
>@@ -5,10 +5,10 @@
>
> #include <linux/debugfs.h>
>
>-#include "debugfs_gt_pm.h"
> #include "i915_drv.h"
> #include "intel_gt_debugfs.h"
> #include "intel_gt_engines_debugfs.h"
>+#include "intel_gt_pm_debugfs.h"
> #include "intel_sseu_debugfs.h"
> #include "uc/intel_uc_debugfs.h"
>
>@@ -24,7 +24,7 @@ void intel_gt_register_debugfs(struct intel_gt *gt)
> 		return;
>
> 	intel_gt_engines_register_debugfs(gt, root);
>-	debugfs_gt_pm_register(gt, root);
>+	intel_gt_pm_register_debugfs(gt, root);

This is one case I usually don't know what convention to follow since it
changes in different places.

I did it like xxxx_register_debugfs because of calls like
intel_gt_init_scratch(), xxx_init_hw, etc. However here I see that just
below we have intel_sseu_debugfs_register(), so maybe I should consider
debugfs as part of the namespace?

Lucas De Marchi

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files
  2021-09-10 17:52   ` [Intel-gfx] " Lucas De Marchi
@ 2021-09-10 21:14     ` Yokoyama, Caz
  2021-09-10 21:52       ` Lucas De Marchi
  2021-09-15  0:24     ` Matt Roper
  1 sibling, 1 reply; 23+ messages in thread
From: Yokoyama, Caz @ 2021-09-10 21:14 UTC (permalink / raw)
  To: intel-gfx, De Marchi, Lucas
  Cc: dri-devel, joonas.lahtinen, Shyti, Andi, jani.nikula, chris

On Fri, 2021-09-10 at 10:52 -0700, Lucas De Marchi wrote:
> On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote:
> > We shouldn't be using debugfs_ namespace for this functionality.
> > Rename
> > debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make
> > functions, defines and structs follow suit.
> > 
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > ---
> > drivers/gpu/drm/i915/Makefile                      |  2 +-
> > drivers/gpu/drm/i915/gt/debugfs_gt_pm.h            | 14 ---------
> > -----
> > drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
> > .../gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c}  |  4 ++--
> > drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h      | 14
> > ++++++++++++++
> > 5 files changed, 19 insertions(+), 19 deletions(-)
> > delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > rename drivers/gpu/drm/i915/gt/{debugfs_gt_pm.c =>
> > intel_gt_pm_debugfs.c} (99%)
> > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
> > 
> > diff --git a/drivers/gpu/drm/i915/Makefile
> > b/drivers/gpu/drm/i915/Makefile
> > index 232c9673a2e5..dd656f2d7721 100644
> > --- a/drivers/gpu/drm/i915/Makefile
> > +++ b/drivers/gpu/drm/i915/Makefile
> > @@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
> > 
> > # "Graphics Technology" (aka we talk to the gpu)
> > gt-y += \
> > -	gt/debugfs_gt_pm.o \
> > 	gt/gen2_engine_cs.o \
> > 	gt/gen6_engine_cs.o \
> > 	gt/gen6_ppgtt.o \
> > @@ -103,6 +102,7 @@ gt-y += \
> > 	gt/intel_gt_engines_debugfs.o \
> > 	gt/intel_gt_irq.o \
> > 	gt/intel_gt_pm.o \
> > +	gt/intel_gt_pm_debugfs.o \
> > 	gt/intel_gt_pm_irq.o \
> > 	gt/intel_gt_requests.o \
> > 	gt/intel_gtt.o \
> > diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > deleted file mode 100644
> > index 4cf5f5c9da7d..000000000000
> > --- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > +++ /dev/null
> > @@ -1,14 +0,0 @@
> > -/* SPDX-License-Identifier: MIT */
> > -/*
> > - * Copyright © 2019 Intel Corporation
> > - */
> > -
> > -#ifndef DEBUGFS_GT_PM_H
> > -#define DEBUGFS_GT_PM_H
> > -
> > -struct intel_gt;
> > -struct dentry;
> > -
> > -void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry
> > *root);
> > -
> > -#endif /* DEBUGFS_GT_PM_H */
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > index e5d173c235a3..4096ee893b69 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > @@ -5,10 +5,10 @@
> > 
> > #include <linux/debugfs.h>
> > 
> > -#include "debugfs_gt_pm.h"
> > #include "i915_drv.h"
> > #include "intel_gt_debugfs.h"
> > #include "intel_gt_engines_debugfs.h"
> > +#include "intel_gt_pm_debugfs.h"
Why locate here? Why not just replace debugfs_gt_pm.h? Compile error?
-caz

> > #include "intel_sseu_debugfs.h"
> > #include "uc/intel_uc_debugfs.h"
> > 
> > @@ -24,7 +24,7 @@ void intel_gt_register_debugfs(struct intel_gt
> > *gt)
> > 		return;
> > 
> > 	intel_gt_engines_register_debugfs(gt, root);
> > -	debugfs_gt_pm_register(gt, root);
> > +	intel_gt_pm_register_debugfs(gt, root);
> 
> This is one case I usually don't know what convention to follow since
> it
> changes in different places.
> 
> I did it like xxxx_register_debugfs because of calls like
> intel_gt_init_scratch(), xxx_init_hw, etc. However here I see that
> just
> below we have intel_sseu_debugfs_register(), so maybe I should
> consider
> debugfs as part of the namespace?
> 
> Lucas De Marchi

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files
  2021-09-10 21:14     ` Yokoyama, Caz
@ 2021-09-10 21:52       ` Lucas De Marchi
  2021-09-10 23:53         ` Yokoyama, Caz
  0 siblings, 1 reply; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-10 21:52 UTC (permalink / raw)
  To: Yokoyama, Caz
  Cc: intel-gfx, dri-devel, joonas.lahtinen, Shyti, Andi, jani.nikula, chris

On Fri, Sep 10, 2021 at 09:14:37PM +0000, Yokoyama, Caz wrote:
>On Fri, 2021-09-10 at 10:52 -0700, Lucas De Marchi wrote:
>> On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote:
>> > We shouldn't be using debugfs_ namespace for this functionality.
>> > Rename
>> > debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make
>> > functions, defines and structs follow suit.
>> >
>> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> > ---
>> > drivers/gpu/drm/i915/Makefile                      |  2 +-
>> > drivers/gpu/drm/i915/gt/debugfs_gt_pm.h            | 14 ---------
>> > -----
>> > drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
>> > .../gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c}  |  4 ++--
>> > drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h      | 14
>> > ++++++++++++++
>> > 5 files changed, 19 insertions(+), 19 deletions(-)
>> > delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
>> > rename drivers/gpu/drm/i915/gt/{debugfs_gt_pm.c =>
>> > intel_gt_pm_debugfs.c} (99%)
>> > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
>> >
>> > diff --git a/drivers/gpu/drm/i915/Makefile
>> > b/drivers/gpu/drm/i915/Makefile
>> > index 232c9673a2e5..dd656f2d7721 100644
>> > --- a/drivers/gpu/drm/i915/Makefile
>> > +++ b/drivers/gpu/drm/i915/Makefile
>> > @@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
>> >
>> > # "Graphics Technology" (aka we talk to the gpu)
>> > gt-y += \
>> > -	gt/debugfs_gt_pm.o \
>> > 	gt/gen2_engine_cs.o \
>> > 	gt/gen6_engine_cs.o \
>> > 	gt/gen6_ppgtt.o \
>> > @@ -103,6 +102,7 @@ gt-y += \
>> > 	gt/intel_gt_engines_debugfs.o \
>> > 	gt/intel_gt_irq.o \
>> > 	gt/intel_gt_pm.o \
>> > +	gt/intel_gt_pm_debugfs.o \
>> > 	gt/intel_gt_pm_irq.o \
>> > 	gt/intel_gt_requests.o \
>> > 	gt/intel_gtt.o \
>> > diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
>> > b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
>> > deleted file mode 100644
>> > index 4cf5f5c9da7d..000000000000
>> > --- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
>> > +++ /dev/null
>> > @@ -1,14 +0,0 @@
>> > -/* SPDX-License-Identifier: MIT */
>> > -/*
>> > - * Copyright © 2019 Intel Corporation
>> > - */
>> > -
>> > -#ifndef DEBUGFS_GT_PM_H
>> > -#define DEBUGFS_GT_PM_H
>> > -
>> > -struct intel_gt;
>> > -struct dentry;
>> > -
>> > -void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry
>> > *root);
>> > -
>> > -#endif /* DEBUGFS_GT_PM_H */
>> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
>> > b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
>> > index e5d173c235a3..4096ee893b69 100644
>> > --- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
>> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
>> > @@ -5,10 +5,10 @@
>> >
>> > #include <linux/debugfs.h>
>> >
>> > -#include "debugfs_gt_pm.h"
>> > #include "i915_drv.h"
>> > #include "intel_gt_debugfs.h"
>> > #include "intel_gt_engines_debugfs.h"
>> > +#include "intel_gt_pm_debugfs.h"
>Why locate here? Why not just replace debugfs_gt_pm.h? Compile error?

are you asking why I moved the include? Because sorting them
alphabetically avoid big messes in these includes

Lucas De Marchi

>-caz
>
>> > #include "intel_sseu_debugfs.h"
>> > #include "uc/intel_uc_debugfs.h"
>> >
>> > @@ -24,7 +24,7 @@ void intel_gt_register_debugfs(struct intel_gt
>> > *gt)
>> > 		return;
>> >
>> > 	intel_gt_engines_register_debugfs(gt, root);
>> > -	debugfs_gt_pm_register(gt, root);
>> > +	intel_gt_pm_register_debugfs(gt, root);
>>
>> This is one case I usually don't know what convention to follow since
>> it
>> changes in different places.
>>
>> I did it like xxxx_register_debugfs because of calls like
>> intel_gt_init_scratch(), xxx_init_hw, etc. However here I see that
>> just
>> below we have intel_sseu_debugfs_register(), so maybe I should
>> consider
>> debugfs as part of the namespace?
>>
>> Lucas De Marchi

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files
  2021-09-10 21:52       ` Lucas De Marchi
@ 2021-09-10 23:53         ` Yokoyama, Caz
  0 siblings, 0 replies; 23+ messages in thread
From: Yokoyama, Caz @ 2021-09-10 23:53 UTC (permalink / raw)
  To: De Marchi, Lucas
  Cc: dri-devel, joonas.lahtinen, intel-gfx, Shyti, Andi, jani.nikula, chris

On Fri, 2021-09-10 at 14:52 -0700, Lucas De Marchi wrote:
> On Fri, Sep 10, 2021 at 09:14:37PM +0000, Yokoyama, Caz wrote:
> > On Fri, 2021-09-10 at 10:52 -0700, Lucas De Marchi wrote:
> > > On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote:
> > > > We shouldn't be using debugfs_ namespace for this
> > > > functionality.
> > > > Rename
> > > > debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make
> > > > functions, defines and structs follow suit.
> > > > 
> > > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/Makefile                      |  2 +-
> > > > drivers/gpu/drm/i915/gt/debugfs_gt_pm.h            | 14 -----
> > > > ----
> > > > -----
> > > > drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
> > > > .../gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c}  |  4 ++--
> > > > drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h      | 14
> > > > ++++++++++++++
> > > > 5 files changed, 19 insertions(+), 19 deletions(-)
> > > > delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > > > rename drivers/gpu/drm/i915/gt/{debugfs_gt_pm.c =>
> > > > intel_gt_pm_debugfs.c} (99%)
> > > > create mode 100644
> > > > drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/Makefile
> > > > b/drivers/gpu/drm/i915/Makefile
> > > > index 232c9673a2e5..dd656f2d7721 100644
> > > > --- a/drivers/gpu/drm/i915/Makefile
> > > > +++ b/drivers/gpu/drm/i915/Makefile
> > > > @@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
> > > > 
> > > > # "Graphics Technology" (aka we talk to the gpu)
> > > > gt-y += \
> > > > -	gt/debugfs_gt_pm.o \
> > > > 	gt/gen2_engine_cs.o \
> > > > 	gt/gen6_engine_cs.o \
> > > > 	gt/gen6_ppgtt.o \
> > > > @@ -103,6 +102,7 @@ gt-y += \
> > > > 	gt/intel_gt_engines_debugfs.o \
> > > > 	gt/intel_gt_irq.o \
> > > > 	gt/intel_gt_pm.o \
> > > > +	gt/intel_gt_pm_debugfs.o \
> > > > 	gt/intel_gt_pm_irq.o \
> > > > 	gt/intel_gt_requests.o \
> > > > 	gt/intel_gtt.o \
> > > > diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > > > b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > > > deleted file mode 100644
> > > > index 4cf5f5c9da7d..000000000000
> > > > --- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > > > +++ /dev/null
> > > > @@ -1,14 +0,0 @@
> > > > -/* SPDX-License-Identifier: MIT */
> > > > -/*
> > > > - * Copyright © 2019 Intel Corporation
> > > > - */
> > > > -
> > > > -#ifndef DEBUGFS_GT_PM_H
> > > > -#define DEBUGFS_GT_PM_H
> > > > -
> > > > -struct intel_gt;
> > > > -struct dentry;
> > > > -
> > > > -void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry
> > > > *root);
> > > > -
> > > > -#endif /* DEBUGFS_GT_PM_H */
> > > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > > > b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > > > index e5d173c235a3..4096ee893b69 100644
> > > > --- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > > > +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > > > @@ -5,10 +5,10 @@
> > > > 
> > > > #include <linux/debugfs.h>
> > > > 
> > > > -#include "debugfs_gt_pm.h"
> > > > #include "i915_drv.h"
> > > > #include "intel_gt_debugfs.h"
> > > > #include "intel_gt_engines_debugfs.h"
> > > > +#include "intel_gt_pm_debugfs.h"
> > Why locate here? Why not just replace debugfs_gt_pm.h? Compile
> > error?
> 
> are you asking why I moved the include? Because sorting them
> alphabetically avoid big messes in these includes
As the patch, it is easy to see if - and + lines are side by side.
Anyway, I honor and respect your decision.
-caz

> 
> Lucas De Marchi
> 
> > -caz
> > 
> > > > #include "intel_sseu_debugfs.h"
> > > > #include "uc/intel_uc_debugfs.h"
> > > > 
> > > > @@ -24,7 +24,7 @@ void intel_gt_register_debugfs(struct
> > > > intel_gt
> > > > *gt)
> > > > 		return;
> > > > 
> > > > 	intel_gt_engines_register_debugfs(gt, root);
> > > > -	debugfs_gt_pm_register(gt, root);
> > > > +	intel_gt_pm_register_debugfs(gt, root);
> > > 
> > > This is one case I usually don't know what convention to follow
> > > since
> > > it
> > > changes in different places.
> > > 
> > > I did it like xxxx_register_debugfs because of calls like
> > > intel_gt_init_scratch(), xxx_init_hw, etc. However here I see
> > > that
> > > just
> > > below we have intel_sseu_debugfs_register(), so maybe I should
> > > consider
> > > debugfs as part of the namespace?
> > > 
> > > Lucas De Marchi

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [PATCH 1/4] drm/i915: rename debugfs_gt files
  2021-09-09  0:49 ` Lucas De Marchi
@ 2021-09-14  9:16   ` Jani Nikula
  -1 siblings, 0 replies; 23+ messages in thread
From: Jani Nikula @ 2021-09-14  9:16 UTC (permalink / raw)
  To: Lucas De Marchi, intel-gfx
  Cc: dri-devel, Andi Shyti, Chris Wilson, Joonas Lahtinen

On Wed, 08 Sep 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> We shouldn't be using debugfs_ namespace for this functionality. Rename
> debugfs_gt.[ch] to intel_gt_debugfs.[ch] and then make functions,
> defines and structs follow suit.
>
> While at it and since we are renaming the header, sort the includes
> alphabetically.

I didn't do a detailed review, maybe someone should, but superficially
seems good. On the series,

Acked-by: Jani Nikula <jani.nikula@intel.com>

>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                  |  2 +-
>  drivers/gpu/drm/i915/gt/debugfs_engines.c      |  6 +++---
>  drivers/gpu/drm/i915/gt/debugfs_gt_pm.c        | 14 +++++++-------
>  drivers/gpu/drm/i915/gt/intel_gt.c             |  6 +++---
>  .../gt/{debugfs_gt.c => intel_gt_debugfs.c}    |  8 ++++----
>  .../gt/{debugfs_gt.h => intel_gt_debugfs.h}    | 14 +++++++-------
>  drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c   | 10 +++++-----
>  drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 18 +++++++++---------
>  .../gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c |  8 ++++----
>  drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c |  6 +++---
>  drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c  |  6 +++---
>  11 files changed, 49 insertions(+), 49 deletions(-)
>  rename drivers/gpu/drm/i915/gt/{debugfs_gt.c => intel_gt_debugfs.c} (87%)
>  rename drivers/gpu/drm/i915/gt/{debugfs_gt.h => intel_gt_debugfs.h} (71%)
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index c36c8a4f0716..3e171f0b5f6a 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -80,7 +80,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
>  # "Graphics Technology" (aka we talk to the gpu)
>  gt-y += \
>  	gt/debugfs_engines.o \
> -	gt/debugfs_gt.o \
>  	gt/debugfs_gt_pm.o \
>  	gt/gen2_engine_cs.o \
>  	gt/gen6_engine_cs.o \
> @@ -101,6 +100,7 @@ gt-y += \
>  	gt/intel_gt.o \
>  	gt/intel_gt_buffer_pool.o \
>  	gt/intel_gt_clock_utils.o \
> +	gt/intel_gt_debugfs.o \
>  	gt/intel_gt_irq.o \
>  	gt/intel_gt_pm.o \
>  	gt/intel_gt_pm_irq.o \
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c b/drivers/gpu/drm/i915/gt/debugfs_engines.c
> index 5e3725e62241..2980dac5b171 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
> +++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
> @@ -7,9 +7,9 @@
>  #include <drm/drm_print.h>
>  
>  #include "debugfs_engines.h"
> -#include "debugfs_gt.h"
>  #include "i915_drv.h" /* for_each_engine! */
>  #include "intel_engine.h"
> +#include "intel_gt_debugfs.h"
>  
>  static int engines_show(struct seq_file *m, void *data)
>  {
> @@ -24,11 +24,11 @@ static int engines_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(engines);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
>  
>  void debugfs_engines_register(struct intel_gt *gt, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "engines", &engines_fops },
>  	};
>  
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
> index f6733f279890..9222cf68c56c 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
> @@ -6,11 +6,11 @@
>  
>  #include <linux/seq_file.h>
>  
> -#include "debugfs_gt.h"
>  #include "debugfs_gt_pm.h"
>  #include "i915_drv.h"
>  #include "intel_gt.h"
>  #include "intel_gt_clock_utils.h"
> +#include "intel_gt_debugfs.h"
>  #include "intel_gt_pm.h"
>  #include "intel_llc.h"
>  #include "intel_rc6.h"
> @@ -36,7 +36,7 @@ static int fw_domains_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(fw_domains);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(fw_domains);
>  
>  static void print_rc6_res(struct seq_file *m,
>  			  const char *title,
> @@ -238,7 +238,7 @@ static int drpc_show(struct seq_file *m, void *unused)
>  
>  	return err;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(drpc);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(drpc);
>  
>  static int frequency_show(struct seq_file *m, void *unused)
>  {
> @@ -480,7 +480,7 @@ static int frequency_show(struct seq_file *m, void *unused)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(frequency);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(frequency);
>  
>  static int llc_show(struct seq_file *m, void *data)
>  {
> @@ -533,7 +533,7 @@ static bool llc_eval(void *data)
>  	return HAS_LLC(gt->i915);
>  }
>  
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(llc);
>  
>  static const char *rps_power_to_str(unsigned int power)
>  {
> @@ -612,11 +612,11 @@ static bool rps_eval(void *data)
>  	return HAS_RPS(gt->i915);
>  }
>  
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(rps_boost);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rps_boost);
>  
>  void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "drpc", &drpc_fops, NULL },
>  		{ "frequency", &frequency_fops, NULL },
>  		{ "forcewake", &fw_domains_fops, NULL },
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2aeaae036a6f..9dda17553e12 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -3,7 +3,7 @@
>   * Copyright © 2019 Intel Corporation
>   */
>  
> -#include "debugfs_gt.h"
> +#include "intel_gt_debugfs.h"
>  
>  #include "gem/i915_gem_lmem.h"
>  #include "i915_drv.h"
> @@ -15,11 +15,11 @@
>  #include "intel_gt_requests.h"
>  #include "intel_migrate.h"
>  #include "intel_mocs.h"
> +#include "intel_pm.h"
>  #include "intel_rc6.h"
>  #include "intel_renderstate.h"
>  #include "intel_rps.h"
>  #include "intel_uncore.h"
> -#include "intel_pm.h"
>  #include "shmem_utils.h"
>  
>  void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
> @@ -434,7 +434,7 @@ void intel_gt_driver_register(struct intel_gt *gt)
>  {
>  	intel_rps_driver_register(&gt->rps);
>  
> -	debugfs_gt_register(gt);
> +	intel_gt_register_debugfs(gt);
>  }
>  
>  static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> similarity index 87%
> rename from drivers/gpu/drm/i915/gt/debugfs_gt.c
> rename to drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> index 591eb60785db..a27ba11605d8 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> @@ -6,13 +6,13 @@
>  #include <linux/debugfs.h>
>  
>  #include "debugfs_engines.h"
> -#include "debugfs_gt.h"
>  #include "debugfs_gt_pm.h"
> +#include "i915_drv.h"
> +#include "intel_gt_debugfs.h"
>  #include "intel_sseu_debugfs.h"
>  #include "uc/intel_uc_debugfs.h"
> -#include "i915_drv.h"
>  
> -void debugfs_gt_register(struct intel_gt *gt)
> +void intel_gt_register_debugfs(struct intel_gt *gt)
>  {
>  	struct dentry *root;
>  
> @@ -31,7 +31,7 @@ void debugfs_gt_register(struct intel_gt *gt)
>  }
>  
>  void intel_gt_debugfs_register_files(struct dentry *root,
> -				     const struct debugfs_gt_file *files,
> +				     const struct intel_gt_debugfs_file *files,
>  				     unsigned long count, void *data)
>  {
>  	while (count--) {
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
> similarity index 71%
> rename from drivers/gpu/drm/i915/gt/debugfs_gt.h
> rename to drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
> index f77540f727e9..cab0f2cb5009 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
> @@ -3,14 +3,14 @@
>   * Copyright © 2019 Intel Corporation
>   */
>  
> -#ifndef DEBUGFS_GT_H
> -#define DEBUGFS_GT_H
> +#ifndef INTEL_GT_DEBUGFS_H
> +#define INTEL_GT_DEBUGFS_H
>  
>  #include <linux/file.h>
>  
>  struct intel_gt;
>  
> -#define DEFINE_GT_DEBUGFS_ATTRIBUTE(__name)				\
> +#define DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(__name)				\
>  	static int __name ## _open(struct inode *inode, struct file *file) \
>  {									\
>  	return single_open(file, __name ## _show, inode->i_private);	\
> @@ -23,16 +23,16 @@ static const struct file_operations __name ## _fops = {			\
>  	.release = single_release,					\
>  }
>  
> -void debugfs_gt_register(struct intel_gt *gt);
> +void intel_gt_register_debugfs(struct intel_gt *gt);
>  
> -struct debugfs_gt_file {
> +struct intel_gt_debugfs_file {
>  	const char *name;
>  	const struct file_operations *fops;
>  	bool (*eval)(void *data);
>  };
>  
>  void intel_gt_debugfs_register_files(struct dentry *root,
> -				     const struct debugfs_gt_file *files,
> +				     const struct intel_gt_debugfs_file *files,
>  				     unsigned long count, void *data);
>  
> -#endif /* DEBUGFS_GT_H */
> +#endif /* INTEL_GT_DEBUGFS_H */
> diff --git a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
> index 1ba8b7da9d37..8bb3a91dad82 100644
> --- a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
> @@ -4,9 +4,9 @@
>   * Copyright © 2020 Intel Corporation
>   */
>  
> -#include "debugfs_gt.h"
> -#include "intel_sseu_debugfs.h"
>  #include "i915_drv.h"
> +#include "intel_gt_debugfs.h"
> +#include "intel_sseu_debugfs.h"
>  
>  static void sseu_copy_subslices(const struct sseu_dev_info *sseu,
>  				int slice, u8 *to_mask)
> @@ -282,7 +282,7 @@ static int sseu_status_show(struct seq_file *m, void *unused)
>  
>  	return intel_sseu_status(m, gt);
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(sseu_status);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(sseu_status);
>  
>  static int rcs_topology_show(struct seq_file *m, void *unused)
>  {
> @@ -293,11 +293,11 @@ static int rcs_topology_show(struct seq_file *m, void *unused)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(rcs_topology);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rcs_topology);
>  
>  void intel_sseu_debugfs_register(struct intel_gt *gt, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "sseu_status", &sseu_status_fops, NULL },
>  		{ "rcs_topology", &rcs_topology_fops, NULL },
>  	};
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> index 887c8c8f35db..25f09a420561 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> @@ -5,14 +5,14 @@
>  
>  #include <drm/drm_print.h>
>  
> -#include "gt/debugfs_gt.h"
> +#include "gt/intel_gt_debugfs.h"
> +#include "gt/uc/intel_guc_ads.h"
> +#include "gt/uc/intel_guc_ct.h"
> +#include "gt/uc/intel_guc_slpc.h"
> +#include "gt/uc/intel_guc_submission.h"
>  #include "intel_guc.h"
>  #include "intel_guc_debugfs.h"
>  #include "intel_guc_log_debugfs.h"
> -#include "gt/uc/intel_guc_ct.h"
> -#include "gt/uc/intel_guc_ads.h"
> -#include "gt/uc/intel_guc_submission.h"
> -#include "gt/uc/intel_guc_slpc.h"
>  
>  static int guc_info_show(struct seq_file *m, void *data)
>  {
> @@ -35,7 +35,7 @@ static int guc_info_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_info);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_info);
>  
>  static int guc_registered_contexts_show(struct seq_file *m, void *data)
>  {
> @@ -49,7 +49,7 @@ static int guc_registered_contexts_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
>  
>  static int guc_slpc_info_show(struct seq_file *m, void *unused)
>  {
> @@ -62,7 +62,7 @@ static int guc_slpc_info_show(struct seq_file *m, void *unused)
>  
>  	return intel_guc_slpc_print_info(slpc, &p);
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
>  
>  static bool intel_eval_slpc_support(void *data)
>  {
> @@ -73,7 +73,7 @@ static bool intel_eval_slpc_support(void *data)
>  
>  void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "guc_info", &guc_info_fops, NULL },
>  		{ "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
>  		{ "guc_slpc_info", &guc_slpc_info_fops, &intel_eval_slpc_support},
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
> index 64e0b86bf258..46026c2c1722 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
> @@ -6,7 +6,7 @@
>  #include <linux/fs.h>
>  #include <drm/drm_print.h>
>  
> -#include "gt/debugfs_gt.h"
> +#include "gt/intel_gt_debugfs.h"
>  #include "intel_guc.h"
>  #include "intel_guc_log.h"
>  #include "intel_guc_log_debugfs.h"
> @@ -17,7 +17,7 @@ static int guc_log_dump_show(struct seq_file *m, void *data)
>  
>  	return intel_guc_log_dump(m->private, &p, false);
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
>  
>  static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
>  {
> @@ -25,7 +25,7 @@ static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
>  
>  	return intel_guc_log_dump(m->private, &p, true);
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
>  
>  static int guc_log_level_get(void *data, u64 *val)
>  {
> @@ -109,7 +109,7 @@ static const struct file_operations guc_log_relay_fops = {
>  void intel_guc_log_debugfs_register(struct intel_guc_log *log,
>  				    struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "guc_log_dump", &guc_log_dump_fops, NULL },
>  		{ "guc_load_err_log_dump", &guc_load_err_log_dump_fops, NULL },
>  		{ "guc_log_level", &guc_log_level_fops, NULL },
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
> index 5733c15fd123..15998963b863 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
> @@ -5,7 +5,7 @@
>  
>  #include <drm/drm_print.h>
>  
> -#include "gt/debugfs_gt.h"
> +#include "gt/intel_gt_debugfs.h"
>  #include "intel_huc.h"
>  #include "intel_huc_debugfs.h"
>  
> @@ -21,11 +21,11 @@ static int huc_info_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(huc_info);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(huc_info);
>  
>  void intel_huc_debugfs_register(struct intel_huc *huc, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "huc_info", &huc_info_fops, NULL },
>  	};
>  
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
> index 089d98662f46..c2f7924295e7 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
> @@ -6,7 +6,7 @@
>  #include <linux/debugfs.h>
>  #include <drm/drm_print.h>
>  
> -#include "gt/debugfs_gt.h"
> +#include "gt/intel_gt_debugfs.h"
>  #include "intel_guc_debugfs.h"
>  #include "intel_huc_debugfs.h"
>  #include "intel_uc.h"
> @@ -32,11 +32,11 @@ static int uc_usage_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(uc_usage);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(uc_usage);
>  
>  void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "usage", &uc_usage_fops, NULL },
>  	};
>  	struct dentry *root;

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [Intel-gfx] [PATCH 1/4] drm/i915: rename debugfs_gt files
@ 2021-09-14  9:16   ` Jani Nikula
  0 siblings, 0 replies; 23+ messages in thread
From: Jani Nikula @ 2021-09-14  9:16 UTC (permalink / raw)
  To: Lucas De Marchi, intel-gfx
  Cc: dri-devel, Andi Shyti, Chris Wilson, Joonas Lahtinen

On Wed, 08 Sep 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> We shouldn't be using debugfs_ namespace for this functionality. Rename
> debugfs_gt.[ch] to intel_gt_debugfs.[ch] and then make functions,
> defines and structs follow suit.
>
> While at it and since we are renaming the header, sort the includes
> alphabetically.

I didn't do a detailed review, maybe someone should, but superficially
seems good. On the series,

Acked-by: Jani Nikula <jani.nikula@intel.com>

>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                  |  2 +-
>  drivers/gpu/drm/i915/gt/debugfs_engines.c      |  6 +++---
>  drivers/gpu/drm/i915/gt/debugfs_gt_pm.c        | 14 +++++++-------
>  drivers/gpu/drm/i915/gt/intel_gt.c             |  6 +++---
>  .../gt/{debugfs_gt.c => intel_gt_debugfs.c}    |  8 ++++----
>  .../gt/{debugfs_gt.h => intel_gt_debugfs.h}    | 14 +++++++-------
>  drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c   | 10 +++++-----
>  drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 18 +++++++++---------
>  .../gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c |  8 ++++----
>  drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c |  6 +++---
>  drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c  |  6 +++---
>  11 files changed, 49 insertions(+), 49 deletions(-)
>  rename drivers/gpu/drm/i915/gt/{debugfs_gt.c => intel_gt_debugfs.c} (87%)
>  rename drivers/gpu/drm/i915/gt/{debugfs_gt.h => intel_gt_debugfs.h} (71%)
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index c36c8a4f0716..3e171f0b5f6a 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -80,7 +80,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
>  # "Graphics Technology" (aka we talk to the gpu)
>  gt-y += \
>  	gt/debugfs_engines.o \
> -	gt/debugfs_gt.o \
>  	gt/debugfs_gt_pm.o \
>  	gt/gen2_engine_cs.o \
>  	gt/gen6_engine_cs.o \
> @@ -101,6 +100,7 @@ gt-y += \
>  	gt/intel_gt.o \
>  	gt/intel_gt_buffer_pool.o \
>  	gt/intel_gt_clock_utils.o \
> +	gt/intel_gt_debugfs.o \
>  	gt/intel_gt_irq.o \
>  	gt/intel_gt_pm.o \
>  	gt/intel_gt_pm_irq.o \
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c b/drivers/gpu/drm/i915/gt/debugfs_engines.c
> index 5e3725e62241..2980dac5b171 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
> +++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
> @@ -7,9 +7,9 @@
>  #include <drm/drm_print.h>
>  
>  #include "debugfs_engines.h"
> -#include "debugfs_gt.h"
>  #include "i915_drv.h" /* for_each_engine! */
>  #include "intel_engine.h"
> +#include "intel_gt_debugfs.h"
>  
>  static int engines_show(struct seq_file *m, void *data)
>  {
> @@ -24,11 +24,11 @@ static int engines_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(engines);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
>  
>  void debugfs_engines_register(struct intel_gt *gt, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "engines", &engines_fops },
>  	};
>  
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
> index f6733f279890..9222cf68c56c 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
> @@ -6,11 +6,11 @@
>  
>  #include <linux/seq_file.h>
>  
> -#include "debugfs_gt.h"
>  #include "debugfs_gt_pm.h"
>  #include "i915_drv.h"
>  #include "intel_gt.h"
>  #include "intel_gt_clock_utils.h"
> +#include "intel_gt_debugfs.h"
>  #include "intel_gt_pm.h"
>  #include "intel_llc.h"
>  #include "intel_rc6.h"
> @@ -36,7 +36,7 @@ static int fw_domains_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(fw_domains);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(fw_domains);
>  
>  static void print_rc6_res(struct seq_file *m,
>  			  const char *title,
> @@ -238,7 +238,7 @@ static int drpc_show(struct seq_file *m, void *unused)
>  
>  	return err;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(drpc);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(drpc);
>  
>  static int frequency_show(struct seq_file *m, void *unused)
>  {
> @@ -480,7 +480,7 @@ static int frequency_show(struct seq_file *m, void *unused)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(frequency);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(frequency);
>  
>  static int llc_show(struct seq_file *m, void *data)
>  {
> @@ -533,7 +533,7 @@ static bool llc_eval(void *data)
>  	return HAS_LLC(gt->i915);
>  }
>  
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(llc);
>  
>  static const char *rps_power_to_str(unsigned int power)
>  {
> @@ -612,11 +612,11 @@ static bool rps_eval(void *data)
>  	return HAS_RPS(gt->i915);
>  }
>  
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(rps_boost);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rps_boost);
>  
>  void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "drpc", &drpc_fops, NULL },
>  		{ "frequency", &frequency_fops, NULL },
>  		{ "forcewake", &fw_domains_fops, NULL },
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2aeaae036a6f..9dda17553e12 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -3,7 +3,7 @@
>   * Copyright © 2019 Intel Corporation
>   */
>  
> -#include "debugfs_gt.h"
> +#include "intel_gt_debugfs.h"
>  
>  #include "gem/i915_gem_lmem.h"
>  #include "i915_drv.h"
> @@ -15,11 +15,11 @@
>  #include "intel_gt_requests.h"
>  #include "intel_migrate.h"
>  #include "intel_mocs.h"
> +#include "intel_pm.h"
>  #include "intel_rc6.h"
>  #include "intel_renderstate.h"
>  #include "intel_rps.h"
>  #include "intel_uncore.h"
> -#include "intel_pm.h"
>  #include "shmem_utils.h"
>  
>  void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
> @@ -434,7 +434,7 @@ void intel_gt_driver_register(struct intel_gt *gt)
>  {
>  	intel_rps_driver_register(&gt->rps);
>  
> -	debugfs_gt_register(gt);
> +	intel_gt_register_debugfs(gt);
>  }
>  
>  static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> similarity index 87%
> rename from drivers/gpu/drm/i915/gt/debugfs_gt.c
> rename to drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> index 591eb60785db..a27ba11605d8 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> @@ -6,13 +6,13 @@
>  #include <linux/debugfs.h>
>  
>  #include "debugfs_engines.h"
> -#include "debugfs_gt.h"
>  #include "debugfs_gt_pm.h"
> +#include "i915_drv.h"
> +#include "intel_gt_debugfs.h"
>  #include "intel_sseu_debugfs.h"
>  #include "uc/intel_uc_debugfs.h"
> -#include "i915_drv.h"
>  
> -void debugfs_gt_register(struct intel_gt *gt)
> +void intel_gt_register_debugfs(struct intel_gt *gt)
>  {
>  	struct dentry *root;
>  
> @@ -31,7 +31,7 @@ void debugfs_gt_register(struct intel_gt *gt)
>  }
>  
>  void intel_gt_debugfs_register_files(struct dentry *root,
> -				     const struct debugfs_gt_file *files,
> +				     const struct intel_gt_debugfs_file *files,
>  				     unsigned long count, void *data)
>  {
>  	while (count--) {
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
> similarity index 71%
> rename from drivers/gpu/drm/i915/gt/debugfs_gt.h
> rename to drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
> index f77540f727e9..cab0f2cb5009 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.h
> @@ -3,14 +3,14 @@
>   * Copyright © 2019 Intel Corporation
>   */
>  
> -#ifndef DEBUGFS_GT_H
> -#define DEBUGFS_GT_H
> +#ifndef INTEL_GT_DEBUGFS_H
> +#define INTEL_GT_DEBUGFS_H
>  
>  #include <linux/file.h>
>  
>  struct intel_gt;
>  
> -#define DEFINE_GT_DEBUGFS_ATTRIBUTE(__name)				\
> +#define DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(__name)				\
>  	static int __name ## _open(struct inode *inode, struct file *file) \
>  {									\
>  	return single_open(file, __name ## _show, inode->i_private);	\
> @@ -23,16 +23,16 @@ static const struct file_operations __name ## _fops = {			\
>  	.release = single_release,					\
>  }
>  
> -void debugfs_gt_register(struct intel_gt *gt);
> +void intel_gt_register_debugfs(struct intel_gt *gt);
>  
> -struct debugfs_gt_file {
> +struct intel_gt_debugfs_file {
>  	const char *name;
>  	const struct file_operations *fops;
>  	bool (*eval)(void *data);
>  };
>  
>  void intel_gt_debugfs_register_files(struct dentry *root,
> -				     const struct debugfs_gt_file *files,
> +				     const struct intel_gt_debugfs_file *files,
>  				     unsigned long count, void *data);
>  
> -#endif /* DEBUGFS_GT_H */
> +#endif /* INTEL_GT_DEBUGFS_H */
> diff --git a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
> index 1ba8b7da9d37..8bb3a91dad82 100644
> --- a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
> @@ -4,9 +4,9 @@
>   * Copyright © 2020 Intel Corporation
>   */
>  
> -#include "debugfs_gt.h"
> -#include "intel_sseu_debugfs.h"
>  #include "i915_drv.h"
> +#include "intel_gt_debugfs.h"
> +#include "intel_sseu_debugfs.h"
>  
>  static void sseu_copy_subslices(const struct sseu_dev_info *sseu,
>  				int slice, u8 *to_mask)
> @@ -282,7 +282,7 @@ static int sseu_status_show(struct seq_file *m, void *unused)
>  
>  	return intel_sseu_status(m, gt);
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(sseu_status);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(sseu_status);
>  
>  static int rcs_topology_show(struct seq_file *m, void *unused)
>  {
> @@ -293,11 +293,11 @@ static int rcs_topology_show(struct seq_file *m, void *unused)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(rcs_topology);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(rcs_topology);
>  
>  void intel_sseu_debugfs_register(struct intel_gt *gt, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "sseu_status", &sseu_status_fops, NULL },
>  		{ "rcs_topology", &rcs_topology_fops, NULL },
>  	};
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> index 887c8c8f35db..25f09a420561 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> @@ -5,14 +5,14 @@
>  
>  #include <drm/drm_print.h>
>  
> -#include "gt/debugfs_gt.h"
> +#include "gt/intel_gt_debugfs.h"
> +#include "gt/uc/intel_guc_ads.h"
> +#include "gt/uc/intel_guc_ct.h"
> +#include "gt/uc/intel_guc_slpc.h"
> +#include "gt/uc/intel_guc_submission.h"
>  #include "intel_guc.h"
>  #include "intel_guc_debugfs.h"
>  #include "intel_guc_log_debugfs.h"
> -#include "gt/uc/intel_guc_ct.h"
> -#include "gt/uc/intel_guc_ads.h"
> -#include "gt/uc/intel_guc_submission.h"
> -#include "gt/uc/intel_guc_slpc.h"
>  
>  static int guc_info_show(struct seq_file *m, void *data)
>  {
> @@ -35,7 +35,7 @@ static int guc_info_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_info);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_info);
>  
>  static int guc_registered_contexts_show(struct seq_file *m, void *data)
>  {
> @@ -49,7 +49,7 @@ static int guc_registered_contexts_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
>  
>  static int guc_slpc_info_show(struct seq_file *m, void *unused)
>  {
> @@ -62,7 +62,7 @@ static int guc_slpc_info_show(struct seq_file *m, void *unused)
>  
>  	return intel_guc_slpc_print_info(slpc, &p);
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
>  
>  static bool intel_eval_slpc_support(void *data)
>  {
> @@ -73,7 +73,7 @@ static bool intel_eval_slpc_support(void *data)
>  
>  void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "guc_info", &guc_info_fops, NULL },
>  		{ "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
>  		{ "guc_slpc_info", &guc_slpc_info_fops, &intel_eval_slpc_support},
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
> index 64e0b86bf258..46026c2c1722 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
> @@ -6,7 +6,7 @@
>  #include <linux/fs.h>
>  #include <drm/drm_print.h>
>  
> -#include "gt/debugfs_gt.h"
> +#include "gt/intel_gt_debugfs.h"
>  #include "intel_guc.h"
>  #include "intel_guc_log.h"
>  #include "intel_guc_log_debugfs.h"
> @@ -17,7 +17,7 @@ static int guc_log_dump_show(struct seq_file *m, void *data)
>  
>  	return intel_guc_log_dump(m->private, &p, false);
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_log_dump);
>  
>  static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
>  {
> @@ -25,7 +25,7 @@ static int guc_load_err_log_dump_show(struct seq_file *m, void *data)
>  
>  	return intel_guc_log_dump(m->private, &p, true);
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(guc_load_err_log_dump);
>  
>  static int guc_log_level_get(void *data, u64 *val)
>  {
> @@ -109,7 +109,7 @@ static const struct file_operations guc_log_relay_fops = {
>  void intel_guc_log_debugfs_register(struct intel_guc_log *log,
>  				    struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "guc_log_dump", &guc_log_dump_fops, NULL },
>  		{ "guc_load_err_log_dump", &guc_load_err_log_dump_fops, NULL },
>  		{ "guc_log_level", &guc_log_level_fops, NULL },
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
> index 5733c15fd123..15998963b863 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
> @@ -5,7 +5,7 @@
>  
>  #include <drm/drm_print.h>
>  
> -#include "gt/debugfs_gt.h"
> +#include "gt/intel_gt_debugfs.h"
>  #include "intel_huc.h"
>  #include "intel_huc_debugfs.h"
>  
> @@ -21,11 +21,11 @@ static int huc_info_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(huc_info);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(huc_info);
>  
>  void intel_huc_debugfs_register(struct intel_huc *huc, struct dentry *root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "huc_info", &huc_info_fops, NULL },
>  	};
>  
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
> index 089d98662f46..c2f7924295e7 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
> @@ -6,7 +6,7 @@
>  #include <linux/debugfs.h>
>  #include <drm/drm_print.h>
>  
> -#include "gt/debugfs_gt.h"
> +#include "gt/intel_gt_debugfs.h"
>  #include "intel_guc_debugfs.h"
>  #include "intel_huc_debugfs.h"
>  #include "intel_uc.h"
> @@ -32,11 +32,11 @@ static int uc_usage_show(struct seq_file *m, void *data)
>  
>  	return 0;
>  }
> -DEFINE_GT_DEBUGFS_ATTRIBUTE(uc_usage);
> +DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(uc_usage);
>  
>  void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root)
>  {
> -	static const struct debugfs_gt_file files[] = {
> +	static const struct intel_gt_debugfs_file files[] = {
>  		{ "usage", &uc_usage_fops, NULL },
>  	};
>  	struct dentry *root;

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [Intel-gfx] [PATCH 1/4] drm/i915: rename debugfs_gt files
  2021-09-14  9:16   ` [Intel-gfx] " Jani Nikula
  (?)
@ 2021-09-14 14:46   ` Lucas De Marchi
  2021-09-14 15:02     ` Jani Nikula
  -1 siblings, 1 reply; 23+ messages in thread
From: Lucas De Marchi @ 2021-09-14 14:46 UTC (permalink / raw)
  To: Jani Nikula
  Cc: intel-gfx, dri-devel, Andi Shyti, Chris Wilson, Joonas Lahtinen

On Tue, Sep 14, 2021 at 12:16:13PM +0300, Jani Nikula wrote:
>On Wed, 08 Sep 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
>> We shouldn't be using debugfs_ namespace for this functionality. Rename
>> debugfs_gt.[ch] to intel_gt_debugfs.[ch] and then make functions,
>> defines and structs follow suit.
>>
>> While at it and since we are renaming the header, sort the includes
>> alphabetically.
>
>I didn't do a detailed review, maybe someone should, but superficially
>seems good. On the series,
>
>Acked-by: Jani Nikula <jani.nikula@intel.com>

thanks. What about the question I raised on

intel_gt_register_debugfs() vs
intel_gt_debugfs_register()?

and

intel_gt_pm_register_debugfs() vs
intel_gt_pm_debugfs_register()?

what would be prefered here?

thanks
Lucas De Marchi

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [Intel-gfx] [PATCH 1/4] drm/i915: rename debugfs_gt files
  2021-09-14 14:46   ` Lucas De Marchi
@ 2021-09-14 15:02     ` Jani Nikula
  0 siblings, 0 replies; 23+ messages in thread
From: Jani Nikula @ 2021-09-14 15:02 UTC (permalink / raw)
  To: Lucas De Marchi
  Cc: intel-gfx, dri-devel, Andi Shyti, Chris Wilson, Joonas Lahtinen

On Tue, 14 Sep 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> On Tue, Sep 14, 2021 at 12:16:13PM +0300, Jani Nikula wrote:
>>On Wed, 08 Sep 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
>>> We shouldn't be using debugfs_ namespace for this functionality. Rename
>>> debugfs_gt.[ch] to intel_gt_debugfs.[ch] and then make functions,
>>> defines and structs follow suit.
>>>
>>> While at it and since we are renaming the header, sort the includes
>>> alphabetically.
>>
>>I didn't do a detailed review, maybe someone should, but superficially
>>seems good. On the series,
>>
>>Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> thanks. What about the question I raised on
>
> intel_gt_register_debugfs() vs
> intel_gt_debugfs_register()?
>
> and
>
> intel_gt_pm_register_debugfs() vs
> intel_gt_pm_debugfs_register()?
>
> what would be prefered here?

Nowadays I try to juggle the function names to have the prefix match the
filename. I think the driver has grown so big that we need that to help
with our mental model of what goes where. Beyond that, whatever flows
more naturally when you say it out aloud.

BR,
Jani.


-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 23+ messages in thread
* Re: [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files
  2021-09-10 17:52   ` [Intel-gfx] " Lucas De Marchi
  2021-09-10 21:14     ` Yokoyama, Caz
@ 2021-09-15  0:24     ` Matt Roper
  1 sibling, 0 replies; 23+ messages in thread
From: Matt Roper @ 2021-09-15  0:24 UTC (permalink / raw)
  To: Lucas De Marchi
  Cc: intel-gfx, dri-devel, Jani Nikula, Andi Shyti, Chris Wilson,
	Joonas Lahtinen

On Fri, Sep 10, 2021 at 10:52:57AM -0700, Lucas De Marchi wrote:
> On Wed, Sep 08, 2021 at 05:49:40PM -0700, Lucas De Marchi wrote:
> > We shouldn't be using debugfs_ namespace for this functionality. Rename
> > debugfs_gt_pm.[ch] to intel_gt_pm_debugfs.[ch] and then make
> > functions, defines and structs follow suit.
> > 
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > ---
> > drivers/gpu/drm/i915/Makefile                      |  2 +-
> > drivers/gpu/drm/i915/gt/debugfs_gt_pm.h            | 14 --------------
> > drivers/gpu/drm/i915/gt/intel_gt_debugfs.c         |  4 ++--
> > .../gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c}  |  4 ++--
> > drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h      | 14 ++++++++++++++
> > 5 files changed, 19 insertions(+), 19 deletions(-)
> > delete mode 100644 drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > rename drivers/gpu/drm/i915/gt/{debugfs_gt_pm.c => intel_gt_pm_debugfs.c} (99%)
> > create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.h
> > 
> > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> > index 232c9673a2e5..dd656f2d7721 100644
> > --- a/drivers/gpu/drm/i915/Makefile
> > +++ b/drivers/gpu/drm/i915/Makefile
> > @@ -79,7 +79,6 @@ i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
> > 
> > # "Graphics Technology" (aka we talk to the gpu)
> > gt-y += \
> > -	gt/debugfs_gt_pm.o \
> > 	gt/gen2_engine_cs.o \
> > 	gt/gen6_engine_cs.o \
> > 	gt/gen6_ppgtt.o \
> > @@ -103,6 +102,7 @@ gt-y += \
> > 	gt/intel_gt_engines_debugfs.o \
> > 	gt/intel_gt_irq.o \
> > 	gt/intel_gt_pm.o \
> > +	gt/intel_gt_pm_debugfs.o \
> > 	gt/intel_gt_pm_irq.o \
> > 	gt/intel_gt_requests.o \
> > 	gt/intel_gtt.o \
> > diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > deleted file mode 100644
> > index 4cf5f5c9da7d..000000000000
> > --- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.h
> > +++ /dev/null
> > @@ -1,14 +0,0 @@
> > -/* SPDX-License-Identifier: MIT */
> > -/*
> > - * Copyright © 2019 Intel Corporation
> > - */
> > -
> > -#ifndef DEBUGFS_GT_PM_H
> > -#define DEBUGFS_GT_PM_H
> > -
> > -struct intel_gt;
> > -struct dentry;
> > -
> > -void debugfs_gt_pm_register(struct intel_gt *gt, struct dentry *root);
> > -
> > -#endif /* DEBUGFS_GT_PM_H */
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > index e5d173c235a3..4096ee893b69 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
> > @@ -5,10 +5,10 @@
> > 
> > #include <linux/debugfs.h>
> > 
> > -#include "debugfs_gt_pm.h"
> > #include "i915_drv.h"
> > #include "intel_gt_debugfs.h"
> > #include "intel_gt_engines_debugfs.h"
> > +#include "intel_gt_pm_debugfs.h"
> > #include "intel_sseu_debugfs.h"
> > #include "uc/intel_uc_debugfs.h"
> > 
> > @@ -24,7 +24,7 @@ void intel_gt_register_debugfs(struct intel_gt *gt)
> > 		return;
> > 
> > 	intel_gt_engines_register_debugfs(gt, root);
> > -	debugfs_gt_pm_register(gt, root);
> > +	intel_gt_pm_register_debugfs(gt, root);
> 
> This is one case I usually don't know what convention to follow since it
> changes in different places.
> 
> I did it like xxxx_register_debugfs because of calls like
> intel_gt_init_scratch(), xxx_init_hw, etc. However here I see that just
> below we have intel_sseu_debugfs_register(), so maybe I should consider
> debugfs as part of the namespace?

I like *_debugfs_register slightly better than *_register_debugfs
because to me we're not registering debugfs itself, we're performing
debugfs' register operation on some files.  But I don't really have a
strong feeling either way.  Whichever way you decide,

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

for the series.


Matt

> 
> Lucas De Marchi

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

^ permalink raw reply	[flat|nested] 23+ messages in thread
end of thread, other threads:[~2021-09-15  0:25 UTC | newest]

Thread overview: 23+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-09  0:49 [Intel-gfx] [PATCH 1/4] drm/i915: rename debugfs_gt files Lucas De Marchi
2021-09-09  0:49 ` Lucas De Marchi
2021-09-09  0:49 ` [Intel-gfx] [PATCH 2/4] drm/i915: rename debugfs_engines files Lucas De Marchi
2021-09-09  0:49   ` Lucas De Marchi
2021-09-09  0:49 ` [Intel-gfx] [PATCH 3/4] drm/i915: rename debugfs_gt_pm files Lucas De Marchi
2021-09-09  0:49   ` Lucas De Marchi
2021-09-10 17:52   ` [Intel-gfx] " Lucas De Marchi
2021-09-10 21:14     ` Yokoyama, Caz
2021-09-10 21:52       ` Lucas De Marchi
2021-09-10 23:53         ` Yokoyama, Caz
2021-09-15  0:24     ` Matt Roper
2021-09-09  0:49 ` [Intel-gfx] [PATCH 4/4] drm/i915: deduplicate frequency dump on debugfs Lucas De Marchi
2021-09-09  0:49   ` Lucas De Marchi
2021-09-09  1:06 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: rename debugfs_gt files Patchwork
2021-09-09  1:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-09  2:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-09  6:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: rename debugfs_gt files (rev2) Patchwork
2021-09-09  7:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-09  8:51 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-14  9:16 ` [PATCH 1/4] drm/i915: rename debugfs_gt files Jani Nikula
2021-09-14  9:16   ` [Intel-gfx] " Jani Nikula
2021-09-14 14:46   ` Lucas De Marchi
2021-09-14 15:02     ` Jani Nikula

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