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Mon, 26 Apr 2021 10:49:17 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id s16sm181006wmh.11.2021.04.26.10.49.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Apr 2021 10:49:16 -0700 (PDT) Received: from zen (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id E2A8C1FF7E; Mon, 26 Apr 2021 18:49:15 +0100 (BST) References: <87a6pp6lit.fsf@linaro.org> <2E8FB56E-AA11-46A1-8072-C43E8A5A854E@uci.edu> User-agent: mu4e 1.5.12; emacs 28.0.50 From: Alex =?utf-8?Q?Benn=C3=A9e?= To: Min-Yih Hsu Subject: Re: [RFC] tcg plugin: Additional plugin interface Date: Mon, 26 Apr 2021 18:42:51 +0100 In-reply-to: <2E8FB56E-AA11-46A1-8072-C43E8A5A854E@uci.edu> Message-ID: <87o8e1rl5w.fsf@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aaron Lindsay , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Min-Yih Hsu writes: > Hi Alex, > >> On Apr 23, 2021, at 8:44 AM, Alex Benn=C3=A9e w= rote: >>=20 >>=20 >> Min-Yih Hsu writes: >>=20 >>> Hi Alex and QEMU developers, >>>=20 >>> Recently I was working with the TCG plugin. I found that `qemu_plugin_c= b_flags` seems to reserve the functionality to >>> read / write CPU register state, I'm wondering if you can share some >>> roadmap or thoughts on this feature? >>=20 >> I think reading the CPU register state is certainly on the roadmap, >> writing registers presents a more philosophical question of if it opens >> the way to people attempting a GPL bypass via plugins. However reading >> registers would certainly be a worthwhile addition to the API. > > Interesting=E2=80=A6I=E2=80=99ve never thought about this problem before. > >>=20 >>> Personally I see reading the CPU register state as (kind of) low-hangin= g fruit. The most straightforward way to implement >>> it will be adding another function that can be called by insn_exec call= backs to read (v)CPU register values. What do you >>> think about this? >>=20 >> It depends on your definition of low hanging fruit ;-) >>=20 >> Yes the implementation would be a simple helper which could be called >> from a callback - I don't think we need to limit it to just insn_exec. I >> think the challenge is proving a non-ugly API that works cleanly across >> all the architectures. I'm not keen on exposing arbitrary gdb register >> IDs to the plugins. >>=20 >> There has been some discussion previously on the list which is probably >> worth reviewing: >>=20 >> Date: Mon, 7 Dec 2020 16:03:24 -0500 >> From: Aaron Lindsay >> Subject: Plugin Register Accesses >> Message-ID: >>=20 >> But in short I think we need a new subsystem in QEMU where frontends can >> register registers (sic) and then provide a common API for various >> users. This common subsystem would then be the source of data for: >>=20 >> - plugins >> - gdbstub >> - monitor (info registers) >> - -d LOG_CPU logging >>=20 >> If you are interested in tackling such a project I'm certainly happy to >> provide pointers and review. > > Thank you! Yeah I=E2=80=99m definitely going to scratch a prototype for t= his > register reading plugin interface. I=E2=80=99ll take a look at related em= ail > discussions. Awesome - please CC me on any patches you come up with (as well as qemu-devel of course ;-). > > Best, > -Min > >>=20 >>>=20 >>> Thank you >>> -Min >>=20 >>=20 >> --=20 >> Alex Benn=C3=A9e --=20 Alex Benn=C3=A9e