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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf
Date: Wed, 12 Feb 2020 17:36:40 +0200	[thread overview]
Message-ID: <87o8u3yfzr.fsf@intel.com> (raw)
In-Reply-To: <20200212152525.23108-1-stanislav.lisovskiy@intel.com>

On Wed, 12 Feb 2020, Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> wrote:
> TGL BIOS seems to enable both DBuf slices ocasionally, depending
> how many displays are connected, while i915 according to BSpec
> was powering on S1 DBuf slice, until a modeset was done.
>
> This was causing a brief flash during the boot as we were
> disabling slice, previously used by BIOS with that.
>
> To prevent this, now we are ensuring tht we are enabling
> _at least_ one slice, but if there are more, let's not
> power them off.
>
> Fixes: ff2cd8635e41 ("drm/i915: Correctly map DBUF slices to pipes")
> Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 53056def5414..b9a9cbad8a03 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -4470,11 +4470,13 @@ void icl_dbuf_slices_update(struct drm_i915_private *dev_priv,
>  
>  static void icl_dbuf_enable(struct drm_i915_private *dev_priv)
>  {
> +	skl_ddb_get_hw_state(dev_priv);
>  	/*
> -	 * Just power up 1 slice, we will
> +	 * Just power up at least 1 slice, we will
>  	 * figure out later which slices we have and what we need.
>  	 */
> -	icl_dbuf_slices_update(dev_priv, BIT(DBUF_S1));
> +	icl_dbuf_slices_update(dev_priv, dev_priv->enabled_dbuf_slices_mask |
> +			       BIT(DBUF_S1));

I don't know anything about this, but it seems obvious to me the
enabling code should not do hardware readout; they should be separated
from a much higher level.

BR,
Jani.


>  }
>  
>  static void icl_dbuf_disable(struct drm_i915_private *dev_priv)

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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  reply	other threads:[~2020-02-12 15:36 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-12 15:25 [Intel-gfx] [PATCH v1] drm/i915: Ensure no conflicts with BIOS when updating Dbuf Stanislav Lisovskiy
2020-02-12 15:36 ` Jani Nikula [this message]
2020-02-12 15:51   ` Ville Syrjälä
2020-02-12 15:52   ` Lisovskiy, Stanislav
2020-02-13  4:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-02-16 14:03 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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