From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35992) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bRZ3r-0001Lh-RO for qemu-devel@nongnu.org; Mon, 25 Jul 2016 02:08:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bRZ3n-0007cA-K7 for qemu-devel@nongnu.org; Mon, 25 Jul 2016 02:08:18 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:32387 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bRZ3n-0007c5-Es for qemu-devel@nongnu.org; Mon, 25 Jul 2016 02:08:15 -0400 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u6P64QK6129891 for ; Mon, 25 Jul 2016 02:08:14 -0400 Received: from e28smtp07.in.ibm.com (e28smtp07.in.ibm.com [125.16.236.7]) by mx0b-001b2d01.pphosted.com with ESMTP id 24c4qkqkdn-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 25 Jul 2016 02:08:14 -0400 Received: from localhost by e28smtp07.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 25 Jul 2016 11:38:11 +0530 From: Nikunj A Dadhania In-Reply-To: <87r3ai8ehu.fsf@abhimanyu.i-did-not-set--mail-host-address--so-tickle-me> References: <1469263490-19130-1-git-send-email-nikunj@linux.vnet.ibm.com> <1469263490-19130-6-git-send-email-nikunj@linux.vnet.ibm.com> <87r3ai8ehu.fsf@abhimanyu.i-did-not-set--mail-host-address--so-tickle-me> Date: Mon, 25 Jul 2016 11:37:38 +0530 MIME-Version: 1.0 Content-Type: text/plain Message-Id: <87oa5m8d3p.fsf@abhimanyu.i-did-not-set--mail-host-address--so-tickle-me> Subject: Re: [Qemu-devel] [Qemu-ppc] [RFC v2 05/13] target-ppc: add modulo word operations List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson , qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com Nikunj A Dadhania writes: > Richard Henderson writes: > >> On 07/23/2016 02:14 PM, Nikunj A Dadhania wrote: >> +uint32_t helper_modsw(uint32_t rau, uint32_t rbu) >>> +{ >>> + int32_t ra = (int32_t) rau; >>> + int32_t rb = (int32_t) rbu; >>> + >>> + if ((rb == 0) || (ra == INT32_MIN && rb == -1)) { >>> + return 0; >>> + } >>> + return ra % rb; >>> +} >>> + >>> +uint32_t helper_moduw(uint32_t ra, uint32_t rb) >>> +{ >>> + return rb ? ra % rb : 0; >>> +} >> >> I think, like you, I got distracted by the current div implementation in ppc. >> I've just re-read the spec and seen the "undefined" language. Which of course >> gives us much more freedom. > > Right, I too thought of the same but didn't do it in this series. > Current div implementation is pretty complicated. To be precise gen_op_arith_div[d,w]() implementation. >> With this freedom, we can do the division inline, without branches. Please see >> target-mips/translate.c, gen_r6_muldiv. >> >> Basically, we check for the offending cases and modify the divisor prior to the >> division. For unsigned: >> >> a / (b == 0 ? 1 : b) >> >> For signed: >> >> a / ((a == INT_MAX & b == -1) | (b == 0) ? : b) > > Sure, will add it in this series. > > Regards > Nikunj