From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA948C433F5 for ; Wed, 8 Sep 2021 11:19:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7AD6761078 for ; Wed, 8 Sep 2021 11:19:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 7AD6761078 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C12AA6E192; Wed, 8 Sep 2021 11:19:44 +0000 (UTC) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4A97F6E192 for ; Wed, 8 Sep 2021 11:19:43 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10100"; a="281470811" X-IronPort-AV: E=Sophos;i="5.85,277,1624345200"; d="scan'208";a="281470811" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2021 04:19:42 -0700 X-IronPort-AV: E=Sophos;i="5.85,277,1624345200"; d="scan'208";a="538506676" Received: from mdoerbec-mobl1.ger.corp.intel.com (HELO localhost) ([10.249.33.106]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2021 04:19:39 -0700 From: Jani Nikula To: Lee Shawn C , intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, vandita.kulkarni@intel.com, cooper.chiou@intel.com, william.tseng@intel.com, Lee Shawn C In-Reply-To: <20210902121429.27606-5-shawn.c.lee@intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210902121429.27606-1-shawn.c.lee@intel.com> <20210902121429.27606-5-shawn.c.lee@intel.com> Date: Wed, 08 Sep 2021 14:19:36 +0300 Message-ID: <87pmtj5n7b.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Intel-gfx] [v3 4/5] drm/i915/dsi: Retrieve max brightness level from VBT X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, 02 Sep 2021, Lee Shawn C wrote: > So far, DCS backlight driver hardcode (0xFF) for max brightness level. > MIPI DCS spec allow max 0xFFFF for set_display_brightness (51h) command. > And VBT brightness precision bits can support 8 ~ 16 bits. > > We should set correct precision bits in VBT that meet panel's request. > Driver can refer to this setting then configure max brightness level > in DCS backlight driver properly. > > v2: modify variable name brightness_precision_bits instead of > max_brightness_level. > v3: fix checkpatch warning. > > Cc: Ville Syrjala > Cc: Jani Nikula > Cc: Vandita Kulkarni > Cc: Cooper Chiou > Cc: William Tseng > Signed-off-by: Lee Shawn C Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/display/intel_bios.c | 3 +++ > drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c | 10 ++++++++-- > drivers/gpu/drm/i915/i915_drv.h | 1 + > 3 files changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c > index e86e6ed2d3bf..ccaf0a3100f7 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -483,6 +483,9 @@ parse_lfp_backlight(struct drm_i915_private *i915, > level = 255; > } > i915->vbt.backlight.min_brightness = min_level; > + > + i915->vbt.backlight.brightness_precision_bits = > + backlight_data->brightness_precision_bits[panel_type]; > } else { > level = backlight_data->level[panel_type]; > i915->vbt.backlight.min_brightness = entry->min_brightness; > diff --git a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c > index 584c14c4cbd0..567c086602d5 100644 > --- a/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c > +++ b/drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.c > @@ -147,10 +147,16 @@ static void dcs_enable_backlight(const struct intel_crtc_state *crtc_state, > static int dcs_setup_backlight(struct intel_connector *connector, > enum pipe unused) > { > + struct drm_device *dev = connector->base.dev; > + struct drm_i915_private *dev_priv = to_i915(dev); > struct intel_panel *panel = &connector->panel; > > - panel->backlight.max = PANEL_PWM_MAX_VALUE; > - panel->backlight.level = PANEL_PWM_MAX_VALUE; > + if (dev_priv->vbt.backlight.brightness_precision_bits > 8) > + panel->backlight.max = (1 << dev_priv->vbt.backlight.brightness_precision_bits) - 1; > + else > + panel->backlight.max = PANEL_PWM_MAX_VALUE; > + > + panel->backlight.level = panel->backlight.max; > > return 0; > } > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index be2392bbcecc..99a2d308b24d 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -705,6 +705,7 @@ struct intel_vbt_data { > > struct { > u16 pwm_freq_hz; > + u16 brightness_precision_bits; > bool present; > bool active_low_pwm; > u8 min_brightness; /* min_brightness/255 of max */ -- Jani Nikula, Intel Open Source Graphics Center