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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Max Filippov <jcmvbkbc@gmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 00/21] target/xtensa: implement double precision FPU
Date: Tue, 07 Jul 2020 12:31:05 +0100	[thread overview]
Message-ID: <87pn97o93a.fsf@linaro.org> (raw)
In-Reply-To: <20200706234737.32378-1-jcmvbkbc@gmail.com>


Max Filippov <jcmvbkbc@gmail.com> writes:

> Hello,
>
> this series implements double precision floating point unit option for
> target/xtensa, updates FPU tests and adds two new CPU cores, one with
> FPU2000 option and one with DFPU option.
>
> Max Filippov (21):
>   softfloat: make NO_SIGNALING_NANS runtime property
>   softfloat: pass float_status pointer to pickNaN
>   softfloat: add xtensa specialization for pickNaNMulAdd

I've only looked at the softfloat bits as I'm not familiar with xtensa
at all. However you can have a vague:

Tested-by: Alex Bennée <alex.bennee@linaro.org>

for the series - congratulations you pass your own tests ;-)

-- 
Alex Bennée


  parent reply	other threads:[~2020-07-07 11:32 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-06 23:47 [PATCH 00/21] target/xtensa: implement double precision FPU Max Filippov
2020-07-06 23:47 ` [PATCH 01/21] softfloat: make NO_SIGNALING_NANS runtime property Max Filippov
2020-07-07 10:28   ` Alex Bennée
2020-07-08 17:41   ` Philippe Mathieu-Daudé
2020-07-06 23:47 ` [PATCH 02/21] softfloat: pass float_status pointer to pickNaN Max Filippov
2020-07-07 10:29   ` Alex Bennée
2020-07-06 23:47 ` [PATCH 03/21] softfloat: add xtensa specialization for pickNaNMulAdd Max Filippov
2020-07-07 10:29   ` Alex Bennée
2020-07-08 16:07   ` Richard Henderson
2020-07-08 18:11     ` Max Filippov
2020-07-06 23:47 ` [PATCH 04/21] target/xtensa: add geometry to xtensa_get_regfile_by_name Max Filippov
2020-07-06 23:47 ` [PATCH 05/21] target/xtensa: support copying registers up to 64 bits wide Max Filippov
2020-07-08 16:14   ` Richard Henderson
2020-07-08 17:14     ` Max Filippov
2020-07-06 23:47 ` [PATCH 06/21] target/xtensa: rename FPU2000 translators and helpers Max Filippov
2020-07-08 16:18   ` Richard Henderson
2020-07-06 23:47 ` [PATCH 07/21] target/xtensa: move FSR/FCR register accessors Max Filippov
2020-07-08 16:18   ` Richard Henderson
2020-07-06 23:47 ` [PATCH 08/21] target/xtensa: don't access BR regfile directly Max Filippov
2020-07-08 16:18   ` Richard Henderson
2020-07-06 23:47 ` [PATCH 09/21] target/xtensa: add DFP option, registers and opcodes Max Filippov
2020-07-08 16:25   ` Richard Henderson
2020-07-08 17:37     ` Max Filippov
2020-07-09  0:19       ` Richard Henderson
2020-07-09  5:14         ` Max Filippov
2020-07-06 23:47 ` [PATCH 10/21] target/xtensa: implement FPU division and square root Max Filippov
2020-07-06 23:47 ` [PATCH 11/21] tests/tcg/xtensa: fix test execution on ISS Max Filippov
2020-07-06 23:47 ` [PATCH 12/21] tests/tcg/xtensa: update test_fp0_arith for DFPU Max Filippov
2020-07-06 23:47 ` [PATCH 13/21] tests/tcg/xtensa: expand madd tests Max Filippov
2020-07-06 23:47 ` [PATCH 14/21] tests/tcg/xtensa: update test_fp0_conv for DFPU Max Filippov
2020-07-06 23:47 ` [PATCH 15/21] tests/tcg/xtensa: update test_fp1 " Max Filippov
2020-07-06 23:47 ` [PATCH 16/21] tests/tcg/xtensa: update test_lsc " Max Filippov
2020-07-06 23:47 ` [PATCH 17/21] tests/tcg/xtensa: add fp0 div and sqrt tests Max Filippov
2020-07-06 23:47 ` [PATCH 18/21] tests/tcg/xtensa: test double precision load/store Max Filippov
2020-07-06 23:47 ` [PATCH 19/21] tests/tcg/xtensa: add DFP0 arith tests Max Filippov
2020-07-06 23:47 ` [PATCH 20/21] target/xtensa: import DE_233L_FPU core Max Filippov
2020-07-06 23:47 ` [PATCH 21/21] target/xtensa: import DSP3400 core Max Filippov
2020-07-07 11:31 ` Alex Bennée [this message]
2020-07-07 16:56   ` [PATCH 00/21] target/xtensa: implement double precision FPU Max Filippov
2020-07-07 19:21     ` Alex Bennée
2020-07-07 23:14       ` Max Filippov
2020-07-08  8:50         ` Alex Bennée
2020-07-08 22:20 Max Filippov

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