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From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: QEMU Developers <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Omair Javaid <omair.javaid@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v1 2/2] target/arm: defer setting up of aarch64 gdb until arm_cpu_realize
Date: Mon, 07 Jan 2019 08:49:24 +0000	[thread overview]
Message-ID: <87r2dovomj.fsf@linaro.org> (raw)
In-Reply-To: <CAFEAcA_7OgJXKb2YwF9qMwf1J2+hkYwft1us4+yMJ_OeUiJ-jQ@mail.gmail.com>


Peter Maydell <peter.maydell@linaro.org> writes:

> On Thu, 13 Dec 2018 at 11:55, Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>> If we setup earlier we miss the parsing of the aarch64 state of the
>> CPU. If the user has booted up with:
>>
>>   qemu-system-aarch64 -cpu host,aarch64=off -enable-kvm
>>
>> we end up presenting an aarch64 view of the world via the gdbstub and
>> hilarity ensues.
>>
>> Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> Cc: Omair Javaid <omair.javaid@linaro.org>
>> ---
>>  include/hw/arm/arm.h |  2 ++
>>  target/arm/cpu.c     |  4 ++++
>>  target/arm/cpu64.c   | 20 +++++++++++++++-----
>>  3 files changed, 21 insertions(+), 5 deletions(-)
>>
>> diff --git a/include/hw/arm/arm.h b/include/hw/arm/arm.h
>> index ffed39252d..f9a7a6e2fb 100644
>> --- a/include/hw/arm/arm.h
>> +++ b/include/hw/arm/arm.h
>> @@ -171,4 +171,6 @@ void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu,
>>     ticks.  */
>>  extern int system_clock_scale;
>>
>> +void arm_cpu_enable_aarch64_gdbstub(CPUClass *cc);
>> +
>>  #endif /* HW_ARM_H */
>> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
>> index 60411f6bfe..100a72ff81 100644
>> --- a/target/arm/cpu.c
>> +++ b/target/arm/cpu.c
>> @@ -890,9 +890,13 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
>>       * queries ID_ISAR0_EL1 on such a host, the value is UNKNOWN.
>>       * Similarly, we cannot check ID_AA64PFR0 without AArch64 support.
>>       */
>> +#ifdef TARGET_AARCH64
>>      if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
>> +        CPUClass *cc = CPU_GET_CLASS(cs);
>>          no_aa32 = !cpu_isar_feature(aa64_aa32, cpu);
>> +        arm_cpu_enable_aarch64_gdbstub(cc);
>>      }
>> +#endif
>
> This seems weird, because the fields in cc are common
> to all CPUs in the class, and so setting them on
> realize of a specific instance based on properties of
> the instance looks wrong... At least in theory there's
> no reason we couldn't have one -cpu host CPU with
> aarch64=off and one with aarch64=on, though I'm not
> sure our UI allows the user to actually set the
> properties per-cpu like that.

So we should really move these to be object instance methods? Or
possibly have object instance methods that override the class methods if
they are not NULL?

>
> thanks
> -- PMM


-- 
Alex Bennée

  reply	other threads:[~2019-01-07  8:49 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-13 11:55 [Qemu-devel] [PATCH v1 0/2] Fix kvm guest debugging of AA32 guests on AA64 Alex Bennée
2018-12-13 11:55 ` [Qemu-devel] [PATCH v1 1/2] target/arm: kvm64 make guest debug AA32 break point aware Alex Bennée
2018-12-13 12:36   ` Ard Biesheuvel
2018-12-13 14:55     ` Alex Bennée
2018-12-13 22:25       ` Richard Henderson
2018-12-14 16:26         ` Alex Bennée
2018-12-14 16:40           ` Ard Biesheuvel
2018-12-13 22:21   ` Richard Henderson
2018-12-14  8:37   ` Omair Javaid
2018-12-14 13:53     ` Richard Henderson
2018-12-13 11:55 ` [Qemu-devel] [PATCH v1 2/2] target/arm: defer setting up of aarch64 gdb until arm_cpu_realize Alex Bennée
2018-12-13 23:10   ` Richard Henderson
2019-01-04 15:35   ` Peter Maydell
2019-01-07  8:49     ` Alex Bennée [this message]
2018-12-13 11:57 ` [Qemu-devel] [PATCH v1 0/2] Fix kvm guest debugging of AA32 guests on AA64 Mark Rutland
2018-12-13 15:28   ` Alex Bennée

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