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From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, benh@kernel.crashing.org
Subject: Re: [Qemu-devel] [PATCH v4 0/9] POWER9 TCG enablements - part4
Date: Wed, 28 Sep 2016 11:08:04 +0530	[thread overview]
Message-ID: <87shskposj.fsf@abhimanyu.i-did-not-set--mail-host-address--so-tickle-me> (raw)
In-Reply-To: <1475040687-27523-1-git-send-email-nikunj@linux.vnet.ibm.com>

[-- Attachment #1: Type: text/plain, Size: 1677 bytes --]

Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> writes:

> This series contains 7 new instructions for POWER9 ISA3.0
> Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x.
>
> GCC was adding epilogue for every VSX instructions causing change in 
> behaviour. For testing the load vector instructions used mfvsrld/mfvsrd 
> for loading vsr to register. And for testing store vector, used mtvsrdd 
> instructions. This helped in getting rid of the epilogue added by gcc. Tried 
> adding the test cases to kvm-unit-tests, but executing vsx instructions 
> results in cpu exception. Will debug that later. I will send the test code 
> and steps to execute as reply to this email.

Source code for stxv_x.c and lxv_x.c is attached and following are the 
steps to use them:

Compile using IBM Advance toolchain[1]:
=======================================
/opt/at10.0/bin/powerpc64-linux-gnu-gcc -static -O3 lxv_x.c -o be_lxv_x
/opt/at10.0/bin/powerpc64-linux-gnu-gcc -static -O3 stxv_x.c -o be_stxv_x
/opt/at10.0/bin/powerpc64le-linux-gnu-gcc -static -O3 lxv_x.c -o le_lxv_x
/opt/at10.0/bin/powerpc64le-linux-gnu-gcc -static -O3 stxv_x.c -o le_stxv_x

Run following for testing the instructions:
===========================================

for i in lxv_x stxv_x
do
    echo "Running ... $i"
    echo ">>>>>>>>>>>>>>>> LE LE LE >>>>>>>>>>>>>>"
    ../qemu/ppc64le-linux-user/qemu-ppc64le   -cpu POWER9 le_${i}
    echo ">>>>>>>>>>>>>>>> BE BE BE >>>>>>>>>>>>>>"
    ../qemu/ppc64-linux-user/qemu-ppc64   -cpu POWER9 be_${i}
    echo ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>"
done

Regards
Nikunj

1. ftp://ftp.unicamp.br/pub/linuxpatch/toolchain/at/redhat/Fedora22


[-- Attachment #2: stxv_x.c --]
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#include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>

static void print16x1(uint8_t *p)
{
  int i;
  for(i = 0; i < 16; i++)
    printf(" %02X ", p[i]);
  printf("\n");
}

int main(void) {
  __vector uint8_t vrt8;
  uint8_t rb8[16];
  unsigned long hi = 0x0001020310111213;
  unsigned long lo = 0x2021222330313233;

  asm volatile("mtvsrdd %x0, %2, %3;"
               "stxvw4x %x0, 0, %1;"
               : "=ws"(vrt8): "r"(&rb8), "r"(hi), "r"(lo));
  print16x1(rb8);

  asm volatile("mtvsrdd %x0, %2, %3;"
               "stxvh8x %x0, 0, %1;"
               : "=ws"(vrt8) : "r"(&rb8), "r"(hi), "r"(lo));
  print16x1(rb8);

  asm volatile("mtvsrdd %x0, %2, %3;"
               "stxvb16x %x0, 0, %1;"
               : "=ws"(vrt8) : "r"(&rb8), "r"(hi), "r"(lo));
  print16x1(rb8);

  return EXIT_SUCCESS;
}

[-- Attachment #3: lxv_x.c --]
[-- Type: text/plain, Size: 1563 bytes --]

#include <stdio.h>
#include <stdlib.h>
#include <inttypes.h>

int main(void) {
  __vector uint8_t vrt8;
  unsigned long lo, hi;

#if __BYTE_ORDER == __LITTLE_ENDIAN
  uint8_t rb32[16] = {0x03, 0x02, 0x01, 0x00, 0x13, 0x12, 0x11, 0x10,
                      0x23, 0x22, 0x21, 0x20, 0x33, 0x32, 0x31, 0x30};
  uint8_t rb16[16] = {0x01, 0x00, 0x11, 0x10, 0x21, 0x20, 0x31, 0x30,
                      0x41, 0x40, 0x51, 0x50, 0x61, 0x60, 0x71, 0x70};
#else
  uint8_t rb32[16] = {0x00, 0x01, 0x02, 0x03, 0x10, 0x11, 0x12, 0x13,
                      0x20, 0x21, 0x22, 0x23, 0x30, 0x31, 0x32, 0x33};
  uint8_t rb16[16] = {0x00, 0x01, 0x10, 0x11, 0x20, 0x21, 0x30, 0x31,
                      0x40, 0x41, 0x50, 0x51, 0x60, 0x61, 0x70, 0x71};
#endif

  uint8_t rb8[16] = {0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7,
                     0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7};

  asm volatile("lxvw4x %x0, 0, %1;"
               "mfvsrd %2, %x0;"
               "mfvsrld %3, %x0;"
               : "=ws"(vrt8): "r"(&rb32), "r"(hi), "r"(lo));
  printf("lxvw4x:  hi %016lx lo %016lx \n", hi, lo);

  asm volatile("lxvh8x %x0, 0, %1;"
               "mfvsrd %2, %x0;"
               "mfvsrld %3, %x0;"
               : "=ws"(vrt8): "r"(&rb16), "r"(hi), "r"(lo));
  printf("lxvh8x:  hi %016lx lo %016lx \n", hi, lo);

  asm volatile("lxvb16x %x0, 0, %1;"
               "mfvsrd %2, %x0;"
               "mfvsrld %3, %x0;"
               : "=ws"(vrt8): "r"(&rb8), "r"(hi), "r"(lo));
  printf("lxvb16x: hi %016lx lo %016lx \n", hi, lo);

  return EXIT_SUCCESS;
}


  parent reply	other threads:[~2016-09-28  5:38 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-28  5:31 [Qemu-devel] [PATCH v4 0/9] POWER9 TCG enablements - part4 Nikunj A Dadhania
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 1/9] target-ppc: Implement mfvsrld instruction Nikunj A Dadhania
2016-09-28 16:03   ` Richard Henderson
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 2/9] target-ppc: Implement mtvsrdd instruction Nikunj A Dadhania
2016-09-28 16:01   ` Richard Henderson
2016-09-28 17:06     ` Nikunj A Dadhania
2016-09-29  1:29   ` David Gibson
2016-09-29  3:20     ` Nikunj A Dadhania
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 3/9] target-ppc: Implement mtvsrws instruction Nikunj A Dadhania
2016-09-28 16:04   ` Richard Henderson
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 4/9] target-ppc: improve lxvw4x implementation Nikunj A Dadhania
2016-09-28 16:07   ` Richard Henderson
2016-09-29  1:38   ` David Gibson
2016-09-29  2:34     ` Nikunj A Dadhania
2016-09-29  3:41     ` Nikunj A Dadhania
2016-09-29  3:48       ` Richard Henderson
2016-09-29  3:57         ` David Gibson
2016-09-29  3:55       ` David Gibson
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 5/9] target-ppc: improve stxvw4x implementation Nikunj A Dadhania
2016-09-28 16:08   ` Richard Henderson
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 6/9] target-ppc: add lxvh8x instruction Nikunj A Dadhania
2016-09-28 16:12   ` Richard Henderson
2016-09-28 17:11     ` Nikunj A Dadhania
2016-09-28 17:22       ` Richard Henderson
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 7/9] target-ppc: add stxvh8x instruction Nikunj A Dadhania
2016-09-28 16:13   ` Richard Henderson
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 8/9] target-ppc: add lxvb16x instruction Nikunj A Dadhania
2016-09-28 16:13   ` Richard Henderson
2016-09-28  5:31 ` [Qemu-devel] [PATCH v4 9/9] target-ppc: add stxvb16x instruction Nikunj A Dadhania
2016-09-28 16:13   ` Richard Henderson
2016-09-28  5:38 ` Nikunj A Dadhania [this message]
2016-09-28  9:28 ` [Qemu-devel] [Qemu-ppc] [PATCH v4 0/9] POWER9 TCG enablements - part4 Thomas Huth
2016-09-28 11:34   ` Nikunj A Dadhania

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