From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752343AbcFUQHo (ORCPT ); Tue, 21 Jun 2016 12:07:44 -0400 Received: from mga03.intel.com ([134.134.136.65]:21004 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750978AbcFUQHU (ORCPT ); Tue, 21 Jun 2016 12:07:20 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.26,504,1459839600"; d="scan'208";a="126064060" From: Andi Kleen To: x86@kernel.org Cc: linux-kernel@vger.kernel.org, hmh@hmh.eng.br Subject: Re: [PATCH] x86: Report Intel platform_id in /proc/cpuinfo References: <20160602155127.76987-1-andi@firstfloor.org> Date: Tue, 21 Jun 2016 09:05:04 -0700 In-Reply-To: <20160602155127.76987-1-andi@firstfloor.org> (Andi Kleen's message of "Thu, 2 Jun 2016 08:51:27 -0700") Message-ID: <87shw6plxr.fsf@tassilo.jf.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Andi Kleen writes: Ping! Any comments on this patch? > From: Andi Kleen > > We have a need to distinguish systems based on their platform ID. > For example this is useful to distinguish systems with L4 cache > versus ones without. > > There is a 3 bit identifier (also called processor flags) in > the IA32_PLATFORM_ID MSR that can give a more fine grained > identification of the CPU than just the model number/stepping. > > IA32_PLATFORM_ID is architectural. > > The processor flags are already used in the microcode driver. > The MSR can be also accessed through /dev/cpu/*/msr, but that > requires root and is awkward. > > This patch just exports the value retrieved by the microcode > driver in /proc/cpuinfo. If the microcode driver is disabled > it won't be shown, but that seems reasonable. > > v2: Handle 0 platform_id. Fix commit message. > Cc: hmh@hmh.eng.br > Signed-off-by: Andi Kleen > --- > arch/x86/include/asm/processor.h | 2 ++ > arch/x86/kernel/cpu/microcode/intel.c | 2 ++ > arch/x86/kernel/cpu/proc.c | 2 ++ > 3 files changed, 6 insertions(+) > > diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h > index 20c11d1..270209c 100644 > --- a/arch/x86/include/asm/processor.h > +++ b/arch/x86/include/asm/processor.h > @@ -136,6 +136,8 @@ struct cpuinfo_x86 { > /* Index into per_cpu list: */ > u16 cpu_index; > u32 microcode; > + u32 platform_id; > + u8 has_platform_id; > }; > > #define X86_VENDOR_INTEL 0 > diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c > index ee81c54..bcd3f59 100644 > --- a/arch/x86/kernel/cpu/microcode/intel.c > +++ b/arch/x86/kernel/cpu/microcode/intel.c > @@ -812,6 +812,8 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig) > /* get processor flags from MSR 0x17 */ > rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); > csig->pf = 1 << ((val[1] >> 18) & 7); > + cpu_data(cpu_num).platform_id = (val[1] >> 18) & 7; > + cpu_data(cpu_num).has_platform_id = true; > } > > csig->rev = c->microcode; > diff --git a/arch/x86/kernel/cpu/proc.c b/arch/x86/kernel/cpu/proc.c > index 18ca99f..5345d50 100644 > --- a/arch/x86/kernel/cpu/proc.c > +++ b/arch/x86/kernel/cpu/proc.c > @@ -76,6 +76,8 @@ static int show_cpuinfo(struct seq_file *m, void *v) > seq_puts(m, "stepping\t: unknown\n"); > if (c->microcode) > seq_printf(m, "microcode\t: 0x%x\n", c->microcode); > + if (c->has_platform_id) > + seq_printf(m, "platform_id\t: %d\n", c->platform_id); > > if (cpu_has(c, X86_FEATURE_TSC)) { > unsigned int freq = cpufreq_quick_get(cpu); -- ak@linux.intel.com -- Speaking for myself only