From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com ([192.55.52.120]:25148 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750809AbcAGMPA convert rfc822-to-8bit (ORCPT ); Thu, 7 Jan 2016 07:15:00 -0500 From: Jani Nikula To: Daniel Vetter , DRI Development Cc: Intel Graphics Development , Daniel Vetter , Ville =?utf-8?B?U3lyasOkbMOk?= , Patrik Jakobsson , Imre Deak , Meelis Roos , Chris Wilson , stable@vger.kernel.org, Daniel Vetter Subject: Re: [PATCH] drm/i915: Init power domains early in driver load In-Reply-To: <1452167061-27252-1-git-send-email-daniel.vetter@ffwll.ch> References: <1452157856-27360-1-git-send-email-daniel.vetter@ffwll.ch> <1452167061-27252-1-git-send-email-daniel.vetter@ffwll.ch> Date: Thu, 07 Jan 2016 14:14:56 +0200 Message-ID: <87si29ziv3.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: stable-owner@vger.kernel.org List-ID: On Thu, 07 Jan 2016, Daniel Vetter wrote: > Since > > commit ac9b8236551d1177fd07b56aef9b565d1864420d > Author: Ville Syrjälä > Date: Fri Nov 27 18:55:26 2015 +0200 > > drm/i915: Introduce a gmbus power domain > > gmbus also needs the power domain infrastructure right from the start, > since as soon as we register the i2c controllers someone can use them. > > v2: Adjust cleanup paths too (Chris). > > Cc: Ville Syrjälä > Cc: Patrik Jakobsson > Cc: Imre Deak > Cc: Jani Nikula > Cc: Meelis Roos > Cc: Chris Wilson > Fixes: ac9b8236551d ("drm/i915: Introduce a gmbus power domain") > Cc: stable@vger.kernel.org > References: http://www.spinics.net/lists/intel-gfx/msg83075.html > Tested-by: Meelis Roos > Signed-off-by: Daniel Vetter Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93608 > --- > drivers/gpu/drm/i915/i915_dma.c | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c > index 988a3806512a..490d8b0d931e 100644 > --- a/drivers/gpu/drm/i915/i915_dma.c > +++ b/drivers/gpu/drm/i915/i915_dma.c > @@ -398,7 +398,6 @@ static int i915_load_modeset_init(struct drm_device *dev) > if (ret) > goto cleanup_vga_switcheroo; > > - intel_power_domains_init_hw(dev_priv, false); > > intel_csr_ucode_init(dev_priv); > > @@ -1025,6 +1024,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > > intel_irq_init(dev_priv); > intel_uncore_sanitize(dev); > + intel_power_domains_init(dev_priv); > + intel_power_domains_init_hw(dev_priv); > > /* Try to make sure MCHBAR is enabled before poking at it */ > intel_setup_mchbar(dev); > @@ -1057,12 +1058,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > goto out_gem_unload; > } > > - intel_power_domains_init(dev_priv); > - > ret = i915_load_modeset_init(dev); > if (ret < 0) { > DRM_ERROR("failed to init modeset\n"); > - goto out_power_well; > + goto out_vblank; > } > > /* > @@ -1091,8 +1090,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) > > return 0; > > -out_power_well: > - intel_power_domains_fini(dev_priv); > +out_vblank: > drm_vblank_cleanup(dev); > out_gem_unload: > WARN_ON(unregister_oom_notifier(&dev_priv->mm.oom_notifier)); > @@ -1103,6 +1101,7 @@ out_gem_unload: > > intel_teardown_gmbus(dev); > intel_teardown_mchbar(dev); > + intel_power_domains_fini(dev_priv); > pm_qos_remove_request(&dev_priv->pm_qos); > destroy_workqueue(dev_priv->gpu_error.hangcheck_wq); > out_freedpwq: -- Jani Nikula, Intel Open Source Technology Center From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jani Nikula Subject: Re: [PATCH] drm/i915: Init power domains early in driver load Date: Thu, 07 Jan 2016 14:14:56 +0200 Message-ID: <87si29ziv3.fsf@intel.com> References: <1452157856-27360-1-git-send-email-daniel.vetter@ffwll.ch> <1452167061-27252-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1452167061-27252-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: DRI Development Cc: Meelis Roos , Daniel Vetter , Intel Graphics Development , stable@vger.kernel.org, Daniel Vetter List-Id: dri-devel@lists.freedesktop.org T24gVGh1LCAwNyBKYW4gMjAxNiwgRGFuaWVsIFZldHRlciA8ZGFuaWVsLnZldHRlckBmZndsbC5j aD4gd3JvdGU6Cj4gU2luY2UKPgo+IGNvbW1pdCBhYzliODIzNjU1MWQxMTc3ZmQwN2I1NmFlZjli NTY1ZDE4NjQ0MjBkCj4gQXV0aG9yOiBWaWxsZSBTeXJqw6Rsw6QgPHZpbGxlLnN5cmphbGFAbGlu dXguaW50ZWwuY29tPgo+IERhdGU6ICAgRnJpIE5vdiAyNyAxODo1NToyNiAyMDE1ICswMjAwCj4K PiAgICAgZHJtL2k5MTU6IEludHJvZHVjZSBhIGdtYnVzIHBvd2VyIGRvbWFpbgo+Cj4gZ21idXMg YWxzbyBuZWVkcyB0aGUgcG93ZXIgZG9tYWluIGluZnJhc3RydWN0dXJlIHJpZ2h0IGZyb20gdGhl IHN0YXJ0LAo+IHNpbmNlIGFzIHNvb24gYXMgd2UgcmVnaXN0ZXIgdGhlIGkyYyBjb250cm9sbGVy cyBzb21lb25lIGNhbiB1c2UgdGhlbS4KPgo+IHYyOiBBZGp1c3QgY2xlYW51cCBwYXRocyB0b28g KENocmlzKS4KPgo+IENjOiBWaWxsZSBTeXJqw6Rsw6QgPHZpbGxlLnN5cmphbGFAbGludXguaW50 ZWwuY29tPgo+IENjOiBQYXRyaWsgSmFrb2Jzc29uIDxwYXRyaWsuamFrb2Jzc29uQGxpbnV4Lmlu dGVsLmNvbT4KPiBDYzogSW1yZSBEZWFrIDxpbXJlLmRlYWtAaW50ZWwuY29tPgo+IENjOiBKYW5p IE5pa3VsYSA8amFuaS5uaWt1bGFAaW50ZWwuY29tPgo+IENjOiBNZWVsaXMgUm9vcyA8bXJvb3NA bGludXguZWU+Cj4gQ2M6IENocmlzIFdpbHNvbiA8Y2hyaXNAY2hyaXMtd2lsc29uLmNvLnVrPgo+ IEZpeGVzOiBhYzliODIzNjU1MWQgKCJkcm0vaTkxNTogSW50cm9kdWNlIGEgZ21idXMgcG93ZXIg ZG9tYWluIikKPiBDYzogc3RhYmxlQHZnZXIua2VybmVsLm9yZwo+IFJlZmVyZW5jZXM6IGh0dHA6 Ly93d3cuc3Bpbmljcy5uZXQvbGlzdHMvaW50ZWwtZ2Z4L21zZzgzMDc1Lmh0bWwKPiBUZXN0ZWQt Ynk6IE1lZWxpcyBSb29zIDxtcm9vc0BsaW51eC5lZT4KPiBTaWduZWQtb2ZmLWJ5OiBEYW5pZWwg VmV0dGVyIDxkYW5pZWwudmV0dGVyQGludGVsLmNvbT4KCkJ1Z3ppbGxhOiBodHRwczovL2J1Z3Mu ZnJlZWRlc2t0b3Aub3JnL3Nob3dfYnVnLmNnaT9pZD05MzYwOAoKPiAtLS0KPiAgZHJpdmVycy9n cHUvZHJtL2k5MTUvaTkxNV9kbWEuYyB8IDExICsrKysrLS0tLS0tCj4gIDEgZmlsZSBjaGFuZ2Vk LCA1IGluc2VydGlvbnMoKyksIDYgZGVsZXRpb25zKC0pCj4KPiBkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaTkxNV9kbWEuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfZG1h LmMKPiBpbmRleCA5ODhhMzgwNjUxMmEuLjQ5MGQ4YjBkOTMxZSAxMDA2NDQKPiAtLS0gYS9kcml2 ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2RtYS5jCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUv aTkxNV9kbWEuYwo+IEBAIC0zOTgsNyArMzk4LDYgQEAgc3RhdGljIGludCBpOTE1X2xvYWRfbW9k ZXNldF9pbml0KHN0cnVjdCBkcm1fZGV2aWNlICpkZXYpCj4gIAlpZiAocmV0KQo+ICAJCWdvdG8g Y2xlYW51cF92Z2Ffc3dpdGNoZXJvbzsKPiAgCj4gLQlpbnRlbF9wb3dlcl9kb21haW5zX2luaXRf aHcoZGV2X3ByaXYsIGZhbHNlKTsKPiAgCj4gIAlpbnRlbF9jc3JfdWNvZGVfaW5pdChkZXZfcHJp dik7Cj4gIAo+IEBAIC0xMDI1LDYgKzEwMjQsOCBAQCBpbnQgaTkxNV9kcml2ZXJfbG9hZChzdHJ1 Y3QgZHJtX2RldmljZSAqZGV2LCB1bnNpZ25lZCBsb25nIGZsYWdzKQo+ICAKPiAgCWludGVsX2ly cV9pbml0KGRldl9wcml2KTsKPiAgCWludGVsX3VuY29yZV9zYW5pdGl6ZShkZXYpOwo+ICsJaW50 ZWxfcG93ZXJfZG9tYWluc19pbml0KGRldl9wcml2KTsKPiArCWludGVsX3Bvd2VyX2RvbWFpbnNf aW5pdF9odyhkZXZfcHJpdik7Cj4gIAo+ICAJLyogVHJ5IHRvIG1ha2Ugc3VyZSBNQ0hCQVIgaXMg ZW5hYmxlZCBiZWZvcmUgcG9raW5nIGF0IGl0ICovCj4gIAlpbnRlbF9zZXR1cF9tY2hiYXIoZGV2 KTsKPiBAQCAtMTA1NywxMiArMTA1OCwxMCBAQCBpbnQgaTkxNV9kcml2ZXJfbG9hZChzdHJ1Y3Qg ZHJtX2RldmljZSAqZGV2LCB1bnNpZ25lZCBsb25nIGZsYWdzKQo+ICAJCQlnb3RvIG91dF9nZW1f dW5sb2FkOwo+ICAJfQo+ICAKPiAtCWludGVsX3Bvd2VyX2RvbWFpbnNfaW5pdChkZXZfcHJpdik7 Cj4gLQo+ICAJcmV0ID0gaTkxNV9sb2FkX21vZGVzZXRfaW5pdChkZXYpOwo+ICAJaWYgKHJldCA8 IDApIHsKPiAgCQlEUk1fRVJST1IoImZhaWxlZCB0byBpbml0IG1vZGVzZXRcbiIpOwo+IC0JCWdv dG8gb3V0X3Bvd2VyX3dlbGw7Cj4gKwkJZ290byBvdXRfdmJsYW5rOwo+ICAJfQo+ICAKPiAgCS8q Cj4gQEAgLTEwOTEsOCArMTA5MCw3IEBAIGludCBpOTE1X2RyaXZlcl9sb2FkKHN0cnVjdCBkcm1f ZGV2aWNlICpkZXYsIHVuc2lnbmVkIGxvbmcgZmxhZ3MpCj4gIAo+ICAJcmV0dXJuIDA7Cj4gIAo+ IC1vdXRfcG93ZXJfd2VsbDoKPiAtCWludGVsX3Bvd2VyX2RvbWFpbnNfZmluaShkZXZfcHJpdik7 Cj4gK291dF92Ymxhbms6Cj4gIAlkcm1fdmJsYW5rX2NsZWFudXAoZGV2KTsKPiAgb3V0X2dlbV91 bmxvYWQ6Cj4gIAlXQVJOX09OKHVucmVnaXN0ZXJfb29tX25vdGlmaWVyKCZkZXZfcHJpdi0+bW0u b29tX25vdGlmaWVyKSk7Cj4gQEAgLTExMDMsNiArMTEwMSw3IEBAIG91dF9nZW1fdW5sb2FkOgo+ ICAKPiAgCWludGVsX3RlYXJkb3duX2dtYnVzKGRldik7Cj4gIAlpbnRlbF90ZWFyZG93bl9tY2hi YXIoZGV2KTsKPiArCWludGVsX3Bvd2VyX2RvbWFpbnNfZmluaShkZXZfcHJpdik7Cj4gIAlwbV9x b3NfcmVtb3ZlX3JlcXVlc3QoJmRldl9wcml2LT5wbV9xb3MpOwo+ICAJZGVzdHJveV93b3JrcXVl dWUoZGV2X3ByaXYtPmdwdV9lcnJvci5oYW5nY2hlY2tfd3EpOwo+ICBvdXRfZnJlZWRwd3E6Cgot LSAKSmFuaSBOaWt1bGEsIEludGVsIE9wZW4gU291cmNlIFRlY2hub2xvZ3kgQ2VudGVyCl9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWls aW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJl ZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==