From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE02CC433F5 for ; Fri, 22 Oct 2021 18:43:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B4D00611F2 for ; Fri, 22 Oct 2021 18:43:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232226AbhJVSpj (ORCPT ); Fri, 22 Oct 2021 14:45:39 -0400 Received: from mail.kernel.org ([198.145.29.99]:57028 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231511AbhJVSph (ORCPT ); Fri, 22 Oct 2021 14:45:37 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 43E0B6103D; Fri, 22 Oct 2021 18:43:19 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mdzVd-000yvp-53; Fri, 22 Oct 2021 19:43:17 +0100 Date: Fri, 22 Oct 2021 19:43:16 +0100 Message-ID: <87tuh8uchn.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland Cc: Vladimir Murzin , linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, catalin.marinas@arm.com, deanbo422@gmail.com, green.hu@gmail.com, guoren@kernel.org, jonas@southpole.se, kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk, nickhu@andestech.com, palmer@dabbelt.com, paulmck@kernel.org, paul.walmsley@sifive.com, peterz@infradead.org, shorne@gmail.com, stefan.kristiansson@saunalahti.fi, tglx@linutronix.de, torvalds@linux-foundation.org, tsbogend@alpha.franken.de, vgupta@kernel.org, will@kernel.org Subject: Re: [PATCH 09/15] irq: arm: perform irqentry in entry code In-Reply-To: <20211022175854.GK86184@C02TD0UTHF1T.local> References: <20211021180236.37428-1-mark.rutland@arm.com> <20211021180236.37428-10-mark.rutland@arm.com> <0efc4465-12b5-a568-0228-c744ec0509a3@arm.com> <20211022153602.GE86184@C02TD0UTHF1T.local> <1dc39ac9-1a05-cf8d-2aef-633903a6338d@arm.com> <20211022175854.GK86184@C02TD0UTHF1T.local> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, vladimir.murzin@arm.com, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, catalin.marinas@arm.com, deanbo422@gmail.com, green.hu@gmail.com, guoren@kernel.org, jonas@southpole.se, kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk, nickhu@andestech.com, palmer@dabbelt.com, paulmck@kernel.org, paul.walmsley@sifive.com, peterz@infradead.org, shorne@gmail.com, stefan.kristiansson@saunalahti.fi, tglx@linutronix.de, torvalds@linux-foundation.org, tsbogend@alpha.franken.de, vgupta@kernel.org, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 22 Oct 2021 18:58:54 +0100, Mark Rutland wrote: > > On Fri, Oct 22, 2021 at 05:34:20PM +0100, Vladimir Murzin wrote: > > On 10/22/21 4:36 PM, Mark Rutland wrote: > > > On Fri, Oct 22, 2021 at 04:18:18PM +0100, Vladimir Murzin wrote: > > >> Hi Mark, > > >> > > >> On 10/21/21 7:02 PM, Mark Rutland wrote: > > >>> +/* > > >>> + * TODO: restructure the ARMv7M entry logic so that this entry logic can live > > >>> + * in arch code. > > >>> + */ > > >>> +asmlinkage void __exception_irq_entry > > >>> +static void nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > > >> > > >> I'm seeing build time failure... > > >> > > >> drivers/irqchip/irq-nvic.c:50:8: error: two or more data types in declaration specifiers > > >> static void nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > > >> ^~~~ > > >> drivers/irqchip/irq-nvic.c:50:13: warning: 'nvic_handle_irq' defined but not used [-Wunused-function] > > >> static void nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > > >> > > >> I've fixed that locally and planing to give it a go... > > > > > > Ah, whoops. I've removed the extraneous `static void` from > > > nvic_handle_irq() and build tested that as part of stm32_defconfig. > > > > > > The updated version is in my irq/handle-domain-irq branch at: > > > > > > git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git > > > > > > > $ cat /proc/interrupts > > CPU0 > > 16: 24 nvic_irq 4 Edge mps2-clkevt > > 17: 0 nvic_irq 32 Edge mps2-uart-rx > > 18: 6 nvic_irq 33 Edge mps2-uart-tx > > 19: 0 nvic_irq 47 Edge mps2-uart-overrun > > Err: 0 > > > > So if it helps feel free to add my > > > > Tested-by: Vladimir Murzin # ARMv7M > > Thanks! > > I've folded that in and uppdated the branch. > > > As for TODO, is [1] look something you have been thinking of? IIUC, > > the show stopper is that hwirq is being passed from exception entry > > which retrieved via xPSR (IPSR to be precise). OTOH hwirq also available > > via Interrupt Controller Status Register (ICSR) thus can be used in > > driver itself... I gave [1] a go and it runs fine, yet I admit I might > > be missing something... > > I hadn't thought about it in much detail, but that looks good! > > I was wondering if we needed something like a > handle_arch_vectored_irq(), but if we can rely on the ICSR that seems > simpler overall. I'm not at all familiar with M-class, so I'm not sure > if there are pitfalls in this area. Why can't we just use IPSR instead from the C code? It has the potential of being of lower latency then a MMIO read (though I have no idea whether it makes a material difference on M-class) and from what I can see in the arch spec, they are strictly equivalent. Thanks, M. -- Without deviation from the norm, progress is not possible. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EA42C433EF for ; Fri, 22 Oct 2021 18:44:38 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 38C446103D for ; Fri, 22 Oct 2021 18:44:38 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 38C446103D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Fri, 22 Oct 2021 18:43:19 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mdzVd-000yvp-53; Fri, 22 Oct 2021 19:43:17 +0100 Date: Fri, 22 Oct 2021 19:43:16 +0100 Message-ID: <87tuh8uchn.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland Cc: Vladimir Murzin , linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, catalin.marinas@arm.com, deanbo422@gmail.com, green.hu@gmail.com, guoren@kernel.org, jonas@southpole.se, kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk, nickhu@andestech.com, palmer@dabbelt.com, paulmck@kernel.org, paul.walmsley@sifive.com, peterz@infradead.org, shorne@gmail.com, stefan.kristiansson@saunalahti.fi, tglx@linutronix.de, torvalds@linux-foundation.org, tsbogend@alpha.franken.de, vgupta@kernel.org, will@kernel.org Subject: Re: [PATCH 09/15] irq: arm: perform irqentry in entry code In-Reply-To: <20211022175854.GK86184@C02TD0UTHF1T.local> References: <20211021180236.37428-1-mark.rutland@arm.com> <20211021180236.37428-10-mark.rutland@arm.com> <0efc4465-12b5-a568-0228-c744ec0509a3@arm.com> <20211022153602.GE86184@C02TD0UTHF1T.local> <1dc39ac9-1a05-cf8d-2aef-633903a6338d@arm.com> <20211022175854.GK86184@C02TD0UTHF1T.local> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, vladimir.murzin@arm.com, linux-kernel@vger.kernel.org, aou@eecs.berkeley.edu, catalin.marinas@arm.com, deanbo422@gmail.com, green.hu@gmail.com, guoren@kernel.org, jonas@southpole.se, kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk, nickhu@andestech.com, palmer@dabbelt.com, paulmck@kernel.org, paul.walmsley@sifive.com, peterz@infradead.org, shorne@gmail.com, stefan.kristiansson@saunalahti.fi, tglx@linutronix.de, torvalds@linux-foundation.org, tsbogend@alpha.franken.de, vgupta@kernel.org, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211022_114319_656992_B6F054B4 X-CRM114-Status: GOOD ( 36.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 22 Oct 2021 18:58:54 +0100, Mark Rutland wrote: > > On Fri, Oct 22, 2021 at 05:34:20PM +0100, Vladimir Murzin wrote: > > On 10/22/21 4:36 PM, Mark Rutland wrote: > > > On Fri, Oct 22, 2021 at 04:18:18PM +0100, Vladimir Murzin wrote: > > >> Hi Mark, > > >> > > >> On 10/21/21 7:02 PM, Mark Rutland wrote: > > >>> +/* > > >>> + * TODO: restructure the ARMv7M entry logic so that this entry logic can live > > >>> + * in arch code. > > >>> + */ > > >>> +asmlinkage void __exception_irq_entry > > >>> +static void nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > > >> > > >> I'm seeing build time failure... > > >> > > >> drivers/irqchip/irq-nvic.c:50:8: error: two or more data types in declaration specifiers > > >> static void nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > > >> ^~~~ > > >> drivers/irqchip/irq-nvic.c:50:13: warning: 'nvic_handle_irq' defined but not used [-Wunused-function] > > >> static void nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) > > >> > > >> I've fixed that locally and planing to give it a go... > > > > > > Ah, whoops. I've removed the extraneous `static void` from > > > nvic_handle_irq() and build tested that as part of stm32_defconfig. > > > > > > The updated version is in my irq/handle-domain-irq branch at: > > > > > > git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git > > > > > > > $ cat /proc/interrupts > > CPU0 > > 16: 24 nvic_irq 4 Edge mps2-clkevt > > 17: 0 nvic_irq 32 Edge mps2-uart-rx > > 18: 6 nvic_irq 33 Edge mps2-uart-tx > > 19: 0 nvic_irq 47 Edge mps2-uart-overrun > > Err: 0 > > > > So if it helps feel free to add my > > > > Tested-by: Vladimir Murzin # ARMv7M > > Thanks! > > I've folded that in and uppdated the branch. > > > As for TODO, is [1] look something you have been thinking of? IIUC, > > the show stopper is that hwirq is being passed from exception entry > > which retrieved via xPSR (IPSR to be precise). OTOH hwirq also available > > via Interrupt Controller Status Register (ICSR) thus can be used in > > driver itself... I gave [1] a go and it runs fine, yet I admit I might > > be missing something... > > I hadn't thought about it in much detail, but that looks good! > > I was wondering if we needed something like a > handle_arch_vectored_irq(), but if we can rely on the ICSR that seems > simpler overall. I'm not at all familiar with M-class, so I'm not sure > if there are pitfalls in this area. Why can't we just use IPSR instead from the C code? It has the potential of being of lower latency then a MMIO read (though I have no idea whether it makes a material difference on M-class) and from what I can see in the arch spec, they are strictly equivalent. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel