From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08DCEC04FF3 for ; Mon, 24 May 2021 08:38:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D546961151 for ; Mon, 24 May 2021 08:38:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232450AbhEXIjk (ORCPT ); Mon, 24 May 2021 04:39:40 -0400 Received: from mail.kernel.org ([198.145.29.99]:46998 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232318AbhEXIjf (ORCPT ); Mon, 24 May 2021 04:39:35 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 85C27610CE; Mon, 24 May 2021 08:38:07 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1ll668-003AdG-CN; Mon, 24 May 2021 09:38:04 +0100 Date: Mon, 24 May 2021 09:38:03 +0100 Message-ID: <87tumswmqc.wl-maz@kernel.org> From: Marc Zyngier To: Rob Herring Cc: "linux-kernel@vger.kernel.org" , Thomas Gleixner , Michael Ellerman , Benjamin Herrenschmidt , Paul Mackerras , Ley Foon Tan , Chris Zankel , Max Filippov , Vineet Gupta , Thomas Bogendoerfer , Robert Jarzmik , Russell King , Krzysztof Kozlowski , Yoshinori Sato , Rich Felker , Geert Uytterhoeven , Alex Deucher , Christian =?UTF-8?B?S8O2bmln?= , David Airlie , Daniel Vetter , Rob Clark , Linus Walleij , Lee Jones , Lorenzo Pieralisi , Bjorn Helgaas , Bartosz Golaszewski , Android Kernel Team Subject: Re: [PATCH 30/39] PCI: Bulk conversion to generic_handle_domain_irq() In-Reply-To: References: <20210520163751.27325-1-maz@kernel.org> <20210520163751.27325-31-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: robh@kernel.org, linux-kernel@vger.kernel.org, tglx@linutronix.de, mpe@ellerman.id.au, benh@kernel.crashing.org, paulus@samba.org, ley.foon.tan@intel.com, chris@zankel.net, jcmvbkbc@gmail.com, vgupta@synopsys.com, tsbogend@alpha.franken.de, robert.jarzmik@free.fr, linux@armlinux.org.uk, krzysztof.kozlowski@canonical.com, ysato@users.sourceforge.jp, dalias@libc.org, geert@linux-m68k.org, alexander.deucher@amd.com, christian.koenig@amd.com, airlied@linux.ie, daniel@ffwll.ch, robdclark@gmail.com, linus.walleij@linaro.org, lee.jones@linaro.org, lorenzo.pieralisi@arm.com, bhelgaas@google.com, bgolaszewski@baylibre.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 20 May 2021 18:47:06 +0100, Rob Herring wrote: > > On Thu, May 20, 2021 at 11:57 AM Marc Zyngier wrote: > > > > Wherever possible, replace constructs that match either > > generic_handle_irq(irq_find_mapping()) or > > generic_handle_irq(irq_linear_revmap()) to a single call to > > generic_handle_domain_irq(). > > > > Signed-off-by: Marc Zyngier > > --- > > drivers/pci/controller/dwc/pci-dra7xx.c | 14 +++++--------- > > drivers/pci/controller/dwc/pci-keystone.c | 5 ++--- > > .../pci/controller/dwc/pcie-designware-host.c | 9 ++++----- > > drivers/pci/controller/dwc/pcie-uniphier.c | 6 ++---- > > .../controller/mobiveil/pcie-mobiveil-host.c | 15 ++++++--------- > > drivers/pci/controller/pci-aardvark.c | 5 ++--- > > drivers/pci/controller/pci-ftpci100.c | 2 +- > > drivers/pci/controller/pci-tegra.c | 8 +++----- > > drivers/pci/controller/pci-xgene-msi.c | 9 +++------ > > drivers/pci/controller/pcie-altera-msi.c | 10 ++++------ > > drivers/pci/controller/pcie-altera.c | 10 ++++------ > > drivers/pci/controller/pcie-brcmstb.c | 9 ++++----- > > drivers/pci/controller/pcie-iproc-msi.c | 4 +--- > > drivers/pci/controller/pcie-mediatek-gen3.c | 13 ++++--------- > > drivers/pci/controller/pcie-mediatek.c | 12 ++++-------- > > drivers/pci/controller/pcie-microchip-host.c | 18 +++++++----------- > > drivers/pci/controller/pcie-rcar-host.c | 8 +++----- > > drivers/pci/controller/pcie-rockchip-host.c | 8 +++----- > > drivers/pci/controller/pcie-xilinx-cpm.c | 4 ++-- > > drivers/pci/controller/pcie-xilinx-nwl.c | 13 +++---------- > > drivers/pci/controller/pcie-xilinx.c | 9 ++++----- > > 21 files changed, 71 insertions(+), 120 deletions(-) > > > > diff --git a/drivers/pci/controller/pci-xgene-msi.c b/drivers/pci/controller/pci-xgene-msi.c > > index 1c34c897a7e2..cf3832b905e8 100644 > > --- a/drivers/pci/controller/pci-xgene-msi.c > > +++ b/drivers/pci/controller/pci-xgene-msi.c > > @@ -291,8 +291,7 @@ static void xgene_msi_isr(struct irq_desc *desc) > > struct irq_chip *chip = irq_desc_get_chip(desc); > > struct xgene_msi_group *msi_groups; > > struct xgene_msi *xgene_msi; > > - unsigned int virq; > > - int msir_index, msir_val, hw_irq; > > + int msir_index, msir_val, hw_irq, ret; > > u32 intr_index, grp_select, msi_grp; > > > > chained_irq_enter(chip, desc); > > @@ -330,10 +329,8 @@ static void xgene_msi_isr(struct irq_desc *desc) > > * CPU0 > > */ > > hw_irq = hwirq_to_canonical_hwirq(hw_irq); > > - virq = irq_find_mapping(xgene_msi->inner_domain, hw_irq); > > - WARN_ON(!virq); > > - if (virq != 0) > > - generic_handle_irq(virq); > > + ret = generic_handle_domain_irq(xgene_msi->inner_domain, hw_irq); > > + WARN_ON(ret); > > There's various error prints in some of the handlers. I think they > should be moved to the core. I can't imagine handling the irq is ever > optional. Printing stuff like this is a sure recipe for disaster, and there is no way I'm moving such crap into core code. If the interrupt handling fails (most likely because there is no mapping for this interrupt), it is the driver's responsibility to handle the error (either disabling the input or the output of the secondary irqchip). There isn't much the core code can do about it. Thanks, M. -- Without deviation from the norm, progress is not possible.