[PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Damien Lespiau]

We need to have a separate GT3 struct intel_device_info to declare they
have a second VCS. Let's start by splitting the PCI ids per-GT.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 include/drm/i915_pciids.h | 28 +++++++++++++++++++---------
 1 file changed, 19 insertions(+), 9 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 180ad0e..38a7c80 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -259,21 +259,31 @@
 	INTEL_VGA_DEVICE(0x22b2, info), \
 	INTEL_VGA_DEVICE(0x22b3, info)
 
-#define INTEL_SKL_IDS(info) \
-	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
+#define INTEL_SKL_GT1_IDS(info)	\
 	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
-	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
 	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
+	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
+	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
+	INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
+
+#define INTEL_SKL_GT2_IDS(info)	\
+	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
+	INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
 	INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \
 	INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
-	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
 	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
-	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
-	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
 	INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
-	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
-	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
 	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
 
+#define INTEL_SKL_GT3_IDS(info) \
+	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
+	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
+	INTEL_VGA_DEVICE(0x192A, info) /* SRV GT3 */ \
+
+#define INTEL_SKL_IDS(info) \
+	INTEL_SKL_GT1_IDS(info), \
+	INTEL_SKL_GT2_IDS(info), \
+	INTEL_SKL_GT3_IDS(info)
+
+
 #endif /* _I915_PCIIDS_H */
-- 
1.8.3.1

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[PATCH 2/3] drm/i915/skl: Declare that GT3 has a second VCS

[Damien Lespiau]

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6484229..9fdaf64 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -356,7 +356,7 @@ static const struct intel_device_info intel_cherryview_info = {
 	CURSOR_OFFSETS,
 };
 
-static const struct intel_device_info intel_skylake_info = {
+static const struct intel_device_info intel_skylake_gt12_info = {
 	.is_preliminary = 1,
 	.is_skylake = 1,
 	.gen = 9, .num_pipes = 3,
@@ -369,6 +369,19 @@ static const struct intel_device_info intel_skylake_info = {
 	IVB_CURSOR_OFFSETS,
 };
 
+static const struct intel_device_info intel_skylake_gt3_info = {
+	.is_preliminary = 1,
+	.is_skylake = 1,
+	.gen = 9, .num_pipes = 3,
+	.need_gfx_hws = 1, .has_hotplug = 1,
+	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
+	.has_llc = 1,
+	.has_ddi = 1,
+	.has_fbc = 1,
+	GEN_DEFAULT_PIPEOFFSETS,
+	IVB_CURSOR_OFFSETS,
+};
+
 /*
  * Make sure any device matches here are from most specific to most
  * general.  For example, since the Quanta match is based on the subsystem
@@ -406,7 +419,9 @@ static const struct intel_device_info intel_skylake_info = {
 	INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info),	\
 	INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info), \
 	INTEL_CHV_IDS(&intel_cherryview_info),	\
-	INTEL_SKL_IDS(&intel_skylake_info)
+	INTEL_SKL_GT1_IDS(&intel_skylake_gt12_info),	\
+	INTEL_SKL_GT2_IDS(&intel_skylake_gt12_info),	\
+	INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info)	\
 
 static const struct pci_device_id pciidlist[] = {		/* aka */
 	INTEL_PCI_IDS,
-- 
1.8.3.1

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[PATCH 3/3] drm/i915/skl: Remove the check enforcing VCS2 to be gen8 only

[Damien Lespiau]

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index d393026..bbe439d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -2630,19 +2630,13 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
 }
 
 /**
- * Initialize the second BSD ring for Broadwell GT3.
- * It is noted that this only exists on Broadwell GT3.
+ * Initialize the second BSD ring (eg. Broadwell GT3, Skylake GT3)
  */
 int intel_init_bsd2_ring_buffer(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_engine_cs *ring = &dev_priv->ring[VCS2];
 
-	if ((INTEL_INFO(dev)->gen != 8)) {
-		DRM_ERROR("No dual-BSD ring on non-BDW machine\n");
-		return -EINVAL;
-	}
-
 	ring->name = "bsd2 ring";
 	ring->id = VCS2;
 
-- 
1.8.3.1

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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Jeff McGee]

On Thu, Jan 29, 2015 at 02:13:38PM +0000, Damien Lespiau wrote:
> We need to have a separate GT3 struct intel_device_info to declare they
> have a second VCS. Let's start by splitting the PCI ids per-GT.
> 
Would it be a good idea to do more programmatic population of
these fields, rather than creating an entire new instance of the
struct just to alter one field? This relates to our other
conversation about the memory consumed by the 30+ device infos
and the concern when adding new fields.
-Jeff
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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Jani Nikula]

On Thu, 29 Jan 2015, Jeff McGee <jeff.mcgee@intel.com> wrote:
> On Thu, Jan 29, 2015 at 02:13:38PM +0000, Damien Lespiau wrote:
>> We need to have a separate GT3 struct intel_device_info to declare they
>> have a second VCS. Let's start by splitting the PCI ids per-GT.
>> 
> Would it be a good idea to do more programmatic population of
> these fields, rather than creating an entire new instance of the
> struct just to alter one field? This relates to our other
> conversation about the memory consumed by the 30+ device infos
> and the concern when adding new fields.

From a debugging perspective, I do like the way it is. You can look at
or search the info structs and you know which platforms have what, no
thinking involved.

On a related note, I'm contemplating sending a patch to obliterate the
_INTEL_BDW_M and _INTEL_BDW_D macros from i915_pciids.h because it hides
the IDs from a simple grep.

See how I try to optimize space and time resources - of my brain!


BR,
Jani.


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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Jeff McGee]

On Fri, Jan 30, 2015 at 09:30:07AM +0200, Jani Nikula wrote:
> On Thu, 29 Jan 2015, Jeff McGee <jeff.mcgee@intel.com> wrote:
> > On Thu, Jan 29, 2015 at 02:13:38PM +0000, Damien Lespiau wrote:
> >> We need to have a separate GT3 struct intel_device_info to declare they
> >> have a second VCS. Let's start by splitting the PCI ids per-GT.
> >> 
> > Would it be a good idea to do more programmatic population of
> > these fields, rather than creating an entire new instance of the
> > struct just to alter one field? This relates to our other
> > conversation about the memory consumed by the 30+ device infos
> > and the concern when adding new fields.
> 
> From a debugging perspective, I do like the way it is. You can look at
> or search the info structs and you know which platforms have what, no
> thinking involved.
> 
> On a related note, I'm contemplating sending a patch to obliterate the
> _INTEL_BDW_M and _INTEL_BDW_D macros from i915_pciids.h because it hides
> the IDs from a simple grep.
> 
> See how I try to optimize space and time resources - of my brain!

I think I agree after considering this more. At least in this case.
-Jeff
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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Daniel Vetter]

On Thu, Jan 29, 2015 at 02:11:13PM -0600, Jeff McGee wrote:
> On Thu, Jan 29, 2015 at 02:13:38PM +0000, Damien Lespiau wrote:
> > We need to have a separate GT3 struct intel_device_info to declare they
> > have a second VCS. Let's start by splitting the PCI ids per-GT.
> > 
> Would it be a good idea to do more programmatic population of
> these fields, rather than creating an entire new instance of the
> struct just to alter one field? This relates to our other
> conversation about the memory consumed by the 30+ device infos
> and the concern when adding new fields.

Broken record maintainer blurb:

Please provide hard data when justifying memory savings in the kmd. I see
a lot of people throwing around ideas and it seems a general concern, but
like with everything else we need to strike a cost/benefit balance and opt
for the most efficient way to save these bytes.

Which usually means shrinking down one of the runtime structs we allocate
by the thousands.
-Daniel
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+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH 3/3] drm/i915/skl: Remove the check enforcing VCS2 to be gen8 only

[shuang.he]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5682
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  353/353              353/353
ILK                                  353/353              353/353
SNB                                  400/422              400/422
IVB              +1-2              485/487              484/487
BYT                                  296/296              296/296
HSW              +1-1              507/508              507/508
BDW                 -2              401/402              399/402
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*IVB  igt_gem_evict_everything_minor-normal      PASS(2, M34)      DMESG_WARN(1, M34)
 IVB  igt_gem_storedw_batches_loop_normal      DMESG_WARN(5, M34M4)PASS(15, M34M4M21)      PASS(1, M34)
 IVB  igt_gem_storedw_batches_loop_secure-dispatch      DMESG_WARN(1, M34)PASS(6, M34M4)      DMESG_WARN(1, M34)
 HSW  igt_gem_pwrite_pread_snooped-pwrite-blt-cpu_mmap-performance      DMESG_WARN(1, M40)PASS(18, M40M20)      PASS(1, M20)
 HSW  igt_gem_storedw_loop_vebox      DMESG_WARN(2, M20)PASS(3, M40M20)      DMESG_WARN(1, M20)
 BDW  igt_gem_pwrite_pread_display-pwrite-blt-gtt_mmap-performance      DMESG_WARN(4, M28)PASS(2, M30)      DMESG_WARN(1, M28)
*BDW  igt_gem_pwrite_pread_uncached-pwrite-blt-gtt_mmap-performance      PASS(6, M30M28)      DMESG_WARN(1, M28)
Note: You need to pay more attention to line start with '*'
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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Damien Lespiau]

On Fri, Jan 30, 2015 at 09:30:07AM +0200, Jani Nikula wrote:
> On a related note, I'm contemplating sending a patch to obliterate the
> _INTEL_BDW_M and _INTEL_BDW_D macros from i915_pciids.h because it hides
> the IDs from a simple grep.

Yes, please!

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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Rodrigo Vivi]

On Thu, Jan 29, 2015 at 6:13 AM, Damien Lespiau
<damien.lespiau@intel.com> wrote:
> We need to have a separate GT3 struct intel_device_info to declare they
> have a second VCS. Let's start by splitting the PCI ids per-GT.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  include/drm/i915_pciids.h | 28 +++++++++++++++++++---------
>  1 file changed, 19 insertions(+), 9 deletions(-)
>
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 180ad0e..38a7c80 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -259,21 +259,31 @@
>         INTEL_VGA_DEVICE(0x22b2, info), \
>         INTEL_VGA_DEVICE(0x22b3, info)
>
> -#define INTEL_SKL_IDS(info) \
> -       INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
> +#define INTEL_SKL_GT1_IDS(info)        \
>         INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
> -       INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
> -       INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
>         INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
> +       INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \

spec shows this id as GT2 DT

> +       INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> +       INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */

couldn't find those 2 on spec

> +
> +#define INTEL_SKL_GT2_IDS(info)        \
> +       INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
> +       INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
>         INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \
>         INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
> -       INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
>         INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
> -       INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
> -       INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \


>         INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
couldn't find this on spec

> -       INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
> -       INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
>         INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
>
> +#define INTEL_SKL_GT3_IDS(info) \
> +       INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
> +       INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \

> +       INTEL_VGA_DEVICE(0x192A, info) /* SRV GT3 */ \
couldn't find this on spec

> +
> +#define INTEL_SKL_IDS(info) \
> +       INTEL_SKL_GT1_IDS(info), \
> +       INTEL_SKL_GT2_IDS(info), \
> +       INTEL_SKL_GT3_IDS(info)
> +
> +
>  #endif /* _I915_PCIIDS_H */
> --
> 1.8.3.1
>
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Also I've seem some ids there that aren't here...

I know this patch doesn't introduce the those IDs I couldn't fine
so with 0x1902 fixed on v2 or on follow-up or explained consider this one here:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Re: [PATCH 2/3] drm/i915/skl: Declare that GT3 has a second VCS

[Rodrigo Vivi]

On Thu, Jan 29, 2015 at 6:13 AM, Damien Lespiau
<damien.lespiau@intel.com> wrote:
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 19 +++++++++++++++++--
>  1 file changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 6484229..9fdaf64 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -356,7 +356,7 @@ static const struct intel_device_info intel_cherryview_info = {
>         CURSOR_OFFSETS,
>  };
>
> -static const struct intel_device_info intel_skylake_info = {
> +static const struct intel_device_info intel_skylake_gt12_info = {

didn't like much gt12 because i can be confusing with 12 1, 2, 1.2 1.5...

>         .is_preliminary = 1,
>         .is_skylake = 1,
>         .gen = 9, .num_pipes = 3,
> @@ -369,6 +369,19 @@ static const struct intel_device_info intel_skylake_info = {
>         IVB_CURSOR_OFFSETS,
>  };
>
> +static const struct intel_device_info intel_skylake_gt3_info = {
> +       .is_preliminary = 1,
> +       .is_skylake = 1,
> +       .gen = 9, .num_pipes = 3,
> +       .need_gfx_hws = 1, .has_hotplug = 1,
> +       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> +       .has_llc = 1,
> +       .has_ddi = 1,
> +       .has_fbc = 1,
> +       GEN_DEFAULT_PIPEOFFSETS,
> +       IVB_CURSOR_OFFSETS,
> +};
> +
>  /*
>   * Make sure any device matches here are from most specific to most
>   * general.  For example, since the Quanta match is based on the subsystem
> @@ -406,7 +419,9 @@ static const struct intel_device_info intel_skylake_info = {
>         INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info), \
>         INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info), \
>         INTEL_CHV_IDS(&intel_cherryview_info),  \
> -       INTEL_SKL_IDS(&intel_skylake_info)
> +       INTEL_SKL_GT1_IDS(&intel_skylake_gt12_info),    \
> +       INTEL_SKL_GT2_IDS(&intel_skylake_gt12_info),    \
> +       INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info)      \
>
>  static const struct pci_device_id pciidlist[] = {              /* aka */
>         INTEL_PCI_IDS,
> --
> 1.8.3.1
>
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But anyway patch is right!

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

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Re: [PATCH 3/3] drm/i915/skl: Remove the check enforcing VCS2 to be gen8 only

[Rodrigo Vivi]

Good catch!

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Thu, Jan 29, 2015 at 6:13 AM, Damien Lespiau
<damien.lespiau@intel.com> wrote:
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +-------
>  1 file changed, 1 insertion(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index d393026..bbe439d 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -2630,19 +2630,13 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
>  }
>
>  /**
> - * Initialize the second BSD ring for Broadwell GT3.
> - * It is noted that this only exists on Broadwell GT3.
> + * Initialize the second BSD ring (eg. Broadwell GT3, Skylake GT3)
>   */
>  int intel_init_bsd2_ring_buffer(struct drm_device *dev)
>  {
>         struct drm_i915_private *dev_priv = dev->dev_private;
>         struct intel_engine_cs *ring = &dev_priv->ring[VCS2];
>
> -       if ((INTEL_INFO(dev)->gen != 8)) {
> -               DRM_ERROR("No dual-BSD ring on non-BDW machine\n");
> -               return -EINVAL;
> -       }
> -
>         ring->name = "bsd2 ring";
>         ring->id = VCS2;
>
> --
> 1.8.3.1
>
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Re: [PATCH 2/3] drm/i915/skl: Declare that GT3 has a second VCS

[Daniel Vetter]

On Tue, Feb 03, 2015 at 05:55:05PM -0800, Rodrigo Vivi wrote:
> On Thu, Jan 29, 2015 at 6:13 AM, Damien Lespiau
> <damien.lespiau@intel.com> wrote:
> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.c | 19 +++++++++++++++++--
> >  1 file changed, 17 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index 6484229..9fdaf64 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -356,7 +356,7 @@ static const struct intel_device_info intel_cherryview_info = {
> >         CURSOR_OFFSETS,
> >  };
> >
> > -static const struct intel_device_info intel_skylake_info = {
> > +static const struct intel_device_info intel_skylake_gt12_info = {
> 
> didn't like much gt12 because i can be confusing with 12 1, 2, 1.2 1.5...

Yeah, at first I've thought this would be for some gt2 with stuff fused
off ... Imo just leave out the 12 and call it skylake_gt_info or so.
-Daniel

> 
> >         .is_preliminary = 1,
> >         .is_skylake = 1,
> >         .gen = 9, .num_pipes = 3,
> > @@ -369,6 +369,19 @@ static const struct intel_device_info intel_skylake_info = {
> >         IVB_CURSOR_OFFSETS,
> >  };
> >
> > +static const struct intel_device_info intel_skylake_gt3_info = {
> > +       .is_preliminary = 1,
> > +       .is_skylake = 1,
> > +       .gen = 9, .num_pipes = 3,
> > +       .need_gfx_hws = 1, .has_hotplug = 1,
> > +       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> > +       .has_llc = 1,
> > +       .has_ddi = 1,
> > +       .has_fbc = 1,
> > +       GEN_DEFAULT_PIPEOFFSETS,
> > +       IVB_CURSOR_OFFSETS,
> > +};
> > +
> >  /*
> >   * Make sure any device matches here are from most specific to most
> >   * general.  For example, since the Quanta match is based on the subsystem
> > @@ -406,7 +419,9 @@ static const struct intel_device_info intel_skylake_info = {
> >         INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info), \
> >         INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info), \
> >         INTEL_CHV_IDS(&intel_cherryview_info),  \
> > -       INTEL_SKL_IDS(&intel_skylake_info)
> > +       INTEL_SKL_GT1_IDS(&intel_skylake_gt12_info),    \
> > +       INTEL_SKL_GT2_IDS(&intel_skylake_gt12_info),    \
> > +       INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info)      \
> >
> >  static const struct pci_device_id pciidlist[] = {              /* aka */
> >         INTEL_PCI_IDS,
> > --
> > 1.8.3.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> But anyway patch is right!
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> -- 
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Re: [PATCH 3/3] drm/i915/skl: Remove the check enforcing VCS2 to be gen8 only

[Daniel Vetter]

On Tue, Feb 03, 2015 at 05:55:46PM -0800, Rodrigo Vivi wrote:
> Good catch!
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> On Thu, Jan 29, 2015 at 6:13 AM, Damien Lespiau
> <damien.lespiau@intel.com> wrote:

Tiny commit messages! I've added a short blurb explaining that we track
this in intel_info already.

> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Queued for -next, thanks for the patch.
-Daniel

> > ---
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 8 +-------
> >  1 file changed, 1 insertion(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index d393026..bbe439d 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -2630,19 +2630,13 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
> >  }
> >
> >  /**
> > - * Initialize the second BSD ring for Broadwell GT3.
> > - * It is noted that this only exists on Broadwell GT3.
> > + * Initialize the second BSD ring (eg. Broadwell GT3, Skylake GT3)
> >   */
> >  int intel_init_bsd2_ring_buffer(struct drm_device *dev)
> >  {
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> >         struct intel_engine_cs *ring = &dev_priv->ring[VCS2];
> >
> > -       if ((INTEL_INFO(dev)->gen != 8)) {
> > -               DRM_ERROR("No dual-BSD ring on non-BDW machine\n");
> > -               return -EINVAL;
> > -       }
> > -
> >         ring->name = "bsd2 ring";
> >         ring->id = VCS2;
> >
> > --
> > 1.8.3.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Damien Lespiau]

On Tue, Feb 03, 2015 at 05:51:29PM -0800, Rodrigo Vivi wrote:
> On Thu, Jan 29, 2015 at 6:13 AM, Damien Lespiau
> <damien.lespiau@intel.com> wrote:
> > We need to have a separate GT3 struct intel_device_info to declare they
> > have a second VCS. Let's start by splitting the PCI ids per-GT.
> >
> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

FWIW, I'd rather not mix mechanical changes with the ones actually changing
something, so will do semantic changes in separate patches.

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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Damien Lespiau]

On Tue, Feb 03, 2015 at 05:51:29PM -0800, Rodrigo Vivi wrote:
> On Thu, Jan 29, 2015 at 6:13 AM, Damien Lespiau
> <damien.lespiau@intel.com> wrote:
> > We need to have a separate GT3 struct intel_device_info to declare they
> > have a second VCS. Let's start by splitting the PCI ids per-GT.
> >
> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> > ---
> >  include/drm/i915_pciids.h | 28 +++++++++++++++++++---------
> >  1 file changed, 19 insertions(+), 9 deletions(-)
> >
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> > index 180ad0e..38a7c80 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -259,21 +259,31 @@
> >         INTEL_VGA_DEVICE(0x22b2, info), \
> >         INTEL_VGA_DEVICE(0x22b3, info)
> >
> > -#define INTEL_SKL_IDS(info) \
> > -       INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
> > +#define INTEL_SKL_GT1_IDS(info)        \
> >         INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
> > -       INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
> > -       INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
> >         INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
> > +       INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
> 
> spec shows this id as GT2 DT

That is weird, for the other ids, 0 << 4 means GT1, while GT2 are 1 << 4.

Those ids have gone through review once, so 0x1902 was clearly marked as
GT1 then. Could be an error in BSpec. will ask.

> 
> > +       INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> > +       INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
> 
> couldn't find those 2 on spec

For these and the rest of those, I'd rather keep them in tree as they
may stil be pre-production/early-adopters parts.

> Also I've seem some ids there that aren't here...

This is a known thing and on "purpose".

> I know this patch doesn't introduce the those IDs I couldn't fine
> so with 0x1902 fixed on v2 or on follow-up or explained consider this one here:
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Considering the above I think we should go ahead with this patch.

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[PATCH 2/3 v2] drm/i915/skl: Declare that GT3 has a second VCS

[Damien Lespiau]

v2: leave intel_skylake_info alone (Rodrigo, Daniel)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8039cec..6f4f3c5 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -369,6 +369,19 @@ static const struct intel_device_info intel_skylake_info = {
 	IVB_CURSOR_OFFSETS,
 };
 
+static const struct intel_device_info intel_skylake_gt3_info = {
+	.is_preliminary = 1,
+	.is_skylake = 1,
+	.gen = 9, .num_pipes = 3,
+	.need_gfx_hws = 1, .has_hotplug = 1,
+	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
+	.has_llc = 1,
+	.has_ddi = 1,
+	.has_fbc = 1,
+	GEN_DEFAULT_PIPEOFFSETS,
+	IVB_CURSOR_OFFSETS,
+};
+
 /*
  * Make sure any device matches here are from most specific to most
  * general.  For example, since the Quanta match is based on the subsystem
@@ -406,7 +419,9 @@ static const struct intel_device_info intel_skylake_info = {
 	INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info),	\
 	INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info), \
 	INTEL_CHV_IDS(&intel_cherryview_info),	\
-	INTEL_SKL_IDS(&intel_skylake_info)
+	INTEL_SKL_GT1_IDS(&intel_skylake_info),	\
+	INTEL_SKL_GT2_IDS(&intel_skylake_info),	\
+	INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info)	\
 
 static const struct pci_device_id pciidlist[] = {		/* aka */
 	INTEL_PCI_IDS,
-- 
1.8.3.1

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Re: [PATCH 1/3] drm/i915/skl: Split the SKL PCI ids by GT

[Rodrigo Vivi]

On Wed, Feb 4, 2015 at 5:10 AM, Damien Lespiau <damien.lespiau@intel.com> wrote:
> On Tue, Feb 03, 2015 at 05:51:29PM -0800, Rodrigo Vivi wrote:
>> On Thu, Jan 29, 2015 at 6:13 AM, Damien Lespiau
>> <damien.lespiau@intel.com> wrote:
>> > We need to have a separate GT3 struct intel_device_info to declare they
>> > have a second VCS. Let's start by splitting the PCI ids per-GT.
>> >
>> > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
>> > ---
>> >  include/drm/i915_pciids.h | 28 +++++++++++++++++++---------
>> >  1 file changed, 19 insertions(+), 9 deletions(-)
>> >
>> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
>> > index 180ad0e..38a7c80 100644
>> > --- a/include/drm/i915_pciids.h
>> > +++ b/include/drm/i915_pciids.h
>> > @@ -259,21 +259,31 @@
>> >         INTEL_VGA_DEVICE(0x22b2, info), \
>> >         INTEL_VGA_DEVICE(0x22b3, info)
>> >
>> > -#define INTEL_SKL_IDS(info) \
>> > -       INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
>> > +#define INTEL_SKL_GT1_IDS(info)        \
>> >         INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
>> > -       INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
>> > -       INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \
>> >         INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
>> > +       INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
>>
>> spec shows this id as GT2 DT
>
> That is weird, for the other ids, 0 << 4 means GT1, while GT2 are 1 << 4.
>
> Those ids have gone through review once, so 0x1902 was clearly marked as
> GT1 then. Could be an error in BSpec. will ask.
>
>>
>> > +       INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
>> > +       INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
>>
>> couldn't find those 2 on spec
>
> For these and the rest of those, I'd rather keep them in tree as they
> may stil be pre-production/early-adopters parts.
>
>> Also I've seem some ids there that aren't here...
>
> This is a known thing and on "purpose".
>
>> I know this patch doesn't introduce the those IDs I couldn't fine
>> so with 0x1902 fixed on v2 or on follow-up or explained consider this one here:
>>
>> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Considering the above I think we should go ahead with this patch.

Agree!

>
> --
> Damien



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Re: [PATCH 2/3 v2] drm/i915/skl: Declare that GT3 has a second VCS

[Rodrigo Vivi]

just reinforcing..

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Wed, Feb 4, 2015 at 5:22 AM, Damien Lespiau <damien.lespiau@intel.com> wrote:
> v2: leave intel_skylake_info alone (Rodrigo, Daniel)
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 17 ++++++++++++++++-
>  1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 8039cec..6f4f3c5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -369,6 +369,19 @@ static const struct intel_device_info intel_skylake_info = {
>         IVB_CURSOR_OFFSETS,
>  };
>
> +static const struct intel_device_info intel_skylake_gt3_info = {
> +       .is_preliminary = 1,
> +       .is_skylake = 1,
> +       .gen = 9, .num_pipes = 3,
> +       .need_gfx_hws = 1, .has_hotplug = 1,
> +       .ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
> +       .has_llc = 1,
> +       .has_ddi = 1,
> +       .has_fbc = 1,
> +       GEN_DEFAULT_PIPEOFFSETS,
> +       IVB_CURSOR_OFFSETS,
> +};
> +
>  /*
>   * Make sure any device matches here are from most specific to most
>   * general.  For example, since the Quanta match is based on the subsystem
> @@ -406,7 +419,9 @@ static const struct intel_device_info intel_skylake_info = {
>         INTEL_BDW_GT3M_IDS(&intel_broadwell_gt3m_info), \
>         INTEL_BDW_GT3D_IDS(&intel_broadwell_gt3d_info), \
>         INTEL_CHV_IDS(&intel_cherryview_info),  \
> -       INTEL_SKL_IDS(&intel_skylake_info)
> +       INTEL_SKL_GT1_IDS(&intel_skylake_info), \
> +       INTEL_SKL_GT2_IDS(&intel_skylake_info), \
> +       INTEL_SKL_GT3_IDS(&intel_skylake_gt3_info)      \
>
>  static const struct pci_device_id pciidlist[] = {              /* aka */
>         INTEL_PCI_IDS,
> --
> 1.8.3.1
>
> _______________________________________________
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