From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA0E4C4332F for ; Wed, 16 Nov 2022 17:02:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233537AbiKPRCg (ORCPT ); Wed, 16 Nov 2022 12:02:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233098AbiKPRCc (ORCPT ); Wed, 16 Nov 2022 12:02:32 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 355771B799; Wed, 16 Nov 2022 09:02:32 -0800 (PST) From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668618150; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=73/k+Pqe+eIdLrX5pigBKT2S4Kr0WftEUmk46mQSZq4=; b=KDnklEjxF7By95INYq+dtxZdCdY/C01Z76Y3GVUU4F3KTF6wB9npHtyJk3/UAgAb2A+Kl2 OO8l0ogbhCgtGOzGSm278d7Ntq9gnX5OWX3a6rnZ4IXbyxowohL3X/waIh8pZdLxNBb0T6 AL5Ba0JCMIs8eN7MF+cdBQIMfREMbj5b283h9U+0gizZueBJ2TbopR81DOJDkA+yLscvLG 5FHYQIDq160F+/ffXyNSwf1Pr1MYqKx6AnPF4ABlFzMU4zcMo5Y3U2X2+lhW6JuSf+6b83 w3dIwnYYAiAmM5Vry7hYiK9ZrD8cGZlRqSpgOZrAqzDh3QEn/1udH8Sv89Gl7w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668618150; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=73/k+Pqe+eIdLrX5pigBKT2S4Kr0WftEUmk46mQSZq4=; b=/lLRXLA6lsq9XHJeSKJip6VCUSvS/TfY12kAhlPgvsYIqLFWJcn73WeC2hRsndLX2l+7Fj tgC7oNEGsKmJLACQ== To: Ashok Raj Cc: LKML , x86@kernel.org, Joerg Roedel , Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Dave Jiang , Alex Williamson , Kevin Tian , Dan Williams , Logan Gunthorpe , Jon Mason , Allen Hubbe , Michael Ellerman , Christophe Leroy , linuxppc-dev@lists.ozlabs.org, "Ahmed S. Darwish" , Reinette Chatre , Ashok Raj Subject: Re: [patch 02/39] iommu/vt-d: Remove bogus check for multi MSI-X In-Reply-To: References: <20221111120501.026511281@linutronix.de> <20221111122013.713848846@linutronix.de> Date: Wed, 16 Nov 2022 18:02:30 +0100 Message-ID: <87wn7uq1cp.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Nov 16 2022 at 07:52, Ashok Raj wrote: > On Fri, Nov 11, 2022 at 02:54:17PM +0100, Thomas Gleixner wrote: >> PCI/Multi-MSI is MSI specific and not supported for MSI-X. >> >> Signed-off-by: Thomas Gleixner >> --- >> drivers/iommu/intel/irq_remapping.c | 3 +-- >> 1 file changed, 1 insertion(+), 2 deletions(-) >> >> --- a/drivers/iommu/intel/irq_remapping.c >> +++ b/drivers/iommu/intel/irq_remapping.c >> @@ -1334,8 +1334,7 @@ static int intel_irq_remapping_alloc(str >> >> if (!info || !iommu) >> return -EINVAL; >> - if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI && >> - info->type != X86_IRQ_ALLOC_TYPE_PCI_MSIX) >> + if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI) >> return -EINVAL; >> >> /* >> > > This check is only making sure that when multi-msi is requested that the > type has to be either MSI/MSIX. MSI-X does not support multi vector allocations on a single entry. > Wouldn't this change return -EINVAL when type = MSIX? Rightfully so. MSIX vectors are allocated one by one. Has been that way forever. Thanks, tglx From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 87D5AC433FE for ; Wed, 16 Nov 2022 17:04:21 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4NC8Xg6ndbz3f3Z for ; Thu, 17 Nov 2022 04:04:19 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=linutronix.de header.i=@linutronix.de header.a=rsa-sha256 header.s=2020 header.b=KDnklEjx; dkim=fail reason="signature verification failed" header.d=linutronix.de header.i=@linutronix.de header.a=ed25519-sha256 header.s=2020e header.b=/lLRXLA6; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=linutronix.de (client-ip=2a0a:51c0:0:12e:550::1; helo=galois.linutronix.de; envelope-from=tglx@linutronix.de; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=linutronix.de header.i=@linutronix.de header.a=rsa-sha256 header.s=2020 header.b=KDnklEjx; dkim=pass header.d=linutronix.de header.i=@linutronix.de header.a=ed25519-sha256 header.s=2020e header.b=/lLRXLA6; dkim-atps=neutral Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4NC8Vf4w0Xz3cB8 for ; Thu, 17 Nov 2022 04:02:34 +1100 (AEDT) From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1668618150; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=73/k+Pqe+eIdLrX5pigBKT2S4Kr0WftEUmk46mQSZq4=; b=KDnklEjxF7By95INYq+dtxZdCdY/C01Z76Y3GVUU4F3KTF6wB9npHtyJk3/UAgAb2A+Kl2 OO8l0ogbhCgtGOzGSm278d7Ntq9gnX5OWX3a6rnZ4IXbyxowohL3X/waIh8pZdLxNBb0T6 AL5Ba0JCMIs8eN7MF+cdBQIMfREMbj5b283h9U+0gizZueBJ2TbopR81DOJDkA+yLscvLG 5FHYQIDq160F+/ffXyNSwf1Pr1MYqKx6AnPF4ABlFzMU4zcMo5Y3U2X2+lhW6JuSf+6b83 w3dIwnYYAiAmM5Vry7hYiK9ZrD8cGZlRqSpgOZrAqzDh3QEn/1udH8Sv89Gl7w== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1668618150; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=73/k+Pqe+eIdLrX5pigBKT2S4Kr0WftEUmk46mQSZq4=; b=/lLRXLA6lsq9XHJeSKJip6VCUSvS/TfY12kAhlPgvsYIqLFWJcn73WeC2hRsndLX2l+7Fj tgC7oNEGsKmJLACQ== To: Ashok Raj Subject: Re: [patch 02/39] iommu/vt-d: Remove bogus check for multi MSI-X In-Reply-To: References: <20221111120501.026511281@linutronix.de> <20221111122013.713848846@linutronix.de> Date: Wed, 16 Nov 2022 18:02:30 +0100 Message-ID: <87wn7uq1cp.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pci@vger.kernel.org, Will Deacon , Lorenzo Pieralisi , Dave Jiang , Ashok Raj , Joerg Roedel , x86@kernel.org, Jason Gunthorpe , Allen Hubbe , Kevin Tian , "Ahmed S. Darwish" , Jon Mason , linuxppc-dev@lists.ozlabs.org, Alex Williamson , Bjorn Helgaas , Dan Williams , Reinette Chatre , Greg Kroah-Hartman , LKML , Marc Zyngier , Logan Gunthorpe Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, Nov 16 2022 at 07:52, Ashok Raj wrote: > On Fri, Nov 11, 2022 at 02:54:17PM +0100, Thomas Gleixner wrote: >> PCI/Multi-MSI is MSI specific and not supported for MSI-X. >> >> Signed-off-by: Thomas Gleixner >> --- >> drivers/iommu/intel/irq_remapping.c | 3 +-- >> 1 file changed, 1 insertion(+), 2 deletions(-) >> >> --- a/drivers/iommu/intel/irq_remapping.c >> +++ b/drivers/iommu/intel/irq_remapping.c >> @@ -1334,8 +1334,7 @@ static int intel_irq_remapping_alloc(str >> >> if (!info || !iommu) >> return -EINVAL; >> - if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI && >> - info->type != X86_IRQ_ALLOC_TYPE_PCI_MSIX) >> + if (nr_irqs > 1 && info->type != X86_IRQ_ALLOC_TYPE_PCI_MSI) >> return -EINVAL; >> >> /* >> > > This check is only making sure that when multi-msi is requested that the > type has to be either MSI/MSIX. MSI-X does not support multi vector allocations on a single entry. > Wouldn't this change return -EINVAL when type = MSIX? Rightfully so. MSIX vectors are allocated one by one. Has been that way forever. Thanks, tglx