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From: Michael Ellerman <mpe@ellerman.id.au>
To: "Cédric Le Goater" <clg@kaod.org>, linuxppc-dev@lists.ozlabs.org
Cc: Greg Kurz <groug@kaod.org>
Subject: Re: [PATCH v2 07/13] powerpc: Increase NR_IRQS range to support more KVM guests
Date: Wed, 16 Dec 2020 13:49:01 +1100	[thread overview]
Message-ID: <87wnxixy76.fsf@mpe.ellerman.id.au> (raw)
In-Reply-To: <9fca102b-b1b2-84b0-085f-96965f126e58@kaod.org>

Cédric Le Goater <clg@kaod.org> writes:
> On 12/11/20 12:51 AM, Michael Ellerman wrote:
>> Cédric Le Goater <clg@kaod.org> writes:
>>> PowerNV systems can handle up to 4K guests and 1M interrupt numbers
>>> per chip. Increase the range of allowed interrupts to support a larger
>>> number of guests.
>>>
>>> Reviewed-by: Greg Kurz <groug@kaod.org>
>>> Signed-off-by: Cédric Le Goater <clg@kaod.org>
>>> ---
>>>  arch/powerpc/Kconfig | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
>>> index 5181872f9452..c250fbd430d1 100644
>>> --- a/arch/powerpc/Kconfig
>>> +++ b/arch/powerpc/Kconfig
>>> @@ -66,7 +66,7 @@ config NEED_PER_CPU_PAGE_FIRST_CHUNK
>>>  
>>>  config NR_IRQS
>>>  	int "Number of virtual interrupt numbers"
>>> -	range 32 32768
>>> +	range 32 1048576
>>>  	default "512"
>>>  	help
>>>  	  This defines the number of virtual interrupt numbers the kernel
>> 
>> We should really do what other arches do, and size this appropriately
>> based on the config, rather than asking users to guess what size they
>> need.
>> 
>> But I guess I'll take this for now, and we can do something fancier
>> later.
>
> I was thinking on adding a property to OPAL to size the HW interrupt 
> number space. Is that it ?

That's a separate issue. NR_IRQS is about the maximum number of Linux
interrupts, and it's a compile time limit.

In the old days there was an array of irq_desc[NR_IRQS] in .data, so you
didn't want NR_IRQS to be too big. These days we don't do that, because
of the sparse IRQ support, but I don't know if it's completely free to
make NR_IRQS arbitrarily large at build time.

> That would be good because it's increasing from 20bits on P9 to 24bits
> on P10.

That's probably still helpful, it might mean we can shrink some
structures at runtime.

> I am checking other arches.

Thanks.

cheers

  reply	other threads:[~2020-12-16  2:50 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-10 17:14 [PATCH v2 00/13] powerpc/xive: misc cleanups Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 01/13] KVM: PPC: Book3S HV: XIVE: Show detailed configuration in debug output Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 02/13] powerpc/xive: Rename XIVE_IRQ_NO_EOI to show its a flag Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 03/13] powerpc/xive: Introduce XIVE_IPI_HW_IRQ Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 04/13] powerpc/xive: Use cpu_to_node() instead of ibm, chip-id property Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 05/13] powerpc/xive: Add a name to the IRQ domain Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 06/13] powerpc/xive: Add a debug_show handler to the XIVE irq_domain Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 07/13] powerpc: Increase NR_IRQS range to support more KVM guests Cédric Le Goater
2020-12-10 23:51   ` Michael Ellerman
2020-12-11  8:14     ` Cédric Le Goater
2020-12-16  2:49       ` Michael Ellerman [this message]
2020-12-10 17:14 ` [PATCH v2 08/13] powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_SHIFT_BUG Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 09/13] powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_MASK_FW Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 10/13] powerpc/xive: Remove P9 DD1 flag XIVE_IRQ_FLAG_EOI_FW Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 11/13] powerpc/xive: Simplify xive_do_source_eoi() Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 12/13] powerpc/xive: Improve error reporting of OPAL calls Cédric Le Goater
2020-12-10 17:14 ` [PATCH v2 13/13] KVM: PPC: Book3S HV: XIVE: Add a comment regarding VP numbering Cédric Le Goater
2020-12-15 10:48 ` [PATCH v2 00/13] powerpc/xive: misc cleanups Michael Ellerman

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