From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71A24C433DF for ; Mon, 18 May 2020 07:43:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4F1B120825 for ; Mon, 18 May 2020 07:43:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="N/Mo9gOd" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727831AbgERHnZ (ORCPT ); Mon, 18 May 2020 03:43:25 -0400 Received: from esa4.microchip.iphmx.com ([68.232.154.123]:25993 "EHLO esa4.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726573AbgERHnZ (ORCPT ); Mon, 18 May 2020 03:43:25 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1589787804; x=1621323804; h=references:from:to:cc:subject:in-reply-to:date: message-id:mime-version; bh=FKJAh1HkVv8d/p5YjXylM2nem6uVcaMiV5E5Xj3YJxg=; b=N/Mo9gOdr8dLG92VO2vspqYTdC6ybwy06MNDNqrb1h5K4v4ruEkCkND2 cu0mZo4ozsdylQg/voj7wziwalD74fTzC4IMIyACbyyecFeOtwRyzEi9N KbyGKXlPtFU3qM/y/WdEUaYyGmmDr6Vcw7og6K3x+WYJugwkF/lFSPCPo Zk5f8N1qrsFCjQf0gcqKGCriHJFBmulpA103J1MKUZDHkpXSJEv83QGGr z9bZiF3T8i7eiR5uFXkifdto6TQIulSIllcLw45pcNZvW2MQdntXxG7Av CJddKWzosR+z76xtTrSM9/5AZKAj3T4CtK1+RkmYrl/GSBabx5+Cvrwq2 A==; IronPort-SDR: 9nIYTc6j7tSmHkUO/HDAiU7Hl4ptKImLP7FdPLXeUtwqYerLqPzqdExoE6E93pFxzBah3KHWWG Q9JPG+I2MEL3gHJXGrutIvVYPjZUo1UEB3ylMVbpbguzVvgclguDsT6B3iZUd/aTMSYKFy83vM CmUy67KdBD33r96EVfEhNlaspRBqwP35OdPswMyZsL8Gqtsd2knoZobWdvb4W8vZXCFq31c9xV fWceeyx3oQjJyQHT8TKz77OVnpKjLO40OSg3akb7hIM2OYZrCRcRG94HfDVpY9JW6g17CLZwRG ScA= X-IronPort-AV: E=Sophos;i="5.73,406,1583218800"; d="scan'208";a="73738900" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 18 May 2020 00:43:22 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Mon, 18 May 2020 00:43:22 -0700 Received: from soft-dev15.microsemi.net.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5 via Frontend Transport; Mon, 18 May 2020 00:43:17 -0700 References: <20200513125532.24585-1-lars.povlsen@microchip.com> <20200513125532.24585-7-lars.povlsen@microchip.com> <2d230dab95ee96727a42f9c242c93c18@misterjones.org> <871rnlp740.fsf@soft-dev15.microsemi.net> <18c0d9ef-9a2b-31d0-b317-f051bb26a907@arm.com> From: Lars Povlsen To: Robin Murphy List-Id: CC: Lars Povlsen , Marc Zyngier , , Alexandre Belloni , Arnd Bergmann , Stephen Boyd , Linus Walleij , , , , SoC Team , Michael Turquette , , "Olof Johansson" , Microchip Linux Driver Support , Steen Hegelund Subject: Re: [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support In-Reply-To: <18c0d9ef-9a2b-31d0-b317-f051bb26a907@arm.com> Date: Mon, 18 May 2020 09:43:16 +0200 Message-ID: <87wo59ofhn.fsf@soft-dev15.microsemi.net> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Robin Murphy writes: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 2020-05-15 16:09, Lars Povlsen wrote: > [...] >>>> + cpu0: cpu@0 { >>>> + compatible = "arm,cortex-a53", "arm,armv8"; > > Side note: only one compatible string for the real CPU please, running a > DT bindings check should complain about that. > I'll change this. >>>> + device_type = "cpu"; >>>> + reg = <0x0 0x0>; >>>> + enable-method = "spin-table"; >>> >>> Really? This is 2020, not 2012 any more. Surely a new platform >>> boots using PSCI, and not *this*. >>> >> >> We don't currently support PSCI. The platform does not have TrustZone, >> hence we don't use ATF. > AIUI, part of the purpose of ATF is to provide a nice standardised > platform interface regardless of whether you care about Secure software > or not. It shouldn't take much to knock up a trivial ATF port that just > uses an internal spin-table for its PSCI backend - in fact I suspect > that's probably just a copy-paste from the RPi3 port ;) > I'll change this to PSCI if that's whats expected these days. We actually already have an ATF port. I fully understand the desire to standardize on PSCI. > Robin. -- Lars Povlsen, Microchip From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5578C433DF for ; Mon, 18 May 2020 07:43:35 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 913C8207D4 for ; Mon, 18 May 2020 07:43:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="aHJYIGAJ"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="WXCgwT6+" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 913C8207D4 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date: In-Reply-To:Subject:To:From:References:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=0xcqTRTIWOuXFsU0KyypqKFxJRpO3JYTW4bVpBdX9RA=; b=aHJYIGAJHQyrh9j2CbX6kY1X3x fKLq8Ek+1VipiJ/YoinD9n50D2Q5ntCwsUF2BdmL6S1lU8A0NKNUS3l8hf0I0c5pZ7Hju8cQ+3Spa fDhnIfjChOL7DXZJrCbxjZeGMNfl1HAoqvBQIoJPSKojCXZdhZU7oDsldFn3C5EeWQTQf7rSjWyzy NBK+TExeGKNMgGSjU/5LYZ77kE0+fQdZ9akXXul2BXG0hFohhg1pEgcNmprbQOSHlV/pSTQiMrBsK RghiRkN7Je++yGZxdP/+5M/+98EISK/bCBX7lK0TkBZWdV7FuGDFZ30n8yt7ukpQ8R+/ZDmLHiXvt IGkh3w8w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jaaQu-0000gB-Hc; Mon, 18 May 2020 07:43:32 +0000 Received: from esa4.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jaaQq-0000fI-0d for linux-arm-kernel@lists.infradead.org; Mon, 18 May 2020 07:43:31 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1589787807; x=1621323807; h=references:from:to:cc:subject:in-reply-to:date: message-id:mime-version; bh=FKJAh1HkVv8d/p5YjXylM2nem6uVcaMiV5E5Xj3YJxg=; b=WXCgwT6+sAla5aVtRz3FFeohbujP7Ev/w6W1n+SdYqNpFQoLS/Bwyj+9 RK27KuJKg2IGJJGKZOeiYKJMNPBO0kkbHgXpMIT2428hr6dHkxAcZT08i ZmVLDhGe9ojVnRzZwa+GFizN4pPYRdoPaTfeUWHpxPOfUcT/h6VZB3QU5 GgxHoxBk82zaJVPkAUdsREJvibSud6CPHON6nt9WzQ7+zUDv+O5QWCxaK ftI70IdbIxdg3RACusZv0anxRrhx0MFCvLOI+XLWkxEDUM9OiUnWvAFZW mgPu4pR+gnp2Dkdic76mx0fhfn96gTUTbYq9zCjkwvvlcBiaER34qbAJR g==; IronPort-SDR: 9nIYTc6j7tSmHkUO/HDAiU7Hl4ptKImLP7FdPLXeUtwqYerLqPzqdExoE6E93pFxzBah3KHWWG Q9JPG+I2MEL3gHJXGrutIvVYPjZUo1UEB3ylMVbpbguzVvgclguDsT6B3iZUd/aTMSYKFy83vM CmUy67KdBD33r96EVfEhNlaspRBqwP35OdPswMyZsL8Gqtsd2knoZobWdvb4W8vZXCFq31c9xV fWceeyx3oQjJyQHT8TKz77OVnpKjLO40OSg3akb7hIM2OYZrCRcRG94HfDVpY9JW6g17CLZwRG ScA= X-IronPort-AV: E=Sophos;i="5.73,406,1583218800"; d="scan'208";a="73738900" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 18 May 2020 00:43:22 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Mon, 18 May 2020 00:43:22 -0700 Received: from soft-dev15.microsemi.net.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5 via Frontend Transport; Mon, 18 May 2020 00:43:17 -0700 References: <20200513125532.24585-1-lars.povlsen@microchip.com> <20200513125532.24585-7-lars.povlsen@microchip.com> <2d230dab95ee96727a42f9c242c93c18@misterjones.org> <871rnlp740.fsf@soft-dev15.microsemi.net> <18c0d9ef-9a2b-31d0-b317-f051bb26a907@arm.com> From: Lars Povlsen To: Robin Murphy Subject: Re: [PATCH 06/14] arm64: dts: sparx5: Add basic cpu support In-Reply-To: <18c0d9ef-9a2b-31d0-b317-f051bb26a907@arm.com> Date: Mon, 18 May 2020 09:43:16 +0200 Message-ID: <87wo59ofhn.fsf@soft-dev15.microsemi.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200518_004328_103531_0F94BC52 X-CRM114-Status: UNSURE ( 9.46 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , List-Id: Cc: devicetree@vger.kernel.org, Alexandre Belloni , Arnd Bergmann , Stephen Boyd , Linus Walleij , Olof Johansson , linux-kernel@vger.kernel.org, Microchip Linux Driver Support , linux-gpio@vger.kernel.org, SoC Team , Michael Turquette , linux-arm-kernel@lists.infradead.org, Marc Zyngier , Steen Hegelund , linux-clk@vger.kernel.org, Lars Povlsen Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Robin Murphy writes: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > On 2020-05-15 16:09, Lars Povlsen wrote: > [...] >>>> + cpu0: cpu@0 { >>>> + compatible = "arm,cortex-a53", "arm,armv8"; > > Side note: only one compatible string for the real CPU please, running a > DT bindings check should complain about that. > I'll change this. >>>> + device_type = "cpu"; >>>> + reg = <0x0 0x0>; >>>> + enable-method = "spin-table"; >>> >>> Really? This is 2020, not 2012 any more. Surely a new platform >>> boots using PSCI, and not *this*. >>> >> >> We don't currently support PSCI. The platform does not have TrustZone, >> hence we don't use ATF. > AIUI, part of the purpose of ATF is to provide a nice standardised > platform interface regardless of whether you care about Secure software > or not. It shouldn't take much to knock up a trivial ATF port that just > uses an internal spin-table for its PSCI backend - in fact I suspect > that's probably just a copy-paste from the RPi3 port ;) > I'll change this to PSCI if that's whats expected these days. We actually already have an ATF port. I fully understand the desire to standardize on PSCI. > Robin. -- Lars Povlsen, Microchip _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel