From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7CB74C4332F for ; Tue, 8 Nov 2022 11:51:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E113710E3F6; Tue, 8 Nov 2022 11:51:05 +0000 (UTC) Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id A906510E3F6 for ; Tue, 8 Nov 2022 11:51:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1667908262; x=1699444262; h=from:to:subject:in-reply-to:references:date:message-id: mime-version:content-transfer-encoding; bh=pqUs75VPjhpKkVif3pJixXeLqjBiia7EXbeZm+i2nEU=; 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charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Intel-gfx] [PATCH 2/5] drm/i915: Force RGB output for DVI sink X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Mon, 07 Nov 2022, Ville Syrjala wrote: > From: Ville Syrj=C3=A4l=C3=A4 > > YCbCr output requires infoframes and whatnot, so don't allow > it when dealing with a DVI sink (or a HDMI sink we wishc to > treat as DVI). *wish Reviewed-by: Jani Nikula > > Signed-off-by: Ville Syrj=C3=A4l=C3=A4 > --- > drivers/gpu/drm/i915/display/intel_hdmi.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/= i915/display/intel_hdmi.c > index f2a4431a7fbf..d3692c9a1d80 100644 > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c > @@ -2190,9 +2190,13 @@ static bool intel_hdmi_has_audio(struct intel_enco= der *encoder, > } >=20=20 > static enum intel_output_format > -intel_hdmi_output_format(struct intel_connector *connector, > +intel_hdmi_output_format(const struct intel_crtc_state *crtc_state, > + struct intel_connector *connector, > bool ycbcr_420_output) > { > + if (!crtc_state->has_hdmi_sink) > + return INTEL_OUTPUT_FORMAT_RGB; > + > if (connector->base.ycbcr_420_allowed && ycbcr_420_output) > return INTEL_OUTPUT_FORMAT_YCBCR420; > else > @@ -2211,7 +2215,8 @@ static int intel_hdmi_compute_output_format(struct = intel_encoder *encoder, > bool ycbcr_420_only =3D drm_mode_is_420_only(info, adjusted_mode); > int ret; >=20=20 > - crtc_state->output_format =3D intel_hdmi_output_format(connector, ycbcr= _420_only); > + crtc_state->output_format =3D > + intel_hdmi_output_format(crtc_state, connector, ycbcr_420_only); >=20=20 > if (ycbcr_420_only && !intel_hdmi_is_ycbcr420(crtc_state)) { > drm_dbg_kms(&i915->drm, > @@ -2226,7 +2231,7 @@ static int intel_hdmi_compute_output_format(struct = intel_encoder *encoder, > !drm_mode_is_420_also(info, adjusted_mode)) > return ret; >=20=20 > - crtc_state->output_format =3D intel_hdmi_output_format(connector, true= ); > + crtc_state->output_format =3D intel_hdmi_output_format(crtc_state, con= nector, true); > ret =3D intel_hdmi_compute_clock(encoder, crtc_state, respect_downstre= am_limits); > } --=20 Jani Nikula, Intel Open Source Graphics Center