From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52AD8C432BE for ; Wed, 25 Aug 2021 09:22:37 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1D174610D0 for ; Wed, 25 Aug 2021 09:22:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1D174610D0 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E40036E16F; Wed, 25 Aug 2021 09:22:34 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1E1A3892A0; Wed, 25 Aug 2021 09:22:33 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10086"; a="204684927" X-IronPort-AV: E=Sophos;i="5.84,350,1620716400"; d="scan'208";a="204684927" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2021 02:22:32 -0700 X-IronPort-AV: E=Sophos;i="5.84,350,1620716400"; d="scan'208";a="536214487" Received: from mburkard-mobl1.ger.corp.intel.com (HELO localhost) ([10.251.213.64]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2021 02:22:29 -0700 From: Jani Nikula To: Koba Ko , intel-gfx@lists.freedesktop.org, amd-gfx@lists.freedesktop.org In-Reply-To: <20210825043522.346512-2-koba.ko@canonical.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210825043522.346512-1-koba.ko@canonical.com> <20210825043522.346512-2-koba.ko@canonical.com> Date: Wed, 25 Aug 2021 12:22:26 +0300 Message-ID: <87y28pev59.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Subject: Re: [Intel-gfx] [PATCH 2/2] drm/amdgpu: Disable PCIE_DPM on Intel RKL Platform X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Wed, 25 Aug 2021, Koba Ko wrote: > AMD polaris GPUs have an issue about audio noise on RKL platform, > they provide a commit to fix but for SMU7-based GPU still > need another module parameter, > > For avoiding the module parameter, switch PCI_DPM by determining > intel platform in amd drm driver. I'll just note that you could have a Tiger Lake PCH combined with a number of platforms other than Rocket Lake, including not just the obvious Tiger Lake but also Sky Lake, Kaby Lake, Coffee Lake, and Comet Lake. Again, I don't know what the root cause or fix should be, the workaround presented here impacts a much larger number of platforms than where you're claiming the issue is. BR, Jani. > > Fixes: 1a31474cdb48 ("drm/amd/pm: workaround for audio noise issue") > Ref: https://lists.freedesktop.org/archives/amd-gfx/2021-August/067413.html > Signed-off-by: Koba Ko > --- > .../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 21 ++++++++++++++++++- > 1 file changed, 20 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c > index 0541bfc81c1b..346110dd0f51 100644 > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c > @@ -1733,6 +1733,25 @@ static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr) > return result; > } > > +#include > + > +static bool intel_tgp_chk(void) > +{ > + struct pci_dev *pch = NULL; > + unsigned short id; > + > + while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) { > + if (pch->vendor != PCI_VENDOR_ID_INTEL) > + continue; > + > + id = pch->device & INTEL_PCH_DEVICE_ID_MASK; > + if (id == INTEL_PCH_TGP_DEVICE_ID_TYPE || INTEL_PCH_TGP2_DEVICE_ID_TYPE) PS. This is always true. ;) > + return true; > + } > + > + return false; > +} > + > static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) > { > struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); > @@ -1758,7 +1777,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) > > data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true; > data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true; > - data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true; > + data->pcie_dpm_key_disabled = intel_tgp_chk() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK); > /* need to set voltage control types before EVV patching */ > data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE; > data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE; -- Jani Nikula, Intel Open Source Graphics Center From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F34BC4338F for ; Wed, 25 Aug 2021 09:22:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E7DC161037 for ; Wed, 25 Aug 2021 09:22:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org E7DC161037 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8AF1B892A0; Wed, 25 Aug 2021 09:22:34 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1E1A3892A0; Wed, 25 Aug 2021 09:22:33 +0000 (UTC) X-IronPort-AV: E=McAfee;i="6200,9189,10086"; a="204684927" X-IronPort-AV: E=Sophos;i="5.84,350,1620716400"; d="scan'208";a="204684927" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2021 02:22:32 -0700 X-IronPort-AV: E=Sophos;i="5.84,350,1620716400"; d="scan'208";a="536214487" Received: from mburkard-mobl1.ger.corp.intel.com (HELO localhost) ([10.251.213.64]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2021 02:22:29 -0700 From: Jani Nikula To: Koba Ko , intel-gfx@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 2/2] drm/amdgpu: Disable PCIE_DPM on Intel RKL Platform In-Reply-To: <20210825043522.346512-2-koba.ko@canonical.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210825043522.346512-1-koba.ko@canonical.com> <20210825043522.346512-2-koba.ko@canonical.com> Date: Wed, 25 Aug 2021 12:22:26 +0300 Message-ID: <87y28pev59.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain X-BeenThere: amd-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces@lists.freedesktop.org Sender: "amd-gfx" On Wed, 25 Aug 2021, Koba Ko wrote: > AMD polaris GPUs have an issue about audio noise on RKL platform, > they provide a commit to fix but for SMU7-based GPU still > need another module parameter, > > For avoiding the module parameter, switch PCI_DPM by determining > intel platform in amd drm driver. I'll just note that you could have a Tiger Lake PCH combined with a number of platforms other than Rocket Lake, including not just the obvious Tiger Lake but also Sky Lake, Kaby Lake, Coffee Lake, and Comet Lake. Again, I don't know what the root cause or fix should be, the workaround presented here impacts a much larger number of platforms than where you're claiming the issue is. BR, Jani. > > Fixes: 1a31474cdb48 ("drm/amd/pm: workaround for audio noise issue") > Ref: https://lists.freedesktop.org/archives/amd-gfx/2021-August/067413.html > Signed-off-by: Koba Ko > --- > .../drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 21 ++++++++++++++++++- > 1 file changed, 20 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c > index 0541bfc81c1b..346110dd0f51 100644 > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c > @@ -1733,6 +1733,25 @@ static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr) > return result; > } > > +#include > + > +static bool intel_tgp_chk(void) > +{ > + struct pci_dev *pch = NULL; > + unsigned short id; > + > + while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) { > + if (pch->vendor != PCI_VENDOR_ID_INTEL) > + continue; > + > + id = pch->device & INTEL_PCH_DEVICE_ID_MASK; > + if (id == INTEL_PCH_TGP_DEVICE_ID_TYPE || INTEL_PCH_TGP2_DEVICE_ID_TYPE) PS. This is always true. ;) > + return true; > + } > + > + return false; > +} > + > static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) > { > struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend); > @@ -1758,7 +1777,7 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr) > > data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true; > data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true; > - data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true; > + data->pcie_dpm_key_disabled = intel_tgp_chk() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK); > /* need to set voltage control types before EVV patching */ > data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE; > data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE; -- Jani Nikula, Intel Open Source Graphics Center