From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8F596C3F2D2 for ; Fri, 28 Feb 2020 15:10:44 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 64E9524699 for ; Fri, 28 Feb 2020 15:10:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 64E9524699 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B62016E063; Fri, 28 Feb 2020 15:10:43 +0000 (UTC) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 51BAD6E063 for ; Fri, 28 Feb 2020 15:10:42 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 28 Feb 2020 07:10:41 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,496,1574150400"; d="scan'208";a="257137245" Received: from gaia.fi.intel.com ([10.237.72.192]) by orsmga002.jf.intel.com with ESMTP; 28 Feb 2020 07:10:40 -0800 Received: by gaia.fi.intel.com (Postfix, from userid 1000) id 1AA3C5C1DAA; Fri, 28 Feb 2020 17:09:28 +0200 (EET) From: Mika Kuoppala To: Chris Wilson , intel-gfx@lists.freedesktop.org In-Reply-To: <20200228082330.2411941-18-chris@chris-wilson.co.uk> References: <20200228082330.2411941-1-chris@chris-wilson.co.uk> <20200228082330.2411941-18-chris@chris-wilson.co.uk> Date: Fri, 28 Feb 2020 17:09:28 +0200 Message-ID: <87zhd27npz.fsf@gaia.fi.intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH 18/24] drm/i915/selftests: Wait for the kernel context switch X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Chris Wilson writes: > As we require a context switch to ensure that the current context is > switched out and saved to memory, perform an explicit switch to the > kernel context and wait for it. The patch subject is not incorrect. Just feels that the kernel context is a patsy in here. So I would s/kernel// on subject but keep in commit msg > > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/gt/selftest_lrc.c | 37 +++++++++++++++++++------- > 1 file changed, 28 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c > index d7f98aada626..95da6b880e3f 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c > +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c > @@ -4015,6 +4015,31 @@ static int emit_semaphore_signal(struct intel_context *ce, void *slot) > return 0; > } > > +static int context_sync(struct intel_context *ce) > +{ > + struct i915_request *rq; > + struct dma_fence *fence; > + int err = 0; > + > + rq = intel_engine_create_kernel_request(ce->engine); > + if (IS_ERR(rq)) > + return PTR_ERR(rq); > + > + fence = i915_active_fence_get(&ce->timeline->last_request); > + if (fence) { > + i915_request_await_dma_fence(rq, fence); > + dma_fence_put(fence); > + } > + > + rq = i915_request_get(rq); > + i915_request_add(rq); > + if (i915_request_wait(rq, 0, HZ / 2) < 0) > + err = -ETIME; > + i915_request_put(rq); > + > + return err; > +} > + > static int live_lrc_layout(void *arg) > { > struct intel_gt *gt = arg; > @@ -4638,16 +4663,10 @@ static int __lrc_timestamp(const struct lrc_timestamp *arg, bool preempt) > wmb(); > } > > - if (i915_request_wait(rq, 0, HZ / 2) < 0) { > - err = -ETIME; > - goto err; > - } > - > - /* and wait for switch to kernel */ > - if (igt_flush_test(arg->engine->i915)) { > - err = -EIO; > + /* and wait for switch to kernel (to save our context to memory) */ > + err = context_sync(arg->ce[0]); > + if (err) > goto err; > - } > > rmb(); For me the context_sync could be context_flush and it would allow the rmb() to be snuck inside. But I seem to gravitate towards lower resolution and apparently you prefer to be more fine grained and explicit on callsites so, Reviewed-by: Mika Kuoppala > > -- > 2.25.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx