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From: "Teres Alexis, Alan Previn" <alan.previn.teres.alexis@intel.com>
To: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "dri-devel@lists.freedesktop.org" <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v9 15/17] drm/i915/pxp: add pxp debugfs
Date: Fri, 10 Sep 2021 22:27:19 +0000	[thread overview]
Message-ID: <892db4b05014e2fbc2bcc5bd73c8396ccb95c9a7.camel@intel.com> (raw)
In-Reply-To: <20210910153627.1060858-16-daniele.ceraolospurio@intel.com>

Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com> 

..alan

On Fri, 2021-09-10 at 08:36 -0700, Daniele Ceraolo Spurio wrote:
> 2 debugfs files, one to query the current status of the pxp session and one
> to trigger an invalidation for testing.
> 
> v2: rename debugfs, fix date (Alan)
> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Reviewed-by : Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile                |  1 +
>  drivers/gpu/drm/i915/gt/debugfs_gt.c         |  2 +
>  drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 78 ++++++++++++++++++++
>  drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.h | 21 ++++++
>  4 files changed, 102 insertions(+)
>  create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
>  create mode 100644 drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.h
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 366e82cec44d..b46474ee1a1f 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -285,6 +285,7 @@ i915-y += i915_perf.o
>  i915-$(CONFIG_DRM_I915_PXP) += \
>  	pxp/intel_pxp.o \
>  	pxp/intel_pxp_cmd.o \
> +	pxp/intel_pxp_debugfs.o \
>  	pxp/intel_pxp_irq.o \
>  	pxp/intel_pxp_pm.o \
>  	pxp/intel_pxp_session.o \
> diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c b/drivers/gpu/drm/i915/gt/debugfs_gt.c
> index 591eb60785db..c27847ddb796 100644
> --- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
> +++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
> @@ -9,6 +9,7 @@
>  #include "debugfs_gt.h"
>  #include "debugfs_gt_pm.h"
>  #include "intel_sseu_debugfs.h"
> +#include "pxp/intel_pxp_debugfs.h"
>  #include "uc/intel_uc_debugfs.h"
>  #include "i915_drv.h"
>  
> @@ -28,6 +29,7 @@ void debugfs_gt_register(struct intel_gt *gt)
>  	intel_sseu_debugfs_register(gt, root);
>  
>  	intel_uc_debugfs_register(&gt->uc, root);
> +	intel_pxp_debugfs_register(&gt->pxp, root);
>  }
>  
>  void intel_gt_debugfs_register_files(struct dentry *root,
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> new file mode 100644
> index 000000000000..cbb1853676cc
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c
> @@ -0,0 +1,78 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2021 Intel Corporation
> + */
> +
> +#include <linux/debugfs.h>
> +#include <drm/drm_print.h>
> +
> +#include "gt/debugfs_gt.h"
> +#include "pxp/intel_pxp.h"
> +#include "pxp/intel_pxp_irq.h"
> +#include "i915_drv.h"
> +
> +static int pxp_info_show(struct seq_file *m, void *data)
> +{
> +	struct intel_pxp *pxp = m->private;
> +	struct drm_printer p = drm_seq_file_printer(m);
> +	bool enabled = intel_pxp_is_enabled(pxp);
> +
> +	if (!enabled) {
> +		drm_printf(&p, "pxp disabled\n");
> +		return 0;
> +	}
> +
> +	drm_printf(&p, "active: %s\n", yesno(intel_pxp_is_active(pxp)));
> +	drm_printf(&p, "instance counter: %u\n", pxp->key_instance);
> +
> +	return 0;
> +}
> +DEFINE_GT_DEBUGFS_ATTRIBUTE(pxp_info);
> +
> +static int pxp_terminate_get(void *data, u64 *val)
> +{
> +	/* nothing to read */
> +	return -EPERM;
> +}
> +
> +static int pxp_terminate_set(void *data, u64 val)
> +{
> +	struct intel_pxp *pxp = data;
> +	struct intel_gt *gt = pxp_to_gt(pxp);
> +
> +	if (!intel_pxp_is_active(pxp))
> +		return -ENODEV;
> +
> +	/* simulate a termination interrupt */
> +	spin_lock_irq(&gt->irq_lock);
> +	intel_pxp_irq_handler(pxp, GEN12_DISPLAY_PXP_STATE_TERMINATED_INTERRUPT);
> +	spin_unlock_irq(&gt->irq_lock);
> +
> +	if (!wait_for_completion_timeout(&pxp->termination,
> +					 msecs_to_jiffies(100)))
> +		return -ETIMEDOUT;
> +
> +	return 0;
> +}
> +
> +DEFINE_SIMPLE_ATTRIBUTE(pxp_terminate_fops, pxp_terminate_get, pxp_terminate_set, "%llx\n");
> +void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *gt_root)
> +{
> +	static const struct debugfs_gt_file files[] = {
> +		{ "info", &pxp_info_fops, NULL },
> +		{ "terminate_state", &pxp_terminate_fops, NULL },
> +	};
> +	struct dentry *root;
> +
> +	if (!gt_root)
> +		return;
> +
> +	if (!HAS_PXP((pxp_to_gt(pxp)->i915)))
> +		return;
> +
> +	root = debugfs_create_dir("pxp", gt_root);
> +	if (IS_ERR(root))
> +		return;
> +
> +	intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), pxp);
> +}
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.h b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.h
> new file mode 100644
> index 000000000000..7e0c3d2f5d7e
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.h
> @@ -0,0 +1,21 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2021 Intel Corporation
> + */
> +
> +#ifndef __INTEL_PXP_DEBUGFS_H__
> +#define __INTEL_PXP_DEBUGFS_H__
> +
> +struct intel_pxp;
> +struct dentry;
> +
> +#ifdef CONFIG_DRM_I915_PXP
> +void intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *root);
> +#else
> +static inline void
> +intel_pxp_debugfs_register(struct intel_pxp *pxp, struct dentry *root)
> +{
> +}
> +#endif
> +
> +#endif /* __INTEL_PXP_DEBUGFS_H__ */
> -- 
> 2.25.1
> 


  reply	other threads:[~2021-09-10 22:27 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-10 15:36 [PATCH v9 00/17] drm/i915: Introduce Intel PXP Daniele Ceraolo Spurio
2021-09-10 15:36 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 01/17] drm/i915/pxp: Define PXP component interface Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 02/17] mei: pxp: export pavp client to me client bus Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 03/17] drm/i915/pxp: define PXP device flag and kconfig Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-15 13:29   ` Jani Nikula
2021-09-15 13:29     ` [Intel-gfx] " Jani Nikula
2021-09-15 15:24     ` Rodrigo Vivi
2021-09-15 15:24       ` [Intel-gfx] " Rodrigo Vivi
2021-09-10 15:36 ` [PATCH v9 04/17] drm/i915/pxp: allocate a vcs context for pxp usage Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-15 13:53   ` Jani Nikula
2021-09-15 21:00     ` Rodrigo Vivi
2021-09-16 11:06       ` Jani Nikula
2021-09-16 13:59         ` Rodrigo Vivi
2021-09-16 15:23           ` Teres Alexis, Alan Previn
2021-09-10 15:36 ` [PATCH v9 05/17] drm/i915/pxp: Implement funcs to create the TEE channel Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 18:47   ` Rodrigo Vivi
2021-09-10 15:36 ` [PATCH v9 06/17] drm/i915/pxp: set KCR reg init Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 07/17] drm/i915/pxp: Create the arbitrary session after boot Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 08/17] drm/i915/pxp: Implement arb session teardown Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 09/17] drm/i915/pxp: Implement PXP irq handler Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 10/17] drm/i915/pxp: interfaces for using protected objects Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 18:45   ` Rodrigo Vivi
2021-09-10 18:45     ` [Intel-gfx] " Rodrigo Vivi
2021-09-10 15:36 ` [PATCH v9 11/17] drm/i915/pxp: start the arb session on demand Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 12/17] drm/i915/pxp: Enable PXP power management Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-14 19:13   ` Rodrigo Vivi
2021-09-14 19:13     ` Rodrigo Vivi
2021-09-15 15:11     ` Daniele Ceraolo Spurio
2021-09-15 15:11       ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-15 15:23       ` Rodrigo Vivi
2021-09-15 15:23         ` [Intel-gfx] " Rodrigo Vivi
2021-09-16 13:55         ` Rodrigo Vivi
2021-09-10 15:36 ` [PATCH v9 13/17] drm/i915/pxp: Add plane decryption support Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 14/17] drm/i915/pxp: black pixels on pxp disabled Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 15:36 ` [PATCH v9 15/17] drm/i915/pxp: add pxp debugfs Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 22:27   ` Teres Alexis, Alan Previn [this message]
2021-09-10 15:36 ` [PATCH v9 16/17] drm/i915/pxp: add PXP documentation Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 18:41   ` Rodrigo Vivi
2021-09-10 15:36 ` [PATCH v9 17/17] drm/i915/pxp: enable PXP for integrated Gen12 Daniele Ceraolo Spurio
2021-09-10 15:36   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-09-10 16:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce Intel PXP (rev7) Patchwork
2021-09-10 16:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-10 16:17 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-09-10 16:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-10 18:30 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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