Re: [PATCH RFC 2/2] drm/amdgpu: Set/clear CPU_ACCESS flag on page fault and move to VRAM

["Christian König" <deathsimple-ANTagKRnAhcb1SvskN2V4Q@public.gmane.org>]

Am 03.07.2017 um 03:34 schrieb Michel Dänzer:
> On 02/07/17 09:52 PM, Christian König wrote:
>> Am 30.06.2017 um 17:18 schrieb John Brooks:
>>> When a BO is moved to VRAM, clear AMDGPU_BO_FLAG_CPU_ACCESS. This
>>> allows it
>>> to potentially later move to invisible VRAM if the CPU does not access it
>>> again.
>>>
>>> Setting the CPU_ACCESS flag in amdgpu_fault_reserve_notify() also means
>>> that we can remove the loop to restrict lpfn to the end of visible VRAM,
>>> because amdgpu_ttm_placement_init() will do it for us.
>>>
>>> Signed-off-by: John Brooks <john@fastquake.com>
> [...]
>
>>> @@ -446,6 +448,12 @@ static int amdgpu_move_ram_vram(struct
>>> ttm_buffer_object *bo,
>>>        if (unlikely(r)) {
>>>            goto out_cleanup;
>>>        }
>>> +
>>> +    /* The page fault handler will re-set this if the CPU accesses
>>> the BO
>>> +     * after it's moved.
>>> +     */
> Maybe say "amdgpu_bo_fault_reserve_notify" explicitly here instead of
> "The page fault handler".
>
>
>>> +    abo->flags &= ~AMDGPU_BO_FLAG_CPU_ACCESS;
>>> +
>> This is the wrong place for clearing the flag. This code path is only
>> called when we move things back in after suspend/resume (or run out of
>> GTT space).
> Surely amdgpu_move_ram_vram is called whenever a BO is moved to VRAM,

No, that isn't even remotely correct. amdgpu_move_ram_vram() is only 
called when the BO is moved directly from the system domain to the VRAM 
domain.

Normally BOs are only moved from the GTT domain to the VRAM domain, 
except after resume and when we ran out of GTT space.

> for any reason. I suggested clearing the flag here to John on IRC. The
> idea is briefly described in the commit log, let me elaborate a bit on that:
>
> When a BO is moved to VRAM which has the AMDGPU_BO_FLAG_CPU_ACCESS flag
> set, it is put in CPU visible VRAM, and the flag is cleared. If the CPU
> doesn't access the BO, the next time it will be moved to VRAM (after it
> was evicted from there, for any reason), the flag will no longer be set,
> and the BO will likely be moved to CPU invisible VRAM.
>
> If the BO is accessed by the CPU again though (no matter where the BO is
> currently located at that time), the flag is set again, and the cycle
> from the previous paragraph starts over.
>
> The end result should be similar as with the timestamp based solution in
> John's earlier series: BOs which are at least occasionally accessed by
> the CPU will tend to be in CPU visible VRAM, those which are never
> accessed by the CPU can be in CPU invisible VRAM.
Yeah, I understand the intention. But the implementation isn't even 
remotely correct.

First of all the flag must be cleared in the CS which wants to move the 
BO, not in the move functions when the decision where to put it is 
already made.

Second currently the flag is set on page fault, but never cleared 
because the place where the code to clear it was added is just 
completely incorrect (see above).

Instead of messing with all this I suggest that we just add a jiffies 
based timeout to the BO when we can clear the flag. For kernel BOs this 
timeout is just infinity.

Then we check in amdgpu_cs_bo_validate() before generating the 
placements if we could clear the flag and do so based on the timeout.

I can help implementing this when I'm done getting ride of the BO move 
size limitation (swapped all of this stuff for that task back into my 
brain anyway).

Regards,
Christian.
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