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[2001:14ba:a0db:1f00::8a5]) by smtp.gmail.com with ESMTPSA id v16-20020ac25610000000b004d8546456c6sm1027571lfd.195.2023.06.01.02.56.15 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 01 Jun 2023 02:56:15 -0700 (PDT) Message-ID: <8983fc5f-b75e-3f38-577f-3c588acbe3f7@linaro.org> Date: Thu, 1 Jun 2023 12:56:14 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 06/20] interconnect: qcom: icc-rpm: Allow negative QoS offset Content-Language: en-GB To: Konrad Dybcio , Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Georgi Djakov , Leo Yan , Evan Green Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, linux-pm@vger.kernel.org References: <20230526-topic-smd_icc-v1-0-1bf8e6663c4e@linaro.org> <20230526-topic-smd_icc-v1-6-1bf8e6663c4e@linaro.org> From: Dmitry Baryshkov In-Reply-To: <20230526-topic-smd_icc-v1-6-1bf8e6663c4e@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 30/05/2023 13:20, Konrad Dybcio wrote: > In some very very very very unfortunate cases, the correct offset of > the QoS registers will be.. negative. One such case is MSM8998, where > The DDR BWMON occupies what-would-be-the-BIMC-base which we usually > take into account with the register calculation, making the actual > BIMC node start at what-would-be-the-BIMC-base+0x300. Can we turn one of devices into a child of another device? This way we won't have to cope with negative offsets. > > In order to keep the calculation code sane, the simplest - however > ugly it may be - solution is to allow the offset to be negative. > > Signed-off-by: Konrad Dybcio > --- > drivers/interconnect/qcom/icc-rpm.h | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/interconnect/qcom/icc-rpm.h b/drivers/interconnect/qcom/icc-rpm.h > index d2c04c400cad..ba840a436cc0 100644 > --- a/drivers/interconnect/qcom/icc-rpm.h > +++ b/drivers/interconnect/qcom/icc-rpm.h > @@ -29,10 +29,10 @@ enum qcom_icc_type { > * @num_intf_clks: the total number of intf_clks clk_bulk_data entries > * @type: the ICC provider type > * @regmap: regmap for QoS registers read/write access > - * @qos_offset: offset to QoS registers > * @bus_clk_rate: bus clock rate in Hz > * @bus_clks: the clk_bulk_data table of bus clocks > * @intf_clks: a clk_bulk_data array of interface clocks > + * @qos_offset: offset to QoS registers This can be kept in place. > * @keep_alive: whether to always keep a minimum vote on the bus clocks > * @is_on: whether the bus is powered on > */ > @@ -42,7 +42,7 @@ struct qcom_icc_provider { > int num_intf_clks; > enum qcom_icc_type type; > struct regmap *regmap; > - unsigned int qos_offset; > + int qos_offset; > u64 bus_clk_rate[NUM_BUS_CLKS]; > struct clk_bulk_data bus_clks[NUM_BUS_CLKS]; > struct clk_bulk_data *intf_clks; > @@ -108,7 +108,7 @@ struct qcom_icc_desc { > bool no_clk_scaling; > enum qcom_icc_type type; > const struct regmap_config *regmap_cfg; > - unsigned int qos_offset; > + int qos_offset; > }; > > /* Valid for all bus types */ > -- With best wishes Dmitry