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[131.111.5.141]) by smtp.gmail.com with ESMTPSA id e9-20020a05600c4e4900b003942a244f2esm3087161wmq.7.2022.05.25.17.06.26 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 May 2022 17:06:27 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3696.80.82.1.1\)) Subject: Re: [PATCH 5/5] riscv/efi_stub: Support for 64bit boot-hartid From: Jessica Clarke In-Reply-To: Date: Thu, 26 May 2022 01:06:26 +0100 Cc: Heinrich Schuchardt , Ard Biesheuvel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Atish Patra , Anup Patel , linux-riscv , Linux Kernel Mailing List , linux-efi , Sunil V L , Sunil V L Content-Transfer-Encoding: quoted-printable Message-Id: <898EDFB9-D4AE-45CD-AEEC-FAB4BE7AEBF4@jrtc27.com> References: <20220525151106.2176147-1-sunilvl@ventanamicro.com> <20220525151106.2176147-6-sunilvl@ventanamicro.com> <1e90b15b-8c73-0de8-2885-1292923b7575@canonical.com> <5829932A-6E45-46CA-AADA-14EDD903C4AD@jrtc27.com> To: Atish Patra X-Mailer: Apple Mail (2.3696.80.82.1.1) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 26 May 2022, at 00:49, Atish Patra wrote: >=20 > On Wed, May 25, 2022 at 4:36 PM Jessica Clarke = wrote: >>=20 >> On 26 May 2022, at 00:11, Atish Patra wrote: >>>=20 >>> On Wed, May 25, 2022 at 9:09 AM Heinrich Schuchardt >>> wrote: >>>>=20 >>>> On 5/25/22 17:48, Ard Biesheuvel wrote: >>>>> On Wed, 25 May 2022 at 17:11, Sunil V L = wrote: >>>>>>=20 >>>>>> The boot-hartid can be a 64bit value on RV64 platforms. = Currently, >>>>>> the "boot-hartid" in DT is assumed to be 32bit only. This patch >>>>>> detects the size of the "boot-hartid" and uses 32bit or 64bit >>>>>> FDT reads appropriately. >>>>>>=20 >>>>>> Signed-off-by: Sunil V L >>>>>> --- >>>>>> drivers/firmware/efi/libstub/riscv-stub.c | 12 +++++++++--- >>>>>> 1 file changed, 9 insertions(+), 3 deletions(-) >>>>>>=20 >>>>>> diff --git a/drivers/firmware/efi/libstub/riscv-stub.c = b/drivers/firmware/efi/libstub/riscv-stub.c >>>>>> index 9e85e58d1f27..d748533f1329 100644 >>>>>> --- a/drivers/firmware/efi/libstub/riscv-stub.c >>>>>> +++ b/drivers/firmware/efi/libstub/riscv-stub.c >>>>>> @@ -29,7 +29,7 @@ static int get_boot_hartid_from_fdt(void) >>>>>> { >>>>>> const void *fdt; >>>>>> int chosen_node, len; >>>>>> - const fdt32_t *prop; >>>>>> + const void *prop; >>>>>>=20 >>>>>> fdt =3D get_efi_config_table(DEVICE_TREE_GUID); >>>>>> if (!fdt) >>>>>> @@ -40,10 +40,16 @@ static int get_boot_hartid_from_fdt(void) >>>>>> return -EINVAL; >>>>>>=20 >>>>>> prop =3D fdt_getprop((void *)fdt, chosen_node, "boot-hartid", = &len); >>>>>> - if (!prop || len !=3D sizeof(u32)) >>>>>> + if (!prop) >>>>>> + return -EINVAL; >>>>>> + >>>>>> + if (len =3D=3D sizeof(u32)) >>>>>> + hartid =3D (unsigned long) fdt32_to_cpu(*(fdt32_t *)prop); >>>>>> + else if (len =3D=3D sizeof(u64)) >>>>>> + hartid =3D (unsigned long) fdt64_to_cpu(*(fdt64_t *)prop); >>>>>=20 >>>>> Does RISC-V care about alignment? A 64-bit quantity is not = guaranteed >>>>> to appear 64-bit aligned in the DT, and the cast violates C = alignment >>>>> rules, so this should probably used get_unaligned_be64() or = something >>>>> like that. >>>>=20 >>>> When running in S-mode the SBI handles unaligned access but this = has a >>>> performance penalty. >>>>=20 >>>> We could use fdt64_to_cpu(__get_unaligned_t(fdt64_t, prop)) here. >>>>=20 >>>=20 >>> It is better to avoid unaligned access in the kernel. There are some >>> plans to disable >>> misaligned load/store emulation in the firmware if user space = requests >>> it via prctl. >>=20 >> Why? >>=20 > To support prctl call with PR_SET_UNALIGN Is that needed? It=E2=80=99s almost entirely unused as far as I can = tell, with all but one use turning unaligned fixups *on*, and the other use being IA-64-specific. What is the actual use case other than seeing a thing that exists on some architectures and wanting to have it do something on RISC-V? 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[131.111.5.141]) by smtp.gmail.com with ESMTPSA id e9-20020a05600c4e4900b003942a244f2esm3087161wmq.7.2022.05.25.17.06.26 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 25 May 2022 17:06:27 -0700 (PDT) Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3696.80.82.1.1\)) Subject: Re: [PATCH 5/5] riscv/efi_stub: Support for 64bit boot-hartid From: Jessica Clarke In-Reply-To: Date: Thu, 26 May 2022 01:06:26 +0100 Cc: Heinrich Schuchardt , Ard Biesheuvel , Paul Walmsley , Palmer Dabbelt , Albert Ou , Daniel Lezcano , Thomas Gleixner , Marc Zyngier , Atish Patra , Anup Patel , linux-riscv , Linux Kernel Mailing List , linux-efi , Sunil V L , Sunil V L Message-Id: <898EDFB9-D4AE-45CD-AEEC-FAB4BE7AEBF4@jrtc27.com> References: <20220525151106.2176147-1-sunilvl@ventanamicro.com> <20220525151106.2176147-6-sunilvl@ventanamicro.com> <1e90b15b-8c73-0de8-2885-1292923b7575@canonical.com> <5829932A-6E45-46CA-AADA-14EDD903C4AD@jrtc27.com> To: Atish Patra X-Mailer: Apple Mail (2.3696.80.82.1.1) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220525_170631_064113_141D8B1A X-CRM114-Status: GOOD ( 20.04 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org T24gMjYgTWF5IDIwMjIsIGF0IDAwOjQ5LCBBdGlzaCBQYXRyYSA8YXRpc2hwQGF0aXNocGF0cmEu b3JnPiB3cm90ZToKPiAKPiBPbiBXZWQsIE1heSAyNSwgMjAyMiBhdCA0OjM2IFBNIEplc3NpY2Eg Q2xhcmtlIDxqcnRjMjdAanJ0YzI3LmNvbT4gd3JvdGU6Cj4+IAo+PiBPbiAyNiBNYXkgMjAyMiwg YXQgMDA6MTEsIEF0aXNoIFBhdHJhIDxhdGlzaHBAYXRpc2hwYXRyYS5vcmc+IHdyb3RlOgo+Pj4g Cj4+PiBPbiBXZWQsIE1heSAyNSwgMjAyMiBhdCA5OjA5IEFNIEhlaW5yaWNoIFNjaHVjaGFyZHQK Pj4+IDxoZWlucmljaC5zY2h1Y2hhcmR0QGNhbm9uaWNhbC5jb20+IHdyb3RlOgo+Pj4+IAo+Pj4+ IE9uIDUvMjUvMjIgMTc6NDgsIEFyZCBCaWVzaGV1dmVsIHdyb3RlOgo+Pj4+PiBPbiBXZWQsIDI1 IE1heSAyMDIyIGF0IDE3OjExLCBTdW5pbCBWIEwgPHN1bmlsdmxAdmVudGFuYW1pY3JvLmNvbT4g d3JvdGU6Cj4+Pj4+PiAKPj4+Pj4+IFRoZSBib290LWhhcnRpZCBjYW4gYmUgYSA2NGJpdCB2YWx1 ZSBvbiBSVjY0IHBsYXRmb3Jtcy4gQ3VycmVudGx5LAo+Pj4+Pj4gdGhlICJib290LWhhcnRpZCIg aW4gRFQgaXMgYXNzdW1lZCB0byBiZSAzMmJpdCBvbmx5LiBUaGlzIHBhdGNoCj4+Pj4+PiBkZXRl Y3RzIHRoZSBzaXplIG9mIHRoZSAiYm9vdC1oYXJ0aWQiIGFuZCB1c2VzIDMyYml0IG9yIDY0Yml0 Cj4+Pj4+PiBGRFQgcmVhZHMgYXBwcm9wcmlhdGVseS4KPj4+Pj4+IAo+Pj4+Pj4gU2lnbmVkLW9m Zi1ieTogU3VuaWwgViBMIDxzdW5pbHZsQHZlbnRhbmFtaWNyby5jb20+Cj4+Pj4+PiAtLS0KPj4+ Pj4+IGRyaXZlcnMvZmlybXdhcmUvZWZpL2xpYnN0dWIvcmlzY3Ytc3R1Yi5jIHwgMTIgKysrKysr KysrLS0tCj4+Pj4+PiAxIGZpbGUgY2hhbmdlZCwgOSBpbnNlcnRpb25zKCspLCAzIGRlbGV0aW9u cygtKQo+Pj4+Pj4gCj4+Pj4+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9maXJtd2FyZS9lZmkvbGli c3R1Yi9yaXNjdi1zdHViLmMgYi9kcml2ZXJzL2Zpcm13YXJlL2VmaS9saWJzdHViL3Jpc2N2LXN0 dWIuYwo+Pj4+Pj4gaW5kZXggOWU4NWU1OGQxZjI3Li5kNzQ4NTMzZjEzMjkgMTAwNjQ0Cj4+Pj4+ PiAtLS0gYS9kcml2ZXJzL2Zpcm13YXJlL2VmaS9saWJzdHViL3Jpc2N2LXN0dWIuYwo+Pj4+Pj4g KysrIGIvZHJpdmVycy9maXJtd2FyZS9lZmkvbGlic3R1Yi9yaXNjdi1zdHViLmMKPj4+Pj4+IEBA IC0yOSw3ICsyOSw3IEBAIHN0YXRpYyBpbnQgZ2V0X2Jvb3RfaGFydGlkX2Zyb21fZmR0KHZvaWQp Cj4+Pj4+PiB7Cj4+Pj4+PiBjb25zdCB2b2lkICpmZHQ7Cj4+Pj4+PiBpbnQgY2hvc2VuX25vZGUs IGxlbjsKPj4+Pj4+IC0gY29uc3QgZmR0MzJfdCAqcHJvcDsKPj4+Pj4+ICsgY29uc3Qgdm9pZCAq cHJvcDsKPj4+Pj4+IAo+Pj4+Pj4gZmR0ID0gZ2V0X2VmaV9jb25maWdfdGFibGUoREVWSUNFX1RS RUVfR1VJRCk7Cj4+Pj4+PiBpZiAoIWZkdCkKPj4+Pj4+IEBAIC00MCwxMCArNDAsMTYgQEAgc3Rh dGljIGludCBnZXRfYm9vdF9oYXJ0aWRfZnJvbV9mZHQodm9pZCkKPj4+Pj4+IHJldHVybiAtRUlO VkFMOwo+Pj4+Pj4gCj4+Pj4+PiBwcm9wID0gZmR0X2dldHByb3AoKHZvaWQgKilmZHQsIGNob3Nl bl9ub2RlLCAiYm9vdC1oYXJ0aWQiLCAmbGVuKTsKPj4+Pj4+IC0gaWYgKCFwcm9wIHx8IGxlbiAh PSBzaXplb2YodTMyKSkKPj4+Pj4+ICsgaWYgKCFwcm9wKQo+Pj4+Pj4gKyByZXR1cm4gLUVJTlZB TDsKPj4+Pj4+ICsKPj4+Pj4+ICsgaWYgKGxlbiA9PSBzaXplb2YodTMyKSkKPj4+Pj4+ICsgaGFy dGlkID0gKHVuc2lnbmVkIGxvbmcpIGZkdDMyX3RvX2NwdSgqKGZkdDMyX3QgKilwcm9wKTsKPj4+ Pj4+ICsgZWxzZSBpZiAobGVuID09IHNpemVvZih1NjQpKQo+Pj4+Pj4gKyBoYXJ0aWQgPSAodW5z aWduZWQgbG9uZykgZmR0NjRfdG9fY3B1KCooZmR0NjRfdCAqKXByb3ApOwo+Pj4+PiAKPj4+Pj4g RG9lcyBSSVNDLVYgY2FyZSBhYm91dCBhbGlnbm1lbnQ/IEEgNjQtYml0IHF1YW50aXR5IGlzIG5v dCBndWFyYW50ZWVkCj4+Pj4+IHRvIGFwcGVhciA2NC1iaXQgYWxpZ25lZCBpbiB0aGUgRFQsIGFu ZCB0aGUgY2FzdCB2aW9sYXRlcyBDIGFsaWdubWVudAo+Pj4+PiBydWxlcywgc28gdGhpcyBzaG91 bGQgcHJvYmFibHkgdXNlZCBnZXRfdW5hbGlnbmVkX2JlNjQoKSBvciBzb21ldGhpbmcKPj4+Pj4g bGlrZSB0aGF0Lgo+Pj4+IAo+Pj4+IFdoZW4gcnVubmluZyBpbiBTLW1vZGUgdGhlIFNCSSBoYW5k bGVzIHVuYWxpZ25lZCBhY2Nlc3MgYnV0IHRoaXMgaGFzIGEKPj4+PiBwZXJmb3JtYW5jZSBwZW5h bHR5Lgo+Pj4+IAo+Pj4+IFdlIGNvdWxkIHVzZSBmZHQ2NF90b19jcHUoX19nZXRfdW5hbGlnbmVk X3QoZmR0NjRfdCwgcHJvcCkpIGhlcmUuCj4+Pj4gCj4+PiAKPj4+IEl0IGlzIGJldHRlciB0byBh dm9pZCB1bmFsaWduZWQgYWNjZXNzIGluIHRoZSBrZXJuZWwuIFRoZXJlIGFyZSBzb21lCj4+PiBw bGFucyB0byBkaXNhYmxlCj4+PiBtaXNhbGlnbmVkIGxvYWQvc3RvcmUgZW11bGF0aW9uIGluIHRo ZSBmaXJtd2FyZSBpZiB1c2VyIHNwYWNlIHJlcXVlc3RzCj4+PiBpdCB2aWEgcHJjdGwuCj4+IAo+ PiBXaHk/Cj4+IAo+IFRvIHN1cHBvcnQgcHJjdGwgY2FsbCB3aXRoIFBSX1NFVF9VTkFMSUdOCgpJ cyB0aGF0IG5lZWRlZD8gSXTigJlzIGFsbW9zdCBlbnRpcmVseSB1bnVzZWQgYXMgZmFyIGFzIEkg Y2FuIHRlbGwsIHdpdGgKYWxsIGJ1dCBvbmUgdXNlIHR1cm5pbmcgdW5hbGlnbmVkIGZpeHVwcyAq b24qLCBhbmQgdGhlIG90aGVyIHVzZSBiZWluZwpJQS02NC1zcGVjaWZpYy4gV2hhdCBpcyB0aGUg YWN0dWFsIHVzZSBjYXNlIG90aGVyIHRoYW4gc2VlaW5nIGEgdGhpbmcKdGhhdCBleGlzdHMgb24g c29tZSBhcmNoaXRlY3R1cmVzIGFuZCB3YW50aW5nIHRvIGhhdmUgaXQgZG8gc29tZXRoaW5nCm9u IFJJU0MtVj8KCkplc3MKCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fXwpsaW51eC1yaXNjdiBtYWlsaW5nIGxpc3QKbGludXgtcmlzY3ZAbGlzdHMuaW5mcmFk ZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2xpbnV4 LXJpc2N2Cg==