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charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 9.3 \(3124\)) Subject: Re: [v3 4/5] MIPS: BMIPS: Add support NAND device nodes From: Jaedon Shin In-Reply-To: <947152ab-0a28-365d-4fd9-eb84cdfd2147@gmail.com> Date: Tue, 16 Aug 2016 19:51:34 +0900 Cc: Ralf Baechle , Jonas Gorski , Kevin Cernekee , Rob Herring , MIPS Mailing List Content-Transfer-Encoding: 8BIT Message-Id: <89CBA8CF-E399-4CA1-9493-E9310A978CC6@gmail.com> References: <20160812085231.53290-1-jaedon.shin@gmail.com> <20160812085231.53290-5-jaedon.shin@gmail.com> <947152ab-0a28-365d-4fd9-eb84cdfd2147@gmail.com> To: Florian Fainelli X-Mailer: Apple Mail (2.3124) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 54567 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: jaedon.shin@gmail.com Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips Hi Florian, On Aug 13, 2016, at 8:17 AM, Florian Fainelli wrote: > > On 08/12/2016 01:52 AM, Jaedon Shin wrote: >> Adds NAND device nodes to BCM7xxx MIPS based SoCs. >> >> Signed-off-by: Jaedon Shin >> --- > > I did not check all the reference boards, but for 7425 and 7435 here is > what you should have: > >> diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts >> index 1c6b74daef56..3b917cac7efe 100644 >> --- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts >> +++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts >> @@ -1,6 +1,7 @@ >> /dts-v1/; >> >> /include/ "bcm7425.dtsi" >> +/include/ "bcm97xxx-nand-cs1-bch8.dtsi" >> >> / { >> compatible = "brcm,bcm97425svmb", "brcm,bcm7425"; >> @@ -95,6 +96,10 @@ >> status = "okay"; >> }; >> >> +&nand { >> + status = "okay"; >> +}; > > Here are the correct properties for our BCM97425SVMB board: > > &nand { > status = "okay"; > > nandcs@1 { > #size-cells = <0x2>; > #address-cells = <0x2>; > compatible = "brcm,nandcs"; > reg = <0x1>; > nand-on-flash-bbt; > > nand-ecc-strength = <24>; > nand-ecc-step-size = <1024>; > brcm,nand-oob-sector-size = <27>; > >> + >> &sdhci0 { >> status = "okay"; >> }; >> diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts >> index 64bb1988dbc8..54351e54ff68 100644 >> --- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts >> +++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts >> @@ -1,6 +1,7 @@ >> /dts-v1/; >> >> /include/ "bcm7435.dtsi" >> +/include/ "bcm97xxx-nand-cs1-bch8.dtsi" > > And here are those for the BCM97435SVMB: > > &nand { > status = "okay"; > > nandcs@1 { > #size-cells = <0x2>; > #address-cells = <0x2>; > compatible = "brcm,nandcs"; > reg = <0x1>; > nand-on-flash-bbt; > > nand-ecc-strength = <24>; > nand-ecc-step-size = <1024>; > brcm,nand-oob-sector-size = <27>; > > -- > Florian I found sample boot logs on CFE. BCM7346, BCM7425 and BCM7435 have 32Gb (MT29F32G08CBCA) or 16Gb NAND flash, this is nand-ecc-strength = <24>; nand-ecc-step-size = <1024>; brcm,nand-oob-sector-size = <27>; BCM7358 and BCM7362 have 8Gb(MT29F8G08ABABA) or 2Gb NAND flash, this is nand-ecc-strength = <4>; nand-ecc-step-size = <512>; brcm,nand-oob-sector-size = <16>; BCM7360 hasn't NAND flash. So, I will split into two files like bellow, bcm97xxx-nand-cs1-bch24.dtsi bcm97xxx-nand-cs1-bch4.dtsi Please let me know if you have better way. Thanks, Jaedon