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([2001:b07:6468:f312:5e2c:eb9a:a8b6:fd3e]) by smtp.gmail.com with ESMTPSA id a3sm2173658edu.46.2021.08.10.10.52.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 10 Aug 2021 10:52:13 -0700 (PDT) To: Sean Christopherson , Junaid Shahid Cc: kvm@vger.kernel.org, jmattson@google.com, bgardon@google.com, pshier@google.com References: <20210806222229.1645356-1-junaids@google.com> From: Paolo Bonzini Subject: Re: [PATCH] kvm: vmx: Sync all matching EPTPs when injecting nested EPT fault Message-ID: <89c2d9da-590b-fb03-405c-4b16f2aff090@redhat.com> Date: Tue, 10 Aug 2021 19:52:12 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 10/08/21 01:33, Sean Christopherson wrote: > On Fri, Aug 06, 2021, Junaid Shahid wrote: >> When a nested EPT violation/misconfig is injected into the guest, >> the shadow EPT PTEs associated with that address need to be synced. >> This is done by kvm_inject_emulated_page_fault() before it calls >> nested_ept_inject_page_fault(). However, that will only sync the >> shadow EPT PTE associated with the current L1 EPTP. Since the ASID > > For the changelog and the comment, IMO using "vmcs12 EPTP" instead of "L1 EPTP" > would add clarity. I usually think of "L1 EPTP" as vmcs01->eptp and "L2 EPTP" > as vmcs02->EPTP. There are enough EPTPs in play with nested that it'd help to > be very explicit. Or more briefly "EPT12". >> is based on EP4TA rather than the full EPTP, so syncing the current >> EPTP is not enough. The SPTEs associated with any other L1 EPTPs >> in the prev_roots cache with the same EP4TA also need to be synced. > > No small part of me wonders if we should disallow duplicate vmcs12 EP4TAs in a > single vCPU's root cache, e.g. purge existing roots with the same pgd but > different role. INVEPT does the right thing, but that seems more coincidental > than intentional. > > Practically speaking, this only affects A/D bits. Wouldn't a VMM need to flush > the EP4TA if it toggled A/D enabling in order to have deterministic behavior? > In other words, is there a real world use case for switching between EPTPs with > same EP4TAs but different properties that would see a performance hit if KVM > purged unusable cached roots with the same EP4TA? Probably not, but the complexity wouldn't be much different. Paolo