All of lore.kernel.org
 help / color / mirror / Atom feed
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: Michel Thierry <michel.thierry@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v6 18/20] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout
Date: Wed, 19 Apr 2017 10:07:34 -0700	[thread overview]
Message-ID: <8a07a45f-a9db-ce52-062d-8e7e90d60cd5@intel.com> (raw)
In-Reply-To: <20170418202335.35232-19-michel.thierry@intel.com>



On 18/04/17 13:23, Michel Thierry wrote:
> Final enablement patch for GPU hang detection using watchdog timeout.
> Using the gem_context_setparam ioctl, users can specify the desired
> timeout value in microseconds, and the driver will do the conversion to
> 'timestamps'.
>
> The recommended default watchdog threshold for video engines is 60000 us,
> since this has been _empirically determined_ to be a good compromise for
> low-latency requirements and low rate of false positives. The default
> register value is ~106000us and the theoretical max value (all 1s) is
> 353 seconds.
>
> Note, UABI engine ids and i915 engine ids are different, and this patch
> uses the i915 ones. Some kind of mapping table [1] is required if we
> decide to use the UABI engine ids.
>
> [1] http://patchwork.freedesktop.org/patch/msgid/20170329135831.30254-2-chris@chris-wilson.co.uk

Now that we have class and instance definitions, could it be worth to 
use those instead to index the engines? If we pair it with the engine 
discovery ioctl that Tvrtko proposed we could have something that is 
reasonably future-proof.

Thanks,
Daniele
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2017-04-19 17:07 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-18 20:23 [PATCH v6 00/20] Gen8+ engine-reset Michel Thierry
2017-04-18 20:23 ` [PATCH v6 01/20] drm/i915: Fix stale comment about I915_RESET_IN_PROGRESS flag Michel Thierry
2017-04-18 20:23 ` [PATCH v6 02/20] drm/i915: Rename gen8_(un)request_engine_reset to gen8_reset_engine_start/cancel Michel Thierry
2017-04-27  8:13   ` Chris Wilson
2017-04-18 20:23 ` [PATCH v6 03/20] drm/i915: Update i915.reset to handle engine resets Michel Thierry
2017-04-18 20:23 ` [PATCH v6 04/20] drm/i915/tdr: Modify error handler for per engine hang recovery Michel Thierry
2017-04-18 21:40   ` Chris Wilson
2017-04-18 22:01     ` Michel Thierry
2017-04-18 23:13       ` Chris Wilson
2017-04-18 20:23 ` [PATCH v6 05/20] drm/i915/tdr: Add support for per engine reset recovery Michel Thierry
2017-04-19 10:49   ` Chris Wilson
2017-04-19 13:49     ` Chris Wilson
2017-04-21  0:17     ` Michel Thierry
2017-04-24 21:22       ` Michel Thierry
2017-04-25  9:42         ` Chris Wilson
2017-04-18 20:23 ` [PATCH v6 06/20] drm/i915: Skip reset request if there is one already Michel Thierry
2017-04-18 20:23 ` [PATCH v6 07/20] drm/i915/tdr: Add engine reset count to error state Michel Thierry
2017-04-18 20:23 ` [PATCH v6 08/20] drm/i915/tdr: Export per-engine reset count info to debugfs Michel Thierry
2017-04-18 20:23 ` [PATCH v6 09/20] drm/i915/tdr: Enable Engine reset and recovery support Michel Thierry
2017-04-18 20:23 ` [PATCH v6 10/20] drm/i915: Add engine reset count in get-reset-stats ioctl Michel Thierry
2017-04-18 20:23 ` [PATCH v6 11/20] drm/i915/selftests: reset engine self tests Michel Thierry
2017-04-18 20:23 ` [PATCH v6 12/20] drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder Michel Thierry
2017-04-18 20:23 ` [PATCH v6 13/20] drm/i915/guc: Provide register list to be saved/restored during engine reset Michel Thierry
2017-04-19  0:26   ` Daniele Ceraolo Spurio
2017-04-19  0:44     ` Michel Thierry
2017-04-18 20:23 ` [PATCH v6 14/20] drm/i915/guc: Add support for reset engine using GuC commands Michel Thierry
2017-04-19 10:27   ` Chris Wilson
2017-04-19 23:22     ` Michel Thierry
2017-04-20  9:05       ` Chris Wilson
2017-04-18 20:23 ` [PATCH v6 15/20] drm/i915: Watchdog timeout: Pass GuC shared data structure during param load Michel Thierry
2017-04-18 21:18   ` Daniele Ceraolo Spurio
2017-04-18 20:23 ` [PATCH v6 16/20] drm/i915: Watchdog timeout: IRQ handler for gen8+ Michel Thierry
2017-04-19 10:20   ` Chris Wilson
2017-04-19 17:11     ` Michel Thierry
2017-04-19 17:51       ` Chris Wilson
2017-04-19 18:13         ` Michel Thierry
2017-04-18 20:23 ` [PATCH v6 17/20] drm/i915: Watchdog timeout: Ringbuffer command emission " Michel Thierry
2017-04-18 21:20   ` Chris Wilson
2017-04-18 21:36     ` Michel Thierry
2017-04-18 23:06       ` Chris Wilson
2017-04-18 23:11         ` Michel Thierry
2017-04-18 20:23 ` [PATCH v6 18/20] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout Michel Thierry
2017-04-19 16:56   ` Jeff McGee
2017-04-19 17:07   ` Daniele Ceraolo Spurio [this message]
2017-04-20  1:09   ` Michel Thierry
2017-04-20  8:52     ` Chris Wilson
2017-04-20 17:19       ` Michel Thierry
2017-04-18 20:23 ` [PATCH v6 19/20] drm/i915: Watchdog timeout: Include threshold value in error state Michel Thierry
2017-04-18 20:23 ` [PATCH v6 20/20] drm/i915: Watchdog timeout: Export media reset count from GuC to debugfs Michel Thierry
2017-04-18 20:44 ` ✓ Fi.CI.BAT: success for Gen8+ engine-reset (rev2) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8a07a45f-a9db-ce52-062d-8e7e90d60cd5@intel.com \
    --to=daniele.ceraolospurio@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=michel.thierry@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.