From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Goldschmidt Date: Mon, 10 Sep 2018 20:06:55 +0200 Subject: [U-Boot] [PATCH 0/3] add optional hex output of u-boot-spl In-Reply-To: <20180910172849.16420-1-dwesterg@gmail.com> References: <20180910172849.16420-1-dwesterg@gmail.com> Message-ID: <8a6239fb-1f8f-5980-2499-9e32e5c37776@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On 10.09.2018 19:28, Dalon Westergreen wrote: > This patch set adds a possible hex output of the > u-boot-spl elf and enables said output for the > Intel Stratix10 device. Stratix10 requires a hex > output of the elf for creating the secure device manager > configuration bitstream. I don't use Stratix10 but Cyclone5, but as I need a .hex to boot from FPGA, I want to know how to solve this best. So to understand this, again a question: is this the only way to boot Stratix10? Or one of the possible boot methods? Because reading "Intel® Stratix® 10 SoC FPGA Boot User Guide", it seems like you would need the hex for "FPGA Configuration First Mode", but not for "HPS Boot First Mode"? If so, it would make Stratix10 and Cyclone5 more alike and a configuration option (like "Boot from FPGA") could be used to control CONFIG_OF_EMBED and enable creating the hex file for SPL. I *am* working on fixing the "boot from FPGA" case for Cyclone5, so I'd appreaciate it if we could share as much as possible between those sub-architectures. Simon > > Dalon Westergreen (3): > common: add spl/u-boot-spl.hex target > arm: socfpga: stratix10: add CONFIG_SPL_TARGET > arm; socfpga: stratix10: Add CONFIG_OF_EMBED > > Makefile | 5 +++++ > configs/socfpga_stratix10_defconfig | 1 + > include/configs/socfpga_stratix10_socdk.h | 3 ++- > 3 files changed, 8 insertions(+), 1 deletion(-) >