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From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: Jason Wang <jasowang@redhat.com>,
	Laurent Vivier <laurent@vivier.eu>,
	Finn Thain <fthain@linux-m68k.org>
Subject: Re: [RFC PATCH 4/6] dp8393x: Store CAM registers as 16-bit
Date: Sun, 4 Jul 2021 15:48:00 +0100	[thread overview]
Message-ID: <8d330b3b-cdae-1325-2bf0-b370705949e8@ilande.co.uk> (raw)
In-Reply-To: <20210703141947.352295-5-f4bug@amsat.org>

On 03/07/2021 15:19, Philippe Mathieu-Daudé wrote:

> Per the DP83932C datasheet from July 1995:
> 
>    4.0 SONIC Registers
>    4.1 THE CAM UNIT
> 
>      The Content Addressable Memory (CAM) consists of sixteen
>      48-bit entries for complete address filtering of network
>      packets. Each entry corresponds to a 48-bit destination
>      address that is user programmable and can contain any
>      combination of Multicast or Physical addresses. Each entry
>      is partitioned into three 16-bit CAM cells accessible
>      through CAM Address Ports (CAP 2, CAP 1 and CAP 0) with
>      CAP0 corresponding to the least significant 16 bits of
>      the Destination Address and CAP2 corresponding to the
>      most significant bits.
> 
> Store the CAM registers as 16-bit as it simplifies the code.
> There is no change in the migration stream.
> 
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
>   hw/net/dp8393x.c | 23 ++++++++++-------------
>   1 file changed, 10 insertions(+), 13 deletions(-)
> 
> diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
> index c9b478c127c..e0055b178b1 100644
> --- a/hw/net/dp8393x.c
> +++ b/hw/net/dp8393x.c
> @@ -157,7 +157,7 @@ struct dp8393xState {
>       MemoryRegion mmio;
>   
>       /* Registers */
> -    uint8_t cam[16][6];
> +    uint16_t cam[16][3];
>       uint16_t regs[0x40];
>   
>       /* Temporaries */
> @@ -280,15 +280,13 @@ static void dp8393x_do_load_cam(dp8393xState *s)
>           address_space_read(&s->as, dp8393x_cdp(s),
>                              MEMTXATTRS_UNSPECIFIED, s->data, size);
>           index = dp8393x_get(s, width, 0) & 0xf;
> -        s->cam[index][0] = dp8393x_get(s, width, 1) & 0xff;
> -        s->cam[index][1] = dp8393x_get(s, width, 1) >> 8;
> -        s->cam[index][2] = dp8393x_get(s, width, 2) & 0xff;
> -        s->cam[index][3] = dp8393x_get(s, width, 2) >> 8;
> -        s->cam[index][4] = dp8393x_get(s, width, 3) & 0xff;
> -        s->cam[index][5] = dp8393x_get(s, width, 3) >> 8;
> -        trace_dp8393x_load_cam(index, s->cam[index][0], s->cam[index][1],
> -                               s->cam[index][2], s->cam[index][3],
> -                               s->cam[index][4], s->cam[index][5]);
> +        s->cam[index][0] = dp8393x_get(s, width, 1);
> +        s->cam[index][1] = dp8393x_get(s, width, 2);
> +        s->cam[index][2] = dp8393x_get(s, width, 3);
> +        trace_dp8393x_load_cam(index,
> +                               s->cam[index][0] >> 8, s->cam[index][0] & 0xff,
> +                               s->cam[index][1] >> 8, s->cam[index][1] & 0xff,
> +                               s->cam[index][2] >> 8, s->cam[index][2] & 0xff);
>           /* Move to next entry */
>           s->regs[SONIC_CDC]--;
>           s->regs[SONIC_CDP] += size;
> @@ -591,8 +589,7 @@ static uint64_t dp8393x_read(void *opaque, hwaddr addr, unsigned int size)
>       case SONIC_CAP1:
>       case SONIC_CAP0:
>           if (s->regs[SONIC_CR] & SONIC_CR_RST) {
> -            val = s->cam[s->regs[SONIC_CEP] & 0xf][2 * (SONIC_CAP0 - reg) + 1] << 8;
> -            val |= s->cam[s->regs[SONIC_CEP] & 0xf][2 * (SONIC_CAP0 - reg)];
> +            val = s->cam[s->regs[SONIC_CEP] & 0xf][2 * (SONIC_CAP0 - reg)];
>           }
>           break;
>       /* All other registers have no special contraints */
> @@ -987,7 +984,7 @@ static const VMStateDescription vmstate_dp8393x = {
>       .version_id = 0,
>       .minimum_version_id = 0,
>       .fields = (VMStateField []) {
> -        VMSTATE_BUFFER_UNSAFE(cam, dp8393xState, 0, 16 * 6),
> +        VMSTATE_BUFFER_UNSAFE(cam, dp8393xState, 0, 16 * 3 * 2),
>           VMSTATE_UINT16_ARRAY(regs, dp8393xState, 0x40),
>           VMSTATE_END_OF_LIST()
>       }

I'd still be inclined to change VMSTATE_BUFFER_UNSAFE for VMSTATE_UINT16_ARRAY whilst 
you can do it without having to worry about the migration stream being already 
broken, but anyhow:

Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


ATB,

Mark.


  parent reply	other threads:[~2021-07-04 14:49 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-03 14:19 [RFC PATCH 0/6] dp8393x: Housekeeping Philippe Mathieu-Daudé
2021-07-03 14:19 ` [PATCH 1/6] dp8393x: fix CAM descriptor entry index Philippe Mathieu-Daudé
2021-07-03 14:19 ` [PATCH 2/6] dp8393x: don't force 32-bit register access Philippe Mathieu-Daudé
2021-07-03 14:39   ` Mark Cave-Ayland
2021-07-03 16:29     ` Philippe Mathieu-Daudé
2021-07-04 15:34       ` Mark Cave-Ayland
2021-07-04  2:06   ` Finn Thain
2021-07-03 14:19 ` [RFC PATCH 3/6] dp8393x: Restrict bus access to 16/32-bit operations Philippe Mathieu-Daudé
2021-07-03 14:52   ` Mark Cave-Ayland
2021-07-04 14:45   ` Mark Cave-Ayland
2021-07-03 14:19 ` [RFC PATCH 4/6] dp8393x: Store CAM registers as 16-bit Philippe Mathieu-Daudé
2021-07-03 14:56   ` Mark Cave-Ayland
2021-07-04 14:48   ` Mark Cave-Ayland [this message]
2021-07-06 17:29     ` Philippe Mathieu-Daudé
2021-07-06 19:27       ` Mark Cave-Ayland
2021-07-03 14:19 ` [PATCH 5/6] dp8393x: Replace address_space_rw(is_write=1) by address_space_write() Philippe Mathieu-Daudé
2021-07-03 14:57   ` Mark Cave-Ayland
2021-07-04 14:49   ` Mark Cave-Ayland
2021-07-03 14:19 ` [RFC PATCH 6/6] dp8393x: Rewrite dp8393x_get() / dp8393x_put() Philippe Mathieu-Daudé
2021-07-03 15:00   ` Mark Cave-Ayland
2021-07-03 15:04     ` Philippe Mathieu-Daudé
2021-07-04  1:46   ` Finn Thain
2021-07-04 15:07   ` Mark Cave-Ayland
2021-07-05  1:36     ` Finn Thain
2021-07-05  6:34       ` Mark Cave-Ayland
2021-07-07  1:30         ` Finn Thain
2021-07-07 10:12           ` Mark Cave-Ayland
2021-07-09  9:13             ` Finn Thain

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