* [PATCH] target/ppc: fix xxspltw for big endian hosts
@ 2022-03-10 17:20 matheus.ferst
2022-03-11 1:04 ` Richard Henderson
2022-03-14 15:21 ` Cédric Le Goater
0 siblings, 2 replies; 3+ messages in thread
From: matheus.ferst @ 2022-03-10 17:20 UTC (permalink / raw)
To: qemu-devel, qemu-ppc
Cc: danielhb413, richard.henderson, groug, clg, Matheus Ferst, david
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Fix a typo in the host endianness macro and add a simple test to detect
regressions.
Fixes: 9bb0048ec6f8 ("target/ppc: convert xxspltw to vector operations")
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/translate/vsx-impl.c.inc | 2 +-
tests/tcg/ppc64/Makefile.target | 1 +
tests/tcg/ppc64le/Makefile.target | 1 +
tests/tcg/ppc64le/xxspltw.c | 46 +++++++++++++++++++++++++++++
4 files changed, 49 insertions(+), 1 deletion(-)
create mode 100644 tests/tcg/ppc64le/xxspltw.c
diff --git a/target/ppc/translate/vsx-impl.c.inc b/target/ppc/translate/vsx-impl.c.inc
index 48a97b2d7e..e67fbf2bb8 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -1552,7 +1552,7 @@ static bool trans_XXSPLTW(DisasContext *ctx, arg_XX2_uim2 *a)
tofs = vsr_full_offset(a->xt);
bofs = vsr_full_offset(a->xb);
bofs += a->uim << MO_32;
-#ifndef HOST_WORDS_BIG_ENDIAN
+#ifndef HOST_WORDS_BIGENDIAN
bofs ^= 8 | 4;
#endif
diff --git a/tests/tcg/ppc64/Makefile.target b/tests/tcg/ppc64/Makefile.target
index c9498053df..8197c288a7 100644
--- a/tests/tcg/ppc64/Makefile.target
+++ b/tests/tcg/ppc64/Makefile.target
@@ -27,5 +27,6 @@ run-sha512-vector: QEMU_OPTS+=-cpu POWER10
run-plugin-sha512-vector-with-%: QEMU_OPTS+=-cpu POWER10
PPC64_TESTS += signal_save_restore_xer
+PPC64_TESTS += xxspltw
TESTS += $(PPC64_TESTS)
diff --git a/tests/tcg/ppc64le/Makefile.target b/tests/tcg/ppc64le/Makefile.target
index 12d85e946b..9624bb1e9c 100644
--- a/tests/tcg/ppc64le/Makefile.target
+++ b/tests/tcg/ppc64le/Makefile.target
@@ -25,5 +25,6 @@ run-plugin-sha512-vector-with-%: QEMU_OPTS+=-cpu POWER10
PPC64LE_TESTS += mtfsf
PPC64LE_TESTS += signal_save_restore_xer
+PPC64LE_TESTS += xxspltw
TESTS += $(PPC64LE_TESTS)
diff --git a/tests/tcg/ppc64le/xxspltw.c b/tests/tcg/ppc64le/xxspltw.c
new file mode 100644
index 0000000000..def7321f14
--- /dev/null
+++ b/tests/tcg/ppc64le/xxspltw.c
@@ -0,0 +1,46 @@
+#include <stdio.h>
+#include <stdint.h>
+#include <inttypes.h>
+#include <assert.h>
+
+#define WORD_A 0xAAAAAAAAUL
+#define WORD_B 0xBBBBBBBBUL
+#define WORD_C 0xCCCCCCCCUL
+#define WORD_D 0xDDDDDDDDUL
+
+#define DWORD_HI (WORD_A << 32 | WORD_B)
+#define DWORD_LO (WORD_C << 32 | WORD_D)
+
+#define TEST(HI, LO, UIM, RES) \
+ do { \
+ union { \
+ uint64_t u; \
+ double f; \
+ } h = { .u = HI }, l = { .u = LO }; \
+ /* \
+ * Use a pair of FPRs to load the VSR avoiding insns \
+ * newer than xxswapd. \
+ */ \
+ asm("xxmrghd 32, %0, %1\n\t" \
+ "xxspltw 32, 32, %2\n\t" \
+ "xxmrghd %0, 32, %0\n\t" \
+ "xxswapd 32, 32\n\t" \
+ "xxmrghd %1, 32, %1\n\t" \
+ : "+f" (h.f), "+f" (l.f) \
+ : "i" (UIM) \
+ : "v0"); \
+ printf("xxspltw(0x%016" PRIx64 "%016" PRIx64 ", %d) =" \
+ " %016" PRIx64 "%016" PRIx64 "\n", HI, LO, UIM, \
+ h.u, l.u); \
+ assert(h.u == (RES)); \
+ assert(l.u == (RES)); \
+ } while (0)
+
+int main(void)
+{
+ TEST(DWORD_HI, DWORD_LO, 0, WORD_A << 32 | WORD_A);
+ TEST(DWORD_HI, DWORD_LO, 1, WORD_B << 32 | WORD_B);
+ TEST(DWORD_HI, DWORD_LO, 2, WORD_C << 32 | WORD_C);
+ TEST(DWORD_HI, DWORD_LO, 3, WORD_D << 32 | WORD_D);
+ return 0;
+}
--
2.25.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] target/ppc: fix xxspltw for big endian hosts
2022-03-10 17:20 [PATCH] target/ppc: fix xxspltw for big endian hosts matheus.ferst
@ 2022-03-11 1:04 ` Richard Henderson
2022-03-14 15:21 ` Cédric Le Goater
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2022-03-11 1:04 UTC (permalink / raw)
To: matheus.ferst, qemu-devel, qemu-ppc; +Cc: groug, danielhb413, clg, david
On 3/10/22 09:20, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst<matheus.ferst@eldorado.org.br>
>
> Fix a typo in the host endianness macro and add a simple test to detect
> regressions.
>
> Fixes: 9bb0048ec6f8 ("target/ppc: convert xxspltw to vector operations")
> Signed-off-by: Matheus Ferst<matheus.ferst@eldorado.org.br>
> ---
> target/ppc/translate/vsx-impl.c.inc | 2 +-
> tests/tcg/ppc64/Makefile.target | 1 +
> tests/tcg/ppc64le/Makefile.target | 1 +
> tests/tcg/ppc64le/xxspltw.c | 46 +++++++++++++++++++++++++++++
> 4 files changed, 49 insertions(+), 1 deletion(-)
> create mode 100644 tests/tcg/ppc64le/xxspltw.c
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] target/ppc: fix xxspltw for big endian hosts
2022-03-10 17:20 [PATCH] target/ppc: fix xxspltw for big endian hosts matheus.ferst
2022-03-11 1:04 ` Richard Henderson
@ 2022-03-14 15:21 ` Cédric Le Goater
1 sibling, 0 replies; 3+ messages in thread
From: Cédric Le Goater @ 2022-03-14 15:21 UTC (permalink / raw)
To: matheus.ferst, qemu-devel, qemu-ppc
Cc: danielhb413, richard.henderson, groug, david
On 3/10/22 18:20, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
>
> Fix a typo in the host endianness macro and add a simple test to detect
> regressions.
>
> Fixes: 9bb0048ec6f8 ("target/ppc: convert xxspltw to vector operations")
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
> ---
> target/ppc/translate/vsx-impl.c.inc | 2 +-
> tests/tcg/ppc64/Makefile.target | 1 +
> tests/tcg/ppc64le/Makefile.target | 1 +
> tests/tcg/ppc64le/xxspltw.c | 46 +++++++++++++++++++++++++++++
> 4 files changed, 49 insertions(+), 1 deletion(-)
> create mode 100644 tests/tcg/ppc64le/xxspltw.c
>
Queued for 7.0
Thanks,
C.
^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-03-10 17:20 [PATCH] target/ppc: fix xxspltw for big endian hosts matheus.ferst
2022-03-11 1:04 ` Richard Henderson
2022-03-14 15:21 ` Cédric Le Goater
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