From mboxrd@z Thu Jan 1 00:00:00 1970 From: Michal Simek Date: Wed, 27 Mar 2019 16:10:12 +0100 Subject: [U-Boot] [RFC v2 1/2] zynqmp: add minimal include files to build a pm_cfg_obj.c In-Reply-To: <20190321154857.29892-2-luca@lucaceresoli.net> References: <20190321154857.29892-1-luca@lucaceresoli.net> <20190321154857.29892-2-luca@lucaceresoli.net> Message-ID: <8e59d6d9-7cec-2921-0518-ba26c57d26f8@xilinx.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 21. 03. 19 16:48, Luca Ceresoli wrote: > A following commit will allow U-Boot to pass a configuration object to > the ZynqMP PMU firmware. This configuration object is generated by > Xilinx tools in the form of a C file (pm_cfg_obj.c), which #includes a > few headers with constants definitions. > > In order to allow pm_cfg_obj.c to build, include in U-Boot a minimal > version of those headers files: > > - pm_defs: a copy of [0], reduced to remove unneeded values > - pmu_global.h: empty file, it is included but not really needed > - xil_types.h: just includes common.h which has all the needed types > > [0] https://github.com/Xilinx/embeddedsw/blob/xilinx-v2018.3/lib/sw_services/xilpm/src/common/pm_defs.h > > Signed-off-by: Luca Ceresoli > --- > board/xilinx/zynqmp/pm_defs.h | 254 +++++++++++++++++++++++++++++++ > board/xilinx/zynqmp/pmu_global.h | 0 > board/xilinx/zynqmp/xil_types.h | 1 + > 3 files changed, 255 insertions(+) > create mode 100644 board/xilinx/zynqmp/pm_defs.h > create mode 100644 board/xilinx/zynqmp/pmu_global.h > create mode 100644 board/xilinx/zynqmp/xil_types.h > > diff --git a/board/xilinx/zynqmp/pm_defs.h b/board/xilinx/zynqmp/pm_defs.h > new file mode 100644 > index 000000000000..a339d5ef4fd1 > --- /dev/null > +++ b/board/xilinx/zynqmp/pm_defs.h > @@ -0,0 +1,254 @@ > +/****************************************************************************** > +* > +* Copyright (C) 2015-2018 Xilinx, Inc. All rights reserved. > +* > +* Permission is hereby granted, free of charge, to any person obtaining a copy > +* of this software and associated documentation files (the "Software"), to deal > +* in the Software without restriction, including without limitation the rights > +* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell > +* copies of the Software, and to permit persons to whom the Software is > +* furnished to do so, subject to the following conditions: > +* > +* The above copyright notice and this permission notice shall be included in > +* all copies or substantial portions of the Software. > +* > +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > +* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, > +* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF > +* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE > +* SOFTWARE. > +* > +* Except as contained in this notice, the name of the Xilinx shall not be used > +* in advertising or otherwise to promote the sale, use or other dealings in > +* this Software without prior written authorization from Xilinx. > +* > +******************************************************************************/ > + > +/*****************************************************************************/ > +/** > + * @file pm_defs.h > + * > + * PM Definitions implementation > + * @addtogroup xpm_apis XilPM APIs > + * @{ > + *****************************************************************************/ > + > +#ifndef PM_DEFS_H_ > +#define PM_DEFS_H_ > + > +/** @name Capabilities for RAM > + * > + * @{ > + */ > +#define PM_CAP_ACCESS 0x1U > +#define PM_CAP_CONTEXT 0x2U > +#define PM_CAP_WAKEUP 0x4U > +/**@}*/ > + > +/** > + * PM Node ID Enum > + */ > +enum XPmNodeId { > + NODE_UNKNOWN, > + NODE_APU, > + NODE_APU_0, > + NODE_APU_1, > + NODE_APU_2, > + NODE_APU_3, > + NODE_RPU, > + NODE_RPU_0, > + NODE_RPU_1, > + NODE_PLD, > + NODE_FPD, > + NODE_OCM_BANK_0, > + NODE_OCM_BANK_1, > + NODE_OCM_BANK_2, > + NODE_OCM_BANK_3, > + NODE_TCM_0_A, > + NODE_TCM_0_B, > + NODE_TCM_1_A, > + NODE_TCM_1_B, > + NODE_L2, > + NODE_GPU_PP_0, > + NODE_GPU_PP_1, > + NODE_USB_0, > + NODE_USB_1, > + NODE_TTC_0, > + NODE_TTC_1, > + NODE_TTC_2, > + NODE_TTC_3, > + NODE_SATA, > + NODE_ETH_0, > + NODE_ETH_1, > + NODE_ETH_2, > + NODE_ETH_3, > + NODE_UART_0, > + NODE_UART_1, > + NODE_SPI_0, > + NODE_SPI_1, > + NODE_I2C_0, > + NODE_I2C_1, > + NODE_SD_0, > + NODE_SD_1, > + NODE_DP, > + NODE_GDMA, > + NODE_ADMA, > + NODE_NAND, > + NODE_QSPI, > + NODE_GPIO, > + NODE_CAN_0, > + NODE_CAN_1, > + NODE_EXTERN, > + NODE_APLL, > + NODE_VPLL, > + NODE_DPLL, > + NODE_RPLL, > + NODE_IOPLL, > + NODE_DDR, > + NODE_IPI_APU, > + NODE_IPI_RPU_0, > + NODE_GPU, > + NODE_PCIE, > + NODE_PCAP, > + NODE_RTC, > + NODE_LPD, > + NODE_VCU, > + NODE_IPI_RPU_1, > + NODE_IPI_PL_0, > + NODE_IPI_PL_1, > + NODE_IPI_PL_2, > + NODE_IPI_PL_3, > + NODE_PL, > + NODE_ID_MAX > +}; > + > +/** > + * PM Reset Line IDs > + */ > +enum XPmReset { > + XILPM_RESET_PCIE_CFG = 1000, > + XILPM_RESET_PCIE_BRIDGE, > + XILPM_RESET_PCIE_CTRL, > + XILPM_RESET_DP, > + XILPM_RESET_SWDT_CRF, > + XILPM_RESET_AFI_FM5, > + XILPM_RESET_AFI_FM4, > + XILPM_RESET_AFI_FM3, > + XILPM_RESET_AFI_FM2, > + XILPM_RESET_AFI_FM1, > + XILPM_RESET_AFI_FM0, > + XILPM_RESET_GDMA, > + XILPM_RESET_GPU_PP1, > + XILPM_RESET_GPU_PP0, > + XILPM_RESET_GPU, > + XILPM_RESET_GT, > + XILPM_RESET_SATA, > + XILPM_RESET_ACPU3_PWRON, > + XILPM_RESET_ACPU2_PWRON, > + XILPM_RESET_ACPU1_PWRON, > + XILPM_RESET_ACPU0_PWRON, > + XILPM_RESET_APU_L2, > + XILPM_RESET_ACPU3, > + XILPM_RESET_ACPU2, > + XILPM_RESET_ACPU1, > + XILPM_RESET_ACPU0, > + XILPM_RESET_DDR, > + XILPM_RESET_APM_FPD, > + XILPM_RESET_SOFT, > + XILPM_RESET_GEM0, > + XILPM_RESET_GEM1, > + XILPM_RESET_GEM2, > + XILPM_RESET_GEM3, > + XILPM_RESET_QSPI, > + XILPM_RESET_UART0, > + XILPM_RESET_UART1, > + XILPM_RESET_SPI0, > + XILPM_RESET_SPI1, > + XILPM_RESET_SDIO0, > + XILPM_RESET_SDIO1, > + XILPM_RESET_CAN0, > + XILPM_RESET_CAN1, > + XILPM_RESET_I2C0, > + XILPM_RESET_I2C1, > + XILPM_RESET_TTC0, > + XILPM_RESET_TTC1, > + XILPM_RESET_TTC2, > + XILPM_RESET_TTC3, > + XILPM_RESET_SWDT_CRL, > + XILPM_RESET_NAND, > + XILPM_RESET_ADMA, > + XILPM_RESET_GPIO, > + XILPM_RESET_IOU_CC, > + XILPM_RESET_TIMESTAMP, > + XILPM_RESET_RPU_R50, > + XILPM_RESET_RPU_R51, > + XILPM_RESET_RPU_AMBA, > + XILPM_RESET_OCM, > + XILPM_RESET_RPU_PGE, > + XILPM_RESET_USB0_CORERESET, > + XILPM_RESET_USB1_CORERESET, > + XILPM_RESET_USB0_HIBERRESET, > + XILPM_RESET_USB1_HIBERRESET, > + XILPM_RESET_USB0_APB, > + XILPM_RESET_USB1_APB, > + XILPM_RESET_IPI, > + XILPM_RESET_APM_LPD, > + XILPM_RESET_RTC, > + XILPM_RESET_SYSMON, > + XILPM_RESET_AFI_FM6, > + XILPM_RESET_LPD_SWDT, > + XILPM_RESET_FPD, > + XILPM_RESET_RPU_DBG1, > + XILPM_RESET_RPU_DBG0, > + XILPM_RESET_DBG_LPD, > + XILPM_RESET_DBG_FPD, > + XILPM_RESET_APLL, > + XILPM_RESET_DPLL, > + XILPM_RESET_VPLL, > + XILPM_RESET_IOPLL, > + XILPM_RESET_RPLL, > + XILPM_RESET_GPO3_PL_0, > + XILPM_RESET_GPO3_PL_1, > + XILPM_RESET_GPO3_PL_2, > + XILPM_RESET_GPO3_PL_3, > + XILPM_RESET_GPO3_PL_4, > + XILPM_RESET_GPO3_PL_5, > + XILPM_RESET_GPO3_PL_6, > + XILPM_RESET_GPO3_PL_7, > + XILPM_RESET_GPO3_PL_8, > + XILPM_RESET_GPO3_PL_9, > + XILPM_RESET_GPO3_PL_10, > + XILPM_RESET_GPO3_PL_11, > + XILPM_RESET_GPO3_PL_12, > + XILPM_RESET_GPO3_PL_13, > + XILPM_RESET_GPO3_PL_14, > + XILPM_RESET_GPO3_PL_15, > + XILPM_RESET_GPO3_PL_16, > + XILPM_RESET_GPO3_PL_17, > + XILPM_RESET_GPO3_PL_18, > + XILPM_RESET_GPO3_PL_19, > + XILPM_RESET_GPO3_PL_20, > + XILPM_RESET_GPO3_PL_21, > + XILPM_RESET_GPO3_PL_22, > + XILPM_RESET_GPO3_PL_23, > + XILPM_RESET_GPO3_PL_24, > + XILPM_RESET_GPO3_PL_25, > + XILPM_RESET_GPO3_PL_26, > + XILPM_RESET_GPO3_PL_27, > + XILPM_RESET_GPO3_PL_28, > + XILPM_RESET_GPO3_PL_29, > + XILPM_RESET_GPO3_PL_30, > + XILPM_RESET_GPO3_PL_31, > + XILPM_RESET_RPU_LS, > + XILPM_RESET_PS_ONLY, > + XILPM_RESET_PL, > + XILPM_RESET_GPIO5_EMIO_92, > + XILPM_RESET_GPIO5_EMIO_93, > + XILPM_RESET_GPIO5_EMIO_94, > + XILPM_RESET_GPIO5_EMIO_95, > +}; > + > + /** @} */ > +#endif /* PM_DEFS_H_ */ > diff --git a/board/xilinx/zynqmp/pmu_global.h b/board/xilinx/zynqmp/pmu_global.h > new file mode 100644 > index 000000000000..e69de29bb2d1 > diff --git a/board/xilinx/zynqmp/xil_types.h b/board/xilinx/zynqmp/xil_types.h > new file mode 100644 > index 000000000000..65e11030d85e > --- /dev/null > +++ b/board/xilinx/zynqmp/xil_types.h > @@ -0,0 +1 @@ > +#include > I found one version of this file with GPL license. But even that I think this should be taken as blob and compiled/generated out of u-boot source code. Still pm_cfg_obj.c has no GPL license in it. Thanks, Michal