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[173.173.107.246]) by smtp.gmail.com with ESMTPSA id o101sm629128ota.61.2021.07.27.10.44.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Jul 2021 10:44:22 -0700 (PDT) Subject: Re: [Patch v4 0/6] Introduce LMh driver for Qualcomm SoCs To: Thara Gopinath , agross@kernel.org, bjorn.andersson@linaro.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, viresh.kumar@linaro.org, rjw@rjwysocki.net, robh+dt@kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20210727152512.1098329-1-thara.gopinath@linaro.org> From: Steev Klimaszewski Message-ID: <8ec8b5ff-3625-ad9b-d438-4bc37beb09e5@kali.org> Date: Tue, 27 Jul 2021 12:44:20 -0500 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.12.0 MIME-Version: 1.0 In-Reply-To: <20210727152512.1098329-1-thara.gopinath@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On 7/27/21 10:25 AM, Thara Gopinath wrote: > Limits Management Hardware(LMh) is a hardware infrastructure on some > Qualcomm SoCs that can enforce temperature and current limits as programmed > by software for certain IPs like CPU. On many newer SoCs LMh is configured > by firmware/TZ and no programming is needed from the kernel side. But on > certain SoCs like sdm845 the firmware does not do a complete programming of > the h/w block. On such SoCs kernel software has to explicitly set up the > temperature limits and turn on various monitoring and enforcing algorithms > on the hardware. > > Introduce support for enabling and programming various limit settings and > monitoring capabilities of Limits Management Hardware(LMh) associated with > cpu clusters. Also introduce support in cpufreq hardware driver to monitor > the interrupt associated with cpu frequency throttling so that this > information can be conveyed to the schdeuler via thermal pressure > interface. > > With this patch series following cpu performance improvement(30-70%) is > observed on sdm845. The reasoning here is that without LMh being programmed > properly from the kernel, the default settings were enabling thermal > mitigation for CPUs at too low a temperature (around 70-75 degree C). This > in turn meant that many a time CPUs were never actually allowed to hit the > maximum possible/required frequencies. > > UnixBench whets and dhry (./Run whets dhry) > System Benchmarks Index Score > > Without LMh Support With LMh Support > 1 copy test 1353.7 1773.2 > > 8 copy tests 4473.6 7402.3 > > Sysbench cpu > sysbench cpu --threads=8 --time=60 --cpu-max-prime=100000 run > > Without LMh Support With LMh Support > Events per > second 355 614 > > Avg Latency(ms) 21.84 13.02 > > v3->v4: > - Rebased to v5.14-rc2. > > v2->v3: > - Included patch adding dt binding documentation for LMh nodes. > - Rebased to v5.13 > > Thara Gopinath (6): > firmware: qcom_scm: Introduce SCM calls to access LMh > thermal: qcom: Add support for LMh driver > cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support > arm64: dts: qcom: sdm45: Add support for LMh node > arm64: dts: qcom: sdm845: Remove cpufreq cooling devices for CPU > thermal zones > dt-bindings: thermal: Add dt binding for QCOM LMh > > .../devicetree/bindings/thermal/qcom-lmh.yaml | 100 ++++++++ > arch/arm64/boot/dts/qcom/sdm845.dtsi | 162 ++---------- > drivers/cpufreq/qcom-cpufreq-hw.c | 142 +++++++++++ > drivers/firmware/qcom_scm.c | 58 +++++ > drivers/firmware/qcom_scm.h | 4 + > drivers/thermal/qcom/Kconfig | 10 + > drivers/thermal/qcom/Makefile | 1 + > drivers/thermal/qcom/lmh.c | 232 ++++++++++++++++++ > include/linux/qcom_scm.h | 14 ++ > 9 files changed, 587 insertions(+), 136 deletions(-) > create mode 100644 Documentation/devicetree/bindings/thermal/qcom-lmh.yaml > create mode 100644 drivers/thermal/qcom/lmh.c > Tested-by: Steev Klimaszewski