Re: [PATCH v2 2/3] PCI/PTM: Implement pci_enable_ptm() for Root Ports, Switch Upstream Ports

From: Sathyanarayanan Kuppuswamy  <sathyanarayanan.kuppuswamy@linux.intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>,
	Kai-Heng Feng <kai.heng.feng@canonical.com>,
	Rajvi Jingar <rajvi.jingar@linux.intel.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>
Cc: Koba Ko <koba.ko@canonical.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	"David E . Box" <david.e.box@linux.intel.com>,
	linux-pci@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>
Subject: Re: [PATCH v2 2/3] PCI/PTM: Implement pci_enable_ptm() for Root Ports, Switch Upstream Ports
Date: Fri, 2 Sep 2022 16:56:39 -0700	[thread overview]
Message-ID: <8f4c3040-392e-f64d-4f30-a4e6838f9a1d@linux.intel.com> (raw)
In-Reply-To: <20220902233543.390890-3-helgaas@kernel.org>

On 9/2/22 4:35 PM, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@google.com>
> 
> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> ---
>  drivers/pci/pcie/ptm.c | 34 +++++++++++++++++++++++++++-------
>  1 file changed, 27 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/pci/pcie/ptm.c b/drivers/pci/pcie/ptm.c
> index b6a417247ce3..ad283818f37b 100644
> --- a/drivers/pci/pcie/ptm.c
> +++ b/drivers/pci/pcie/ptm.c
> @@ -167,11 +167,11 @@ int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
>  	if (!pos)
>  		return -EINVAL;
>  
> -	pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);
> -	if (!(cap & PCI_PTM_CAP_REQ))
> -		return -EINVAL;
> -

May be saving PCI_PTM_CAP_REQ enabled state here and using it below only for
endpoints checks will reduce the code duplication?

>  	/*
> +	 * Root Ports and Switch Upstream Ports have been configured
> +	 * by pci_ptm_init(), so preserve their PCI_PTM_CTRL_ROOT and
> +	 * granularity.
> +	 *
>  	 * For a PCIe Endpoint, PTM is only useful if the endpoint can
>  	 * issue PTM requests to upstream devices that have PTM enabled.
>  	 *
> @@ -179,19 +179,39 @@ int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)
>  	 * device, so there must be some implementation-specific way to
>  	 * associate the endpoint with a time source.
>  	 */
> -	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ENDPOINT) {
> +	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT ||
> +	    pci_pcie_type(dev) == PCI_EXP_TYPE_UPSTREAM) {
> +		if (pci_pcie_type(dev) == PCI_EXP_TYPE_UPSTREAM) {
> +			ups = pci_upstream_bridge(dev);
> +			if (!ups || !ups->ptm_enabled)
> +				return -EINVAL;
> +		}
> +
> +		pci_read_config_dword(dev, pos + PCI_PTM_CTRL, &ctrl);

Why read PCI_PTM_CTRL state only for root and upstream ports? The same logic
will work for endpoints and RC endpoints right? 

What not use dev->ptm_granularity for root ports?

> +		ctrl |= PCI_PTM_CTRL_ENABLE;
> +	} else if (pci_pcie_type(dev) == PCI_EXP_TYPE_ENDPOINT) {
> +		pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);
> +		if (!(cap & PCI_PTM_CAP_REQ))
> +			return -EINVAL;
> +
>  		ups = pci_upstream_bridge(dev);
>  		if (!ups || !ups->ptm_enabled)
>  			return -EINVAL;
>  
>  		dev->ptm_granularity = ups->ptm_granularity;
> +		ctrl = PCI_PTM_CTRL_ENABLE;
> +		ctrl |= dev->ptm_granularity << 8;
>  	} else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) {
> +		pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);
> +		if (!(cap & PCI_PTM_CAP_REQ))
> +			return -EINVAL;
> +
>  		dev->ptm_granularity = 0;
> +		ctrl = PCI_PTM_CTRL_ENABLE;
> +		ctrl |= dev->ptm_granularity << 8;
>  	} else
>  		return -EINVAL;
>  
> -	ctrl = PCI_PTM_CTRL_ENABLE;
> -	ctrl |= dev->ptm_granularity << 8;
>  	pci_write_config_dword(dev, pos + PCI_PTM_CTRL, ctrl);
>  	dev->ptm_enabled = 1;
>  

-- 
Sathyanarayanan Kuppuswamy
Linux Kernel Developer