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Wed, 25 May 2022 08:12:51 +0000 (GMT) Received: from [9.171.31.97] (unknown [9.171.31.97]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 25 May 2022 08:12:51 +0000 (GMT) Message-ID: <8f69ba01-e1c2-5bb9-785d-658877559de8@linux.ibm.com> Date: Wed, 25 May 2022 10:16:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [PATCH v7 04/13] s390x: topology: implementating Store Topology System Information Content-Language: en-US To: Thomas Huth , qemu-s390x@nongnu.org Cc: qemu-devel@nongnu.org, borntraeger@de.ibm.com, pasic@linux.ibm.com, richard.henderson@linaro.org, david@redhat.com, cohuck@redhat.com, mst@redhat.com, pbonzini@redhat.com, kvm@vger.kernel.org, ehabkost@redhat.com, marcel.apfelbaum@gmail.com, philmd@redhat.com, eblake@redhat.com, armbru@redhat.com, seiden@linux.ibm.com, nrb@linux.ibm.com, frankja@linux.ibm.com References: <20220420115745.13696-1-pmorel@linux.ibm.com> <20220420115745.13696-5-pmorel@linux.ibm.com> <6e426ed7-d3a6-2ae8-badc-80fc7a31c3ea@redhat.com> From: Pierre Morel In-Reply-To: <6e426ed7-d3a6-2ae8-badc-80fc7a31c3ea@redhat.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 1eWLYV5IkNWvIHTlKrllJnPM5zjxvceZ X-Proofpoint-GUID: TqQggPHNUgCWMTND4t4kLE4LCBNm9o_0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-25_02,2022-05-23_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 adultscore=0 clxscore=1015 bulkscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2205250037 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 5/24/22 12:59, Thomas Huth wrote: > On 20/04/2022 13.57, Pierre Morel wrote: >> The handling of STSI is enhanced with the interception of the >> function code 15 for storing CPU topology. >> >> Using the objects built during the pluging of CPU, we build the > > s/pluging/plugging/ > >> SYSIB 15_1_x structures. >> >> With this patch the maximum MNEST level is 2, this is also >> the only level allowed and only SYSIB 15_1_2 will be built. >> >> Signed-off-by: Pierre Morel >> --- > ... >> diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h >> index f6969b76c5..a617c943ff 100644 >> --- a/target/s390x/cpu.h >> +++ b/target/s390x/cpu.h >> @@ -889,4 +889,5 @@ S390CPU *s390_cpu_addr2state(uint16_t cpu_addr); >>   #include "exec/cpu-all.h" >> +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar); >>   #endif > > Please keep an empty line before the #endif OK > >> diff --git a/target/s390x/cpu_topology.c b/target/s390x/cpu_topology.c >> new file mode 100644 >> index 0000000000..7f6db18829 >> --- /dev/null >> +++ b/target/s390x/cpu_topology.c >> @@ -0,0 +1,112 @@ >> +/* >> + * QEMU S390x CPU Topology >> + * >> + * Copyright IBM Corp. 2021 > > 2022 ? :) yes > >> + * Author(s): Pierre Morel >> + * >> + * This work is licensed under the terms of the GNU GPL, version 2 or >> (at >> + * your option) any later version. See the COPYING file in the top-level >> + * directory. >> + */ > ... >> +void insert_stsi_15_1_x(S390CPU *cpu, int sel2, __u64 addr, uint8_t ar) >> +{ >> +    const MachineState *machine = MACHINE(qdev_get_machine()); >> +    void *p; >> +    int ret, cc; >> + >> +    /* >> +     * Until the SCLP STSI Facility reporting the MNEST value is used, >> +     * a sel2 value of 2 is the only value allowed in STSI 15.1.x. >> +     */ >> +    if (sel2 != 2) { >> +        setcc(cpu, 3); >> +        return; >> +    } >> + >> +    p = g_malloc0(TARGET_PAGE_SIZE); >> + >> +    setup_stsi(machine, p, 2); >> + >> +    if (s390_is_pv()) { >> +        ret = s390_cpu_pv_mem_write(cpu, 0, p, TARGET_PAGE_SIZE); >> +    } else { >> +        ret = s390_cpu_virt_mem_write(cpu, addr, ar, p, >> TARGET_PAGE_SIZE); >> +    } >> +    cc = ret ? 3 : 0; >> +    setcc(cpu, cc); > > Just a matter of taste (i.e. keep it if you like) - but you could > scratch the cc variable in this function by just doing: > >     setcc(cpu, ret ? 3 : 0); > OK I can do this. Thanks Pierre >> +    g_free(p); >> +} >> + > >  Thomas > -- Pierre Morel IBM Lab Boeblingen