* [PATCH 00/12] powerpc: Nintendo Wii U support
@ 2022-03-02 4:43 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne
The following patches add basic support for the Nintendo Wii U video
game console, a PowerPC system somewhat similar to the GameCube and
Wii.
This includes:
- devicetree source
- bootwrapper support
- udbg console to bootloader
- early udbg console
- interrupt controllers
- platform support
- recognition of the Espresso processor
- workaround for the discontiguous RAM blocks
This is enough to boot on hardware. dmesg pics (with a small hack to
udbg-immortal, not included):
Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
Some of the design choices (new platform > embedded6xx) were discussed
previously:
Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
Turns out even less changes were needed than previously anticipated for
discontiguous memory, and KUAP is yet to give trouble. Thanks to those
who helped and discussed this.
Ash Logan (11):
dt-bindings: wiiu: Document the Nintendo Wii U devicetree
powerpc: wiiu: device tree
powerpc: wiiu: bootwrapper support
powerpc: wiiu: introduce wiiu platform
powerpc: wiiu: declare as non-coherent
powerpc: wiiu: udbg support for latteipc
powerpc: wiiu: espresso interrupt controller support
powerpc: wiiu: latte interrupt controller support
powerpc: wiiu: platform support
powerpc: wiiu: don't enforce flat memory
powerpc: wiiu: Add minimal default config
Roberto Van Eeden (1):
powerpc: espresso processor support
.../bindings/powerpc/nintendo/wiiu.yaml | 28 ++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 +++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++
arch/powerpc/Kconfig.debug | 9 +
arch/powerpc/boot/Makefile | 4 +
arch/powerpc/boot/dts/wiiu.dts | 327 ++++++++++++++++++
arch/powerpc/boot/wiiu-head.S | 103 ++++++
arch/powerpc/boot/wiiu.c | 73 ++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/configs/wiiu_defconfig | 7 +
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/cputable.c | 16 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/mm/init_32.c | 4 +-
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 19 +
arch/powerpc/platforms/wiiu/Makefile | 4 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
arch/powerpc/platforms/wiiu/setup.c | 67 ++++
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 122 +++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
32 files changed, 1635 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
create mode 100644 arch/powerpc/configs/wiiu_defconfig
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
base-commit: df0cc57e057f18e44dac8e6c18aba47ab53202f9
--
2.35.1
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH 00/12] powerpc: Nintendo Wii U support
@ 2022-03-02 4:43 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, j.ne
The following patches add basic support for the Nintendo Wii U video
game console, a PowerPC system somewhat similar to the GameCube and
Wii.
This includes:
- devicetree source
- bootwrapper support
- udbg console to bootloader
- early udbg console
- interrupt controllers
- platform support
- recognition of the Espresso processor
- workaround for the discontiguous RAM blocks
This is enough to boot on hardware. dmesg pics (with a small hack to
udbg-immortal, not included):
Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
Some of the design choices (new platform > embedded6xx) were discussed
previously:
Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
Turns out even less changes were needed than previously anticipated for
discontiguous memory, and KUAP is yet to give trouble. Thanks to those
who helped and discussed this.
Ash Logan (11):
dt-bindings: wiiu: Document the Nintendo Wii U devicetree
powerpc: wiiu: device tree
powerpc: wiiu: bootwrapper support
powerpc: wiiu: introduce wiiu platform
powerpc: wiiu: declare as non-coherent
powerpc: wiiu: udbg support for latteipc
powerpc: wiiu: espresso interrupt controller support
powerpc: wiiu: latte interrupt controller support
powerpc: wiiu: platform support
powerpc: wiiu: don't enforce flat memory
powerpc: wiiu: Add minimal default config
Roberto Van Eeden (1):
powerpc: espresso processor support
.../bindings/powerpc/nintendo/wiiu.yaml | 28 ++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 +++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++
arch/powerpc/Kconfig.debug | 9 +
arch/powerpc/boot/Makefile | 4 +
arch/powerpc/boot/dts/wiiu.dts | 327 ++++++++++++++++++
arch/powerpc/boot/wiiu-head.S | 103 ++++++
arch/powerpc/boot/wiiu.c | 73 ++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/configs/wiiu_defconfig | 7 +
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/cputable.c | 16 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/mm/init_32.c | 4 +-
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 19 +
arch/powerpc/platforms/wiiu/Makefile | 4 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
arch/powerpc/platforms/wiiu/setup.c | 67 ++++
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 122 +++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
32 files changed, 1635 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
create mode 100644 arch/powerpc/configs/wiiu_defconfig
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
base-commit: df0cc57e057f18e44dac8e6c18aba47ab53202f9
--
2.35.1
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:43 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne
Adds schema for the various Wii U devicetree nodes used.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
.../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
8 files changed, 300 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
new file mode 100644
index 000000000000..5824b07928f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U bindings
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U video game console binding.
+
+properties:
+ $nodename:
+ const: "/"
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U video game console
+ items:
+ - const: nintendo,wiiu
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
new file mode 100644
index 000000000000..878a81595f5f
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U "Espresso" interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Espresso" interrupt controller
+ items:
+ - const: nintendo,espresso-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-32 in one cell
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+
+additionalProperties: false
+
+examples:
+ - |
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
new file mode 100644
index 000000000000..e54d49015f36
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte "GPU7" graphics processor
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
+ Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte "GPU7" graphics processor
+ items:
+ - const: nintendo,latte-gpu7
+ reg:
+ items:
+ - description: GpuF0MMReg registers
+ interrupts:
+ items:
+ - description: Main interrupt, connected via Espresso PIC
+
+# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
+additionalProperties: true
+
+examples:
+ - |
+ gpu7@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
new file mode 100644
index 000000000000..7b9de4effcb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte AHCI controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte AHCI controller
+ items:
+ - const: nintendo,latte-ahci
+ reg:
+ items:
+ - description: |
+ HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
+ registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
+ interrupts:
+ items:
+ - description: Main HBA interrupt
+ - description: Vendor debugging interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x408>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38>, <28>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
new file mode 100644
index 000000000000..ed0b4c28ce48
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte DSP
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U digital signal processor, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte DSP
+ items:
+ - const: nintendo,latte-dsp
+ reg:
+ items:
+ - description: DSP registers
+
+# Once more is known about this device more properties will likely be added
+additionalProperties: true
+
+examples:
+ - |
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
new file mode 100644
index 000000000000..a2df71fb9964
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte interrupt controller
+ items:
+ - const: nintendo,latte-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-64 in one cell.
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: Cascade interrupt for Espresso PIC
+
+additionalProperties: false
+
+examples:
+ - |
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
new file mode 100644
index 000000000000..4b9b0820edc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte SD Host controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte SDHCI
+ items:
+ - const: nintendo,latte-sdhci
+ - const: sdhci
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: SDHCI interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
new file mode 100644
index 000000000000..6ae86d198fa3
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Latte system bus
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Latte" SoC
+ items:
+ - const: nintendo,latte
+
+additionalProperties: true
+
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2022-03-02 4:43 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, j.ne
Adds schema for the various Wii U devicetree nodes used.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
.../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
8 files changed, 300 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
new file mode 100644
index 000000000000..5824b07928f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U bindings
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U video game console binding.
+
+properties:
+ $nodename:
+ const: "/"
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U video game console
+ items:
+ - const: nintendo,wiiu
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
new file mode 100644
index 000000000000..878a81595f5f
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U "Espresso" interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Espresso" interrupt controller
+ items:
+ - const: nintendo,espresso-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-32 in one cell
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+
+additionalProperties: false
+
+examples:
+ - |
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
new file mode 100644
index 000000000000..e54d49015f36
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte "GPU7" graphics processor
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
+ Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte "GPU7" graphics processor
+ items:
+ - const: nintendo,latte-gpu7
+ reg:
+ items:
+ - description: GpuF0MMReg registers
+ interrupts:
+ items:
+ - description: Main interrupt, connected via Espresso PIC
+
+# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
+additionalProperties: true
+
+examples:
+ - |
+ gpu7@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
new file mode 100644
index 000000000000..7b9de4effcb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte AHCI controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte AHCI controller
+ items:
+ - const: nintendo,latte-ahci
+ reg:
+ items:
+ - description: |
+ HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
+ registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
+ interrupts:
+ items:
+ - description: Main HBA interrupt
+ - description: Vendor debugging interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x408>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38>, <28>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
new file mode 100644
index 000000000000..ed0b4c28ce48
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte DSP
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U digital signal processor, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte DSP
+ items:
+ - const: nintendo,latte-dsp
+ reg:
+ items:
+ - description: DSP registers
+
+# Once more is known about this device more properties will likely be added
+additionalProperties: true
+
+examples:
+ - |
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
new file mode 100644
index 000000000000..a2df71fb9964
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte interrupt controller
+ items:
+ - const: nintendo,latte-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-64 in one cell.
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: Cascade interrupt for Espresso PIC
+
+additionalProperties: false
+
+examples:
+ - |
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
new file mode 100644
index 000000000000..4b9b0820edc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte SD Host controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte SDHCI
+ items:
+ - const: nintendo,latte-sdhci
+ - const: sdhci
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: SDHCI interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
new file mode 100644
index 000000000000..6ae86d198fa3
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Latte system bus
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Latte" SoC
+ items:
+ - const: nintendo,latte
+
+additionalProperties: true
+
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 02/12] powerpc: wiiu: device tree
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:43 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, Roberto Van Eeden, Emmanuel Gil Peyrot
Add a device tree source file for the Nintendo Wii U video game console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/dts/wiiu.dts | 327 +++++++++++++++++++++++++++++++++
1 file changed, 327 insertions(+)
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
new file mode 100644
index 000000000000..aaf264963f61
--- /dev/null
+++ b/arch/powerpc/boot/dts/wiiu.dts
@@ -0,0 +1,327 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nintendo Wii U Device Tree Source
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "nintendo,wiiu";
+ compatible = "nintendo,wiiu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs = "root=/dev/sda1 rootwait";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
+ 0x08000000 0x00300000 /* MEM0 - 3MiB */
+ 0x10000000 0x80000000>; /* MEM2 - 2GiB */
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* TODO: Add SMP */
+ PowerPC,espresso@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <1243125000>; /* 1.243125GHz */
+ bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
+ timebase-frequency = <62156250>; /* 1/4 of the bus clock */
+ i-cache-size = <32768>; /* 32K icache */
+ i-cache-line-size = <32>;
+ i-cache-block-size = <32>;
+ i-cache-sets = <128>;
+ d-cache-size = <32768>; /* 32K dcache */
+ d-cache-line-size = <32>;
+ d-cache-block-size = <32>;
+ d-cache-sets = <128>;
+ next-level-cache = <&L2_0>;
+ L2_0:l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>; /* 512KB L2 */
+ cache-line-size = <64>;
+ cache-block-size = <32>;
+ cache-sets = <2048>;
+ };
+ };
+ };
+
+ latte {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "nintendo,latte";
+ ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
+ 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
+ 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
+
+ gpu7@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+
+ ehci_0: usb@d040000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d040000 0x100>;
+ interrupts = <4>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_0: usb@d050000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d050000 0x100>;
+ interrupts = <5>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ohci_0_1: usb@d060000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d060000 0x100>;
+ interrupts = <6>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_1: usb@d120000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d120000 0x100>;
+ interrupts = <16>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_1_0: usb@d130000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d130000 0x100>;
+ interrupts = <35>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_2: usb@d140000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d140000 0x100>;
+ interrupts = <36>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_2_0: usb@d150000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d150000 0x100>;
+ interrupts = <37>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ wifi_0: sdhci@d080000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d080000 0x200>;
+ interrupts = <8>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ legacy_ipc: ipc@d800000 {
+ compatible = "nintendo,latte-ipc","nintendo,hollywood-ipc";
+ reg = <0x0d800000 0x10>;
+ interrupts = <30 31>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ latte_otp: otp@d8001ec {
+ compatible = "nintendo,latte-otp";
+ reg = <0x0d8001ec 0x8>;
+ };
+
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x808>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38 28>;
+ };
+
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+
+ gpio: gpio@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d8000c0 0x40>;
+ gpio-controller;
+ /* TODO: There are actually 31 AHBALL GPIOs */
+ ngpios = <24>;
+
+ gpio-line-names =
+ "POWER", "DWIFI", "FAN", "DC_DC",
+ "", "Esp10WorkAround", "", "",
+ "PADPD", "", "EEP_CS", "EEP_CLK",
+ "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
+ "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
+ "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ spi_gpio: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+ gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ seeprom@0 {
+ compatible = "atmel,at93c66";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ /* TODO: wiiubrew says this is 16-bit, but I only get the correct
+ * values in 8-bit...
+ */
+ data-size = <8>;
+ read-only;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
+ rng_seed: rng@12 { reg = <0x012 8>; };
+ ppc_pvr: pvr@20 { reg = <0x020 4>; };
+ seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
+ seeprom_ver: sver@2a { reg = <0x02A 2>; };
+ otp_ver: over@2c { reg = <0x02C 2>; };
+ otp_rev: orev@2e { reg = <0x02E 2>; };
+ otp_ver_str: over-str@30 { reg = <0x030 8>; };
+
+ bc_crc: bc-crc@38 { reg = <0x038 4>; };
+ bc_sz: bc-sz@3c { reg = <0x03C 2>; };
+ bc_ver: bc-ver@3e { reg = <0x03E 2>; };
+ bc_boardtype: boardtype@42 { reg = <0x042 2>; };
+ bc_boardrev: boardrev@44 { reg = <0x044 2>; };
+ bc_bootsource: bootsource@46 { reg = <0x046 2>; };
+ bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
+ bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
+ bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
+ bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
+ bc_video1080p: video1080p@50 { reg = <0x050 2>; };
+ bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
+ bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
+ bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
+ bc_satadevice: satadevice@58 { reg = <0x058 2>; };
+ bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
+ bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
+
+ drive_key: drvkey@80 { reg = <0x080 16>; };
+ factory_key: fackey@90 { reg = <0x090 16>; };
+ shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
+ usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
+ drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
+ usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
+ shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
+
+ sysprod_version: sp_ver@140 { reg = <0x140 4>; };
+ sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
+ sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
+ sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
+ sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
+ sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
+ sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
+ sysprod_code: sp_code@158 { reg = <0x158 8>; };
+ sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
+ sysprod_model: sp_model@170 { reg = <0x170 16>; };
+
+ prod_year: pyear@188 { reg = <0x188 2>; };
+ prod_date: pdate@18a { reg = <0x18A 2>; };
+ prod_time: ptime@18c { reg = <0x18C 2>; };
+
+ boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
+ };
+ };
+
+ /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
+ gpio-keys-polled {
+ poll-interval = <50>;
+ compatible = "gpio-keys-polled";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+
+ gpio2: gpio2@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d800520 0x40>;
+ gpio-controller;
+ ngpios = <7>;
+
+ gpio-line-names =
+ "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
+ "AVE_INT", "", "AVE_RESET";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+ };
+};
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 02/12] powerpc: wiiu: device tree
@ 2022-03-02 4:43 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: Emmanuel Gil Peyrot, linuxppc-dev, linux-kernel, Roberto Van Eeden, j.ne
Add a device tree source file for the Nintendo Wii U video game console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/dts/wiiu.dts | 327 +++++++++++++++++++++++++++++++++
1 file changed, 327 insertions(+)
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
new file mode 100644
index 000000000000..aaf264963f61
--- /dev/null
+++ b/arch/powerpc/boot/dts/wiiu.dts
@@ -0,0 +1,327 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nintendo Wii U Device Tree Source
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "nintendo,wiiu";
+ compatible = "nintendo,wiiu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs = "root=/dev/sda1 rootwait";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
+ 0x08000000 0x00300000 /* MEM0 - 3MiB */
+ 0x10000000 0x80000000>; /* MEM2 - 2GiB */
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* TODO: Add SMP */
+ PowerPC,espresso@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <1243125000>; /* 1.243125GHz */
+ bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
+ timebase-frequency = <62156250>; /* 1/4 of the bus clock */
+ i-cache-size = <32768>; /* 32K icache */
+ i-cache-line-size = <32>;
+ i-cache-block-size = <32>;
+ i-cache-sets = <128>;
+ d-cache-size = <32768>; /* 32K dcache */
+ d-cache-line-size = <32>;
+ d-cache-block-size = <32>;
+ d-cache-sets = <128>;
+ next-level-cache = <&L2_0>;
+ L2_0:l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>; /* 512KB L2 */
+ cache-line-size = <64>;
+ cache-block-size = <32>;
+ cache-sets = <2048>;
+ };
+ };
+ };
+
+ latte {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "nintendo,latte";
+ ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
+ 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
+ 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
+
+ gpu7@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+
+ ehci_0: usb@d040000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d040000 0x100>;
+ interrupts = <4>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_0: usb@d050000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d050000 0x100>;
+ interrupts = <5>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ohci_0_1: usb@d060000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d060000 0x100>;
+ interrupts = <6>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_1: usb@d120000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d120000 0x100>;
+ interrupts = <16>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_1_0: usb@d130000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d130000 0x100>;
+ interrupts = <35>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_2: usb@d140000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d140000 0x100>;
+ interrupts = <36>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_2_0: usb@d150000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d150000 0x100>;
+ interrupts = <37>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ wifi_0: sdhci@d080000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d080000 0x200>;
+ interrupts = <8>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ legacy_ipc: ipc@d800000 {
+ compatible = "nintendo,latte-ipc","nintendo,hollywood-ipc";
+ reg = <0x0d800000 0x10>;
+ interrupts = <30 31>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ latte_otp: otp@d8001ec {
+ compatible = "nintendo,latte-otp";
+ reg = <0x0d8001ec 0x8>;
+ };
+
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x808>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38 28>;
+ };
+
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+
+ gpio: gpio@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d8000c0 0x40>;
+ gpio-controller;
+ /* TODO: There are actually 31 AHBALL GPIOs */
+ ngpios = <24>;
+
+ gpio-line-names =
+ "POWER", "DWIFI", "FAN", "DC_DC",
+ "", "Esp10WorkAround", "", "",
+ "PADPD", "", "EEP_CS", "EEP_CLK",
+ "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
+ "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
+ "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ spi_gpio: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+ gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ seeprom@0 {
+ compatible = "atmel,at93c66";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ /* TODO: wiiubrew says this is 16-bit, but I only get the correct
+ * values in 8-bit...
+ */
+ data-size = <8>;
+ read-only;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
+ rng_seed: rng@12 { reg = <0x012 8>; };
+ ppc_pvr: pvr@20 { reg = <0x020 4>; };
+ seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
+ seeprom_ver: sver@2a { reg = <0x02A 2>; };
+ otp_ver: over@2c { reg = <0x02C 2>; };
+ otp_rev: orev@2e { reg = <0x02E 2>; };
+ otp_ver_str: over-str@30 { reg = <0x030 8>; };
+
+ bc_crc: bc-crc@38 { reg = <0x038 4>; };
+ bc_sz: bc-sz@3c { reg = <0x03C 2>; };
+ bc_ver: bc-ver@3e { reg = <0x03E 2>; };
+ bc_boardtype: boardtype@42 { reg = <0x042 2>; };
+ bc_boardrev: boardrev@44 { reg = <0x044 2>; };
+ bc_bootsource: bootsource@46 { reg = <0x046 2>; };
+ bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
+ bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
+ bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
+ bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
+ bc_video1080p: video1080p@50 { reg = <0x050 2>; };
+ bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
+ bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
+ bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
+ bc_satadevice: satadevice@58 { reg = <0x058 2>; };
+ bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
+ bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
+
+ drive_key: drvkey@80 { reg = <0x080 16>; };
+ factory_key: fackey@90 { reg = <0x090 16>; };
+ shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
+ usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
+ drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
+ usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
+ shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
+
+ sysprod_version: sp_ver@140 { reg = <0x140 4>; };
+ sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
+ sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
+ sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
+ sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
+ sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
+ sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
+ sysprod_code: sp_code@158 { reg = <0x158 8>; };
+ sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
+ sysprod_model: sp_model@170 { reg = <0x170 16>; };
+
+ prod_year: pyear@188 { reg = <0x188 2>; };
+ prod_date: pdate@18a { reg = <0x18A 2>; };
+ prod_time: ptime@18c { reg = <0x18C 2>; };
+
+ boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
+ };
+ };
+
+ /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
+ gpio-keys-polled {
+ poll-interval = <50>;
+ compatible = "gpio-keys-polled";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+
+ gpio2: gpio2@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d800520 0x40>;
+ gpio-controller;
+ ngpios = <7>;
+
+ gpio-line-names =
+ "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
+ "AVE_INT", "", "AVE_RESET";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+ };
+};
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 03/12] powerpc: wiiu: bootwrapper support
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:43 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, Emmanuel Gil Peyrot
Add support for the Nintendo Wii U game console to the powerpc
bootwrapper.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/Makefile | 4 ++
arch/powerpc/boot/wiiu-head.S | 103 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/wiiu.c | 73 ++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 9993c6256ad2..4e31bb648f4d 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -155,6 +155,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
gamecube-head.S gamecube.c \
wii-head.S wii.c holly.c \
fixed-head.S mvme5100.c
+src-plat-$(CONFIG_WIIU) += wiiu-head.S wiiu.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -353,6 +354,9 @@ image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
image-$(CONFIG_WII) += dtbImage.wii
image-$(CONFIG_MVME5100) += dtbImage.mvme5100
+# Board port in arch/powerpc/platform/wiiu/Kconfig
+image-$(CONFIG_WIIU) += dtbImage.wiiu
+
# Board port in arch/powerpc/platform/amigaone/Kconfig
image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/wiiu-head.S b/arch/powerpc/boot/wiiu-head.S
new file mode 100644
index 000000000000..8586e2e992d5
--- /dev/null
+++ b/arch/powerpc/boot/wiiu-head.S
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entrypoint head asm
+ * This code expects to be called directly after the Espresso BootROM, which implies certain MSR
+ * states.
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include "ppc_asm.h"
+
+.text
+.global _zimage_start
+_zimage_start:
+ /* Clear out all BATs. MMU is already off. */
+ li r8, 0
+
+ mtspr 0x210, r8 /* IBAT0U */
+ mtspr 0x212, r8 /* IBAT1U */
+ mtspr 0x214, r8 /* IBAT2U */
+ mtspr 0x216, r8 /* IBAT3U */
+ mtspr 0x218, r8 /* DBAT0U */
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x21c, r8 /* DBAT2U */
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ mtspr 0x230, r8 /* IBAT4U */
+ mtspr 0x232, r8 /* IBAT5U */
+ mtspr 0x234, r8 /* IBAT6U */
+ mtspr 0x236, r8 /* IBAT7U */
+ mtspr 0x238, r8 /* DBAT4U */
+ mtspr 0x23a, r8 /* DBAT5U */
+ mtspr 0x23c, r8 /* DBAT6U */
+ mtspr 0x23e, r8 /* DBAT7U */
+
+ /* MEM1 */
+ /* 32MB, starting at 0x00000000... */
+ li r8, 0x000003ff@l
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x212, r8 /* IBAT1U */
+
+ /* mapped into phys 0x00000000; read-write; normal caching. */
+ li r8, 0x00000002@l
+ mtspr 0x21b, r8 /* DBAT1L */
+ mtspr 0x213, r8 /* IBAT1L */
+
+ /* Latte MMIO area */
+ /* 64MB, starting at 0x0d800000... */
+ lis r8, 0x0d8007ff@h
+ ori r8, r8,0x0d800007ff@l
+ mtspr 0x21c, r8 /* DBAT2U */
+
+ /* mapped into phys 0x0d800000; read-write; writethrough/nocache/guard*/
+ lis r8, 0x0d80006A@h
+ ori r8, r8,0x0d80006A@l
+ mtspr 0x21d, r8 /* DBAT2L */
+
+ /* Bootloader comms area (actually 0x89200000) */
+ /* 128MiB, starting at 0x88000000... */
+ lis r8, 0x88000fff@h
+ ori r8, r8, 0x88000fff@l
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ /* mapped into phys 0x88000000; read-write; normal caching. */
+ lis r8, 0x88000002@h
+ ori r8, r8, 0x88000002@l
+ mtspr 0x21f, r8 /* DBAT3L */
+
+ /* Turn on BAT 4 through 7, configure CPU */
+ mfspr r8, 0x3f3 /* HID4 */
+ oris r8, r8, 0x3200 /* L2FM: 64-byte fetch, BPD: max depth is 4, SBE */
+ mtspr 0x3f3, r8
+
+ /* Turn on and invalidate caches */
+ mfspr r8, 0x3f0 /* HID0 */
+ /* HID0_ICE | HID0_ICFI | HID0_DCE | HID0_DCFI */
+ ori r8, r8, (1 << 15) | (1 << 11) | (1 << 14) | (1 << 10)
+ mtspr 0x3f0, r8
+ isync
+
+ li r3, 0
+ li r4, 0
+ li r5, 0
+
+ bl get_lr
+get_lr:
+ mflr r8
+ /* Get absolute address of done */
+ addi r8, r8, done - get_lr
+
+ /* Set up MSR */
+ /* MSR_DR | MSR_IR | MSR_FP */
+ /* Data/instruction MMUs, FPU because why not */
+ ori r9, r3, (1 << 4) | (1 << 5) | (1 << 13)
+
+ /* Apply our new MSR, starting execution at "done" */
+ mtsrr0 r8
+ mtsrr1 r9
+ sync
+ rfi
+done:
+ b _zimage_start_lib
diff --git a/arch/powerpc/boot/wiiu.c b/arch/powerpc/boot/wiiu.c
new file mode 100644
index 000000000000..fe88eb2c42ae
--- /dev/null
+++ b/arch/powerpc/boot/wiiu.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Platform support and IPC debug console to linux-loader (on Starbuck)
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include <stddef.h>
+#include "string.h"
+#include "stdio.h"
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+BSS_STACK(8192);
+
+// Volatile is used here since the io.h routines require it
+#define LT_IPC_PPCMSG ((volatile u32 *)0x0d800000)
+#define LT_IPC_PPCCTRL ((volatile u32 *)0x0d800004)
+#define LT_IPC_PPCCTRL_X1 0x1
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+static void wiiu_ipc_sendmsg(int msg)
+{
+ out_be32(LT_IPC_PPCMSG, msg);
+ out_be32(LT_IPC_PPCCTRL, LT_IPC_PPCCTRL_X1);
+ while (in_be32(LT_IPC_PPCCTRL) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Send logging string out over IPC to linux-loader for early printing.
+ * Packs 3 chars at a time where possible.
+ */
+static void wiiu_write_ipc(const char *buf, int len)
+{
+ int i = 0;
+
+ for (i = 0; i + 2 < len; i += 3) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i + 0] << 16) |
+ (buf[i + 1] << 8) | buf[i + 2];
+
+ wiiu_ipc_sendmsg(msg);
+ }
+
+ if (i < len) {
+ for (; i < len; i++) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i] << 16);
+
+ wiiu_ipc_sendmsg(msg);
+ }
+ }
+}
+
+/*
+ * Note 32MiB heap - not ideal but seems fine for the bootwrapper
+ */
+void platform_init(unsigned int r3, unsigned int r4, unsigned int r5)
+{
+ u32 heapsize;
+
+ console_ops.write = wiiu_write_ipc;
+ printf("wiiu: bootwrapper ok\n");
+
+ heapsize = 32 * 1024 * 1024 - (u32)_end;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ printf("wiiu: heap ok\n");
+
+ fdt_init(_dtb_start);
+ printf("wiiu: dtb ok\n");
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 9184eda780fd..f42abe4ebde2 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -344,6 +344,10 @@ gamecube|wii)
link_address='0x600000'
platformo="$object/$platform-head.o $object/$platform.o"
;;
+wiiu)
+ link_address='0x600000'
+ platformo="$object/wiiu-head.o $object/$platform.o"
+ ;;
microwatt)
link_address='0x500000'
platformo="$object/fixed-head.o $object/$platform.o"
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 03/12] powerpc: wiiu: bootwrapper support
@ 2022-03-02 4:43 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: Emmanuel Gil Peyrot, linuxppc-dev, linux-kernel, j.ne
Add support for the Nintendo Wii U game console to the powerpc
bootwrapper.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/Makefile | 4 ++
arch/powerpc/boot/wiiu-head.S | 103 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/wiiu.c | 73 ++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 9993c6256ad2..4e31bb648f4d 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -155,6 +155,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
gamecube-head.S gamecube.c \
wii-head.S wii.c holly.c \
fixed-head.S mvme5100.c
+src-plat-$(CONFIG_WIIU) += wiiu-head.S wiiu.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -353,6 +354,9 @@ image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
image-$(CONFIG_WII) += dtbImage.wii
image-$(CONFIG_MVME5100) += dtbImage.mvme5100
+# Board port in arch/powerpc/platform/wiiu/Kconfig
+image-$(CONFIG_WIIU) += dtbImage.wiiu
+
# Board port in arch/powerpc/platform/amigaone/Kconfig
image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/wiiu-head.S b/arch/powerpc/boot/wiiu-head.S
new file mode 100644
index 000000000000..8586e2e992d5
--- /dev/null
+++ b/arch/powerpc/boot/wiiu-head.S
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entrypoint head asm
+ * This code expects to be called directly after the Espresso BootROM, which implies certain MSR
+ * states.
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include "ppc_asm.h"
+
+.text
+.global _zimage_start
+_zimage_start:
+ /* Clear out all BATs. MMU is already off. */
+ li r8, 0
+
+ mtspr 0x210, r8 /* IBAT0U */
+ mtspr 0x212, r8 /* IBAT1U */
+ mtspr 0x214, r8 /* IBAT2U */
+ mtspr 0x216, r8 /* IBAT3U */
+ mtspr 0x218, r8 /* DBAT0U */
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x21c, r8 /* DBAT2U */
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ mtspr 0x230, r8 /* IBAT4U */
+ mtspr 0x232, r8 /* IBAT5U */
+ mtspr 0x234, r8 /* IBAT6U */
+ mtspr 0x236, r8 /* IBAT7U */
+ mtspr 0x238, r8 /* DBAT4U */
+ mtspr 0x23a, r8 /* DBAT5U */
+ mtspr 0x23c, r8 /* DBAT6U */
+ mtspr 0x23e, r8 /* DBAT7U */
+
+ /* MEM1 */
+ /* 32MB, starting at 0x00000000... */
+ li r8, 0x000003ff@l
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x212, r8 /* IBAT1U */
+
+ /* mapped into phys 0x00000000; read-write; normal caching. */
+ li r8, 0x00000002@l
+ mtspr 0x21b, r8 /* DBAT1L */
+ mtspr 0x213, r8 /* IBAT1L */
+
+ /* Latte MMIO area */
+ /* 64MB, starting at 0x0d800000... */
+ lis r8, 0x0d8007ff@h
+ ori r8, r8,0x0d800007ff@l
+ mtspr 0x21c, r8 /* DBAT2U */
+
+ /* mapped into phys 0x0d800000; read-write; writethrough/nocache/guard*/
+ lis r8, 0x0d80006A@h
+ ori r8, r8,0x0d80006A@l
+ mtspr 0x21d, r8 /* DBAT2L */
+
+ /* Bootloader comms area (actually 0x89200000) */
+ /* 128MiB, starting at 0x88000000... */
+ lis r8, 0x88000fff@h
+ ori r8, r8, 0x88000fff@l
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ /* mapped into phys 0x88000000; read-write; normal caching. */
+ lis r8, 0x88000002@h
+ ori r8, r8, 0x88000002@l
+ mtspr 0x21f, r8 /* DBAT3L */
+
+ /* Turn on BAT 4 through 7, configure CPU */
+ mfspr r8, 0x3f3 /* HID4 */
+ oris r8, r8, 0x3200 /* L2FM: 64-byte fetch, BPD: max depth is 4, SBE */
+ mtspr 0x3f3, r8
+
+ /* Turn on and invalidate caches */
+ mfspr r8, 0x3f0 /* HID0 */
+ /* HID0_ICE | HID0_ICFI | HID0_DCE | HID0_DCFI */
+ ori r8, r8, (1 << 15) | (1 << 11) | (1 << 14) | (1 << 10)
+ mtspr 0x3f0, r8
+ isync
+
+ li r3, 0
+ li r4, 0
+ li r5, 0
+
+ bl get_lr
+get_lr:
+ mflr r8
+ /* Get absolute address of done */
+ addi r8, r8, done - get_lr
+
+ /* Set up MSR */
+ /* MSR_DR | MSR_IR | MSR_FP */
+ /* Data/instruction MMUs, FPU because why not */
+ ori r9, r3, (1 << 4) | (1 << 5) | (1 << 13)
+
+ /* Apply our new MSR, starting execution at "done" */
+ mtsrr0 r8
+ mtsrr1 r9
+ sync
+ rfi
+done:
+ b _zimage_start_lib
diff --git a/arch/powerpc/boot/wiiu.c b/arch/powerpc/boot/wiiu.c
new file mode 100644
index 000000000000..fe88eb2c42ae
--- /dev/null
+++ b/arch/powerpc/boot/wiiu.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Platform support and IPC debug console to linux-loader (on Starbuck)
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include <stddef.h>
+#include "string.h"
+#include "stdio.h"
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+BSS_STACK(8192);
+
+// Volatile is used here since the io.h routines require it
+#define LT_IPC_PPCMSG ((volatile u32 *)0x0d800000)
+#define LT_IPC_PPCCTRL ((volatile u32 *)0x0d800004)
+#define LT_IPC_PPCCTRL_X1 0x1
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+static void wiiu_ipc_sendmsg(int msg)
+{
+ out_be32(LT_IPC_PPCMSG, msg);
+ out_be32(LT_IPC_PPCCTRL, LT_IPC_PPCCTRL_X1);
+ while (in_be32(LT_IPC_PPCCTRL) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Send logging string out over IPC to linux-loader for early printing.
+ * Packs 3 chars at a time where possible.
+ */
+static void wiiu_write_ipc(const char *buf, int len)
+{
+ int i = 0;
+
+ for (i = 0; i + 2 < len; i += 3) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i + 0] << 16) |
+ (buf[i + 1] << 8) | buf[i + 2];
+
+ wiiu_ipc_sendmsg(msg);
+ }
+
+ if (i < len) {
+ for (; i < len; i++) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i] << 16);
+
+ wiiu_ipc_sendmsg(msg);
+ }
+ }
+}
+
+/*
+ * Note 32MiB heap - not ideal but seems fine for the bootwrapper
+ */
+void platform_init(unsigned int r3, unsigned int r4, unsigned int r5)
+{
+ u32 heapsize;
+
+ console_ops.write = wiiu_write_ipc;
+ printf("wiiu: bootwrapper ok\n");
+
+ heapsize = 32 * 1024 * 1024 - (u32)_end;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ printf("wiiu: heap ok\n");
+
+ fdt_init(_dtb_start);
+ printf("wiiu: dtb ok\n");
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 9184eda780fd..f42abe4ebde2 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -344,6 +344,10 @@ gamecube|wii)
link_address='0x600000'
platformo="$object/$platform-head.o $object/$platform.o"
;;
+wiiu)
+ link_address='0x600000'
+ platformo="$object/wiiu-head.o $object/$platform.o"
+ ;;
microwatt)
link_address='0x500000'
platformo="$object/fixed-head.o $object/$platform.o"
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 04/12] powerpc: wiiu: introduce wiiu platform
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:43 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne
Add empty platforms/wiiu for Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 5 +++++
arch/powerpc/platforms/wiiu/Makefile | 1 +
4 files changed, 8 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index e02d29a9d12f..7ea25ea369b4 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/wiiu/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 94470fb27c99..944ddd938711 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
obj-$(CONFIG_PPC_MICROWATT) += microwatt/
+obj-$(CONFIG_WIIU) += wiiu/
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
new file mode 100644
index 000000000000..e5513205da3c
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config WIIU
+ bool "Nintendo Wii U"
+ depends on PPC_BOOK3S_32
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
new file mode 100644
index 000000000000..f66554cd5c45
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: GPL-2.0
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 04/12] powerpc: wiiu: introduce wiiu platform
@ 2022-03-02 4:43 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, j.ne
Add empty platforms/wiiu for Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 5 +++++
arch/powerpc/platforms/wiiu/Makefile | 1 +
4 files changed, 8 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index e02d29a9d12f..7ea25ea369b4 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/wiiu/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 94470fb27c99..944ddd938711 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
obj-$(CONFIG_PPC_MICROWATT) += microwatt/
+obj-$(CONFIG_WIIU) += wiiu/
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
new file mode 100644
index 000000000000..e5513205da3c
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config WIIU
+ bool "Nintendo Wii U"
+ depends on PPC_BOOK3S_32
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
new file mode 100644
index 000000000000..f66554cd5c45
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: GPL-2.0
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 05/12] powerpc: wiiu: declare as non-coherent
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:43 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne
The Nintendo Wii U requires explicit cache handling when interfacing
with DMA devices.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index a208997ade88..bec8293a7985 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -485,7 +485,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ GAMECUBE_COMMON || AMIGAONE || WIIU
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 05/12] powerpc: wiiu: declare as non-coherent
@ 2022-03-02 4:43 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:43 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, j.ne
The Nintendo Wii U requires explicit cache handling when interfacing
with DMA devices.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index a208997ade88..bec8293a7985 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -485,7 +485,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ GAMECUBE_COMMON || AMIGAONE || WIIU
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 06/12] powerpc: wiiu: udbg support for latteipc
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:44 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne
Add support for using the Latte chipset IPC for udbg on the Nintendo Wii
U console.
These messages can then be received by a special firmware running on the
"Starbuck" coprocessor.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/Kconfig.debug | 9 ++
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/wiiu/Kconfig | 13 +++
arch/powerpc/platforms/wiiu/Makefile | 2 +
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 122 ++++++++++++++++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 +++++
8 files changed, 197 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 192f0ed0097f..15c7fa7c040a 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,15 @@ config PPC_EARLY_DEBUG_USBGECKO
Select this to enable early debugging for Nintendo GameCube/Wii
consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_LATTEIPC
+ bool "Early debugging through Latte chipset IPC"
+ depends on WIIU
+ select LATTEIPC_UDBG
+ help
+ Select this to enable early debugging for Nintendo Wii U consoles via
+ chipset IPC to the security coprocessor. This assumes a firmware is
+ running on the coprocessor to receive messages.
+
config PPC_EARLY_DEBUG_PS3GELIC
bool "Early debugging through the PS3 Ethernet port"
depends on PPC_PS3
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index 0ea9e70ed78b..82858c0283ac 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -53,6 +53,7 @@ extern void __init udbg_init_ehv_bc(void);
extern void __init udbg_init_ps3gelic(void);
extern void __init udbg_init_debug_opal_raw(void);
extern void __init udbg_init_debug_opal_hvsi(void);
+extern void __init udbg_init_latteipc(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 68e5c0a7e99d..f159e500342c 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -167,6 +167,9 @@ __after_mmu_off:
#ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO
bl setup_usbgecko_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+ bl setup_latteipc_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1206,4 +1209,21 @@ setup_usbgecko_bat:
blr
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+setup_latteipc_bat:
+ /* prepare a BAT for early io */
+ lis r8, 0x0d80
+
+ /*
+ * The virtual address used must match the virtual address
+ * associated to the fixmap entry FIX_EARLY_DEBUG_BASE.
+ */
+ lis r11, 0xfffe /* top 128K */
+ ori r8, r8, 0x002a /* uncached, guarded ,rw */
+ ori r11, r11, 0x2 /* 128K, Vs=1, Vp=0 */
+ mtspr SPRN_DBAT1L, r8
+ mtspr SPRN_DBAT1U, r11
+ blr
+#endif
+
.data
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index b1544b2f6321..84eae25c195e 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -67,6 +67,9 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_raw();
#elif defined(CONFIG_PPC_EARLY_DEBUG_OPAL_HVSI)
udbg_init_debug_opal_hvsi();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_LATTEIPC)
+ /* For use on Nintendo Wii U */
+ udbg_init_latteipc();
#endif
#ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index e5513205da3c..fa86cbc33d5e 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,3 +3,16 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+
+config LATTEIPC_UDBG
+ bool "Chipset IPC udbg console for the Nintendo Wii U"
+ depends on WIIU
+ help
+ If you say yes to this option, support will be included for the
+ Wii U's chipset IPC as a udbg console.
+ These IPC messages can be received by a firmware running on the
+ console's "Starbuck" security coprocessor.
+
+ This driver bypasses the IPC layer completely.
+
+ If in doubt, say N here.
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index f66554cd5c45..b1e0e1307f6e 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.c b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
new file mode 100644
index 000000000000..d546b3ba9bab
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.c
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#include <mm/mmu_decl.h>
+
+#include <linux/io.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/fixmap.h>
+
+#define LT_MMIO_BASE ((phys_addr_t)0x0d800000)
+#define LT_IPC_PPCMSG 0x00
+#define LT_IPC_PPCCTRL 0x04
+#define LT_IPC_PPCCTRL_X1 0x01
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+void __iomem *latteipc_io_base;
+
+/*
+ * Transmits a character.
+ * Sends over IPC to linux-loader for printing.
+ */
+static void latteipc_udbg_putc(char c)
+{
+ void __iomem *ppcmsg_reg = latteipc_io_base + LT_IPC_PPCMSG;
+ void __iomem *ppcctrl_reg = latteipc_io_base + LT_IPC_PPCCTRL;
+
+ out_be32(ppcmsg_reg, WIIU_LOADER_CMD_PRINT | (c << 16));
+ out_be32(ppcctrl_reg, LT_IPC_PPCCTRL_X1);
+
+ while (in_be32(ppcctrl_reg) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Retrieves and prepares the virtual address needed to access the hardware.
+ */
+static void __iomem *latteipc_udbg_setup_ipc_io_base(struct device_node *np)
+{
+ void __iomem *ipc_io_base = NULL;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ reg = of_get_property(np, "reg", NULL);
+ if (reg) {
+ paddr = of_translate_address(np, reg);
+ if (paddr)
+ ipc_io_base = ioremap(paddr, reg[1]);
+ }
+ return ipc_io_base;
+}
+
+/*
+ * Latte IPC udbg support initialization.
+ */
+void __init latteipc_udbg_init(void)
+{
+ struct device_node *np;
+ void __iomem *ipc_io_base;
+
+ if (latteipc_io_base)
+ udbg_printf("%s: early -> final\n", __func__);
+
+ np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
+ if (!np) {
+ udbg_printf("%s: IPC node not found\n", __func__);
+ goto out;
+ }
+
+ ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
+ if (!ipc_io_base) {
+ udbg_printf("%s: failed to setup IPC io base\n", __func__);
+ goto done;
+ }
+
+ udbg_putc = latteipc_udbg_putc;
+ udbg_printf("latteipc_udbg: ready\n");
+
+done:
+ of_node_put(np);
+out:
+ return;
+}
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+
+void __init udbg_init_latteipc(void)
+{
+ /*
+ * At this point we have a BAT already setup that enables I/O
+ * to the IPC hardware.
+ *
+ * The BAT uses a virtual address range reserved at the fixmap.
+ * This must match the virtual address configured in
+ * head_32.S:setup_latteipc_bat().
+ */
+ latteipc_io_base = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE);
+
+ /* Assume a firmware is present, add hooks */
+ udbg_putc = latteipc_udbg_putc;
+
+ /*
+ * Prepare again the same BAT for MMU_init.
+ * This allows udbg I/O to continue working after the MMU is
+ * turned on for real.
+ * It is safe to continue using the same virtual address as it is
+ * a reserved fixmap area.
+ */
+ setbat(1, (unsigned long)latteipc_io_base, LT_MMIO_BASE, 128 * 1024,
+ PAGE_KERNEL_NCG);
+}
+
+#endif /* CONFIG_PPC_EARLY_DEBUG_LATTEIPC */
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.h b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
new file mode 100644
index 000000000000..ca6d34e49158
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.h
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#ifndef __LATTEIPC_UDBG_H
+#define __LATTEIPC_UDBG_H
+
+#ifdef CONFIG_LATTEIPC_UDBG
+
+void __init latteipc_udbg_init(void);
+
+#else
+
+static inline void __init latteipc_udbg_init(void)
+{
+}
+
+#endif /* CONFIG_LATTEIPC_UDBG */
+
+#endif /* __LATTEIPC_UDBG_H */
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 06/12] powerpc: wiiu: udbg support for latteipc
@ 2022-03-02 4:44 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, j.ne
Add support for using the Latte chipset IPC for udbg on the Nintendo Wii
U console.
These messages can then be received by a special firmware running on the
"Starbuck" coprocessor.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/Kconfig.debug | 9 ++
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/wiiu/Kconfig | 13 +++
arch/powerpc/platforms/wiiu/Makefile | 2 +
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 122 ++++++++++++++++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 +++++
8 files changed, 197 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 192f0ed0097f..15c7fa7c040a 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,15 @@ config PPC_EARLY_DEBUG_USBGECKO
Select this to enable early debugging for Nintendo GameCube/Wii
consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_LATTEIPC
+ bool "Early debugging through Latte chipset IPC"
+ depends on WIIU
+ select LATTEIPC_UDBG
+ help
+ Select this to enable early debugging for Nintendo Wii U consoles via
+ chipset IPC to the security coprocessor. This assumes a firmware is
+ running on the coprocessor to receive messages.
+
config PPC_EARLY_DEBUG_PS3GELIC
bool "Early debugging through the PS3 Ethernet port"
depends on PPC_PS3
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index 0ea9e70ed78b..82858c0283ac 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -53,6 +53,7 @@ extern void __init udbg_init_ehv_bc(void);
extern void __init udbg_init_ps3gelic(void);
extern void __init udbg_init_debug_opal_raw(void);
extern void __init udbg_init_debug_opal_hvsi(void);
+extern void __init udbg_init_latteipc(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 68e5c0a7e99d..f159e500342c 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -167,6 +167,9 @@ __after_mmu_off:
#ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO
bl setup_usbgecko_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+ bl setup_latteipc_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1206,4 +1209,21 @@ setup_usbgecko_bat:
blr
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+setup_latteipc_bat:
+ /* prepare a BAT for early io */
+ lis r8, 0x0d80
+
+ /*
+ * The virtual address used must match the virtual address
+ * associated to the fixmap entry FIX_EARLY_DEBUG_BASE.
+ */
+ lis r11, 0xfffe /* top 128K */
+ ori r8, r8, 0x002a /* uncached, guarded ,rw */
+ ori r11, r11, 0x2 /* 128K, Vs=1, Vp=0 */
+ mtspr SPRN_DBAT1L, r8
+ mtspr SPRN_DBAT1U, r11
+ blr
+#endif
+
.data
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index b1544b2f6321..84eae25c195e 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -67,6 +67,9 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_raw();
#elif defined(CONFIG_PPC_EARLY_DEBUG_OPAL_HVSI)
udbg_init_debug_opal_hvsi();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_LATTEIPC)
+ /* For use on Nintendo Wii U */
+ udbg_init_latteipc();
#endif
#ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index e5513205da3c..fa86cbc33d5e 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,3 +3,16 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+
+config LATTEIPC_UDBG
+ bool "Chipset IPC udbg console for the Nintendo Wii U"
+ depends on WIIU
+ help
+ If you say yes to this option, support will be included for the
+ Wii U's chipset IPC as a udbg console.
+ These IPC messages can be received by a firmware running on the
+ console's "Starbuck" security coprocessor.
+
+ This driver bypasses the IPC layer completely.
+
+ If in doubt, say N here.
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index f66554cd5c45..b1e0e1307f6e 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.c b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
new file mode 100644
index 000000000000..d546b3ba9bab
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.c
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#include <mm/mmu_decl.h>
+
+#include <linux/io.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/fixmap.h>
+
+#define LT_MMIO_BASE ((phys_addr_t)0x0d800000)
+#define LT_IPC_PPCMSG 0x00
+#define LT_IPC_PPCCTRL 0x04
+#define LT_IPC_PPCCTRL_X1 0x01
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+void __iomem *latteipc_io_base;
+
+/*
+ * Transmits a character.
+ * Sends over IPC to linux-loader for printing.
+ */
+static void latteipc_udbg_putc(char c)
+{
+ void __iomem *ppcmsg_reg = latteipc_io_base + LT_IPC_PPCMSG;
+ void __iomem *ppcctrl_reg = latteipc_io_base + LT_IPC_PPCCTRL;
+
+ out_be32(ppcmsg_reg, WIIU_LOADER_CMD_PRINT | (c << 16));
+ out_be32(ppcctrl_reg, LT_IPC_PPCCTRL_X1);
+
+ while (in_be32(ppcctrl_reg) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Retrieves and prepares the virtual address needed to access the hardware.
+ */
+static void __iomem *latteipc_udbg_setup_ipc_io_base(struct device_node *np)
+{
+ void __iomem *ipc_io_base = NULL;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ reg = of_get_property(np, "reg", NULL);
+ if (reg) {
+ paddr = of_translate_address(np, reg);
+ if (paddr)
+ ipc_io_base = ioremap(paddr, reg[1]);
+ }
+ return ipc_io_base;
+}
+
+/*
+ * Latte IPC udbg support initialization.
+ */
+void __init latteipc_udbg_init(void)
+{
+ struct device_node *np;
+ void __iomem *ipc_io_base;
+
+ if (latteipc_io_base)
+ udbg_printf("%s: early -> final\n", __func__);
+
+ np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
+ if (!np) {
+ udbg_printf("%s: IPC node not found\n", __func__);
+ goto out;
+ }
+
+ ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
+ if (!ipc_io_base) {
+ udbg_printf("%s: failed to setup IPC io base\n", __func__);
+ goto done;
+ }
+
+ udbg_putc = latteipc_udbg_putc;
+ udbg_printf("latteipc_udbg: ready\n");
+
+done:
+ of_node_put(np);
+out:
+ return;
+}
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+
+void __init udbg_init_latteipc(void)
+{
+ /*
+ * At this point we have a BAT already setup that enables I/O
+ * to the IPC hardware.
+ *
+ * The BAT uses a virtual address range reserved at the fixmap.
+ * This must match the virtual address configured in
+ * head_32.S:setup_latteipc_bat().
+ */
+ latteipc_io_base = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE);
+
+ /* Assume a firmware is present, add hooks */
+ udbg_putc = latteipc_udbg_putc;
+
+ /*
+ * Prepare again the same BAT for MMU_init.
+ * This allows udbg I/O to continue working after the MMU is
+ * turned on for real.
+ * It is safe to continue using the same virtual address as it is
+ * a reserved fixmap area.
+ */
+ setbat(1, (unsigned long)latteipc_io_base, LT_MMIO_BASE, 128 * 1024,
+ PAGE_KERNEL_NCG);
+}
+
+#endif /* CONFIG_PPC_EARLY_DEBUG_LATTEIPC */
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.h b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
new file mode 100644
index 000000000000..ca6d34e49158
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.h
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#ifndef __LATTEIPC_UDBG_H
+#define __LATTEIPC_UDBG_H
+
+#ifdef CONFIG_LATTEIPC_UDBG
+
+void __init latteipc_udbg_init(void);
+
+#else
+
+static inline void __init latteipc_udbg_init(void)
+{
+}
+
+#endif /* CONFIG_LATTEIPC_UDBG */
+
+#endif /* __LATTEIPC_UDBG_H */
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 07/12] powerpc: wiiu: espresso interrupt controller support
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:44 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, Roberto Van Eeden
Add support for the "Espresso" interrupt controller in the Nintendo Wii
U.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Makefile | 1 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 +++++++++++++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 +++++++
3 files changed, 243 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index b1e0e1307f6e..aabf4b43e806 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WIIU) += espresso-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.c b/arch/powerpc/platforms/wiiu/espresso-pic.c
new file mode 100644
index 000000000000..1aa5d88002d5
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on flipper-pic.c
+ * Copyright (C) 2004-2009 The GameCube Linux Team
+ * Copyright (C) 2007-2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "espresso-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include "espresso-pic.h"
+
+static DEFINE_PER_CPU(struct espresso_pic *, espresso_pic_cpu);
+
+/*
+ * IRQ chip operations
+ */
+
+static void espresso_pic_mask_and_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+}
+
+static void espresso_pic_mask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_unmask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ setbits32(&pic->imr, mask);
+}
+
+static struct irq_chip espresso_pic_chip = {
+ .name = "espresso-pic",
+ .irq_ack = espresso_pic_ack,
+ .irq_mask_ack = espresso_pic_mask_and_ack,
+ .irq_mask = espresso_pic_mask,
+ .irq_unmask = espresso_pic_unmask,
+};
+
+/*
+ * Domain Ops
+ */
+
+static int espresso_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("espresso-pic: %s IRQ matches with this driver\n",
+ node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int espresso_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &espresso_pic_chip,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &espresso_pic_chip, h->host_data);
+ }
+ return 0;
+}
+
+static void espresso_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops espresso_pic_ops = {
+ .match = espresso_pic_match,
+ .alloc = espresso_pic_alloc,
+ .free = espresso_pic_free,
+};
+
+/* Store irq domain for espresso_pic_get_irq (the function gets no arguments) */
+static struct irq_domain *espresso_irq_domain;
+
+unsigned int espresso_pic_get_irq(void)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 irq_status, irq;
+
+ irq_status = in_be32(&pic->icr) & in_be32(&pic->imr);
+
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* Return first IRQ */
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(espresso_irq_domain, irq);
+}
+
+void __init espresso_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,espresso-pic");
+ struct irq_domain *host;
+ struct resource res;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &res) != 0) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct espresso_pic **pic = per_cpu_ptr(&espresso_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct espresso_pic) * cpu);
+
+ /* Mask and Ack all IRQs */
+ out_be32(&(*pic)->imr, 0);
+ out_be32(&(*pic)->icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np, ESPRESSO_NR_IRQS, &espresso_pic_ops,
+ NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ /* Save irq domain for espresso_pic_get_irq */
+ espresso_irq_domain = host;
+
+ irq_set_default_host(host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.h b/arch/powerpc/platforms/wiiu/espresso-pic.h
new file mode 100644
index 000000000000..b5b4e44ad60e
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __ESPRESSO_PIC_H
+#define __ESPRESSO_PIC_H
+
+/*
+ * Instead of using COS custom IRQ remapping, the normal IRQ mapping is used:
+ *
+ * IRQ Description
+ * -------------------------------------------
+ * 0 Error
+ * 1 Unused
+ * 2 Unused
+ * 3 Audio Interface (TV)
+ * 4 Unused
+ * 5 DSP Accelerator
+ * 6 DSP
+ * 7 DSP DMA
+ * 8 Unused
+ * 9 Unused
+ * 10 GPIPPC (?)
+ * 11 Unused
+ * 12 Audio Interface (Gamepad)
+ * 13 I2C
+ * 14 Unused
+ * 15 Unused
+ * 16 Unused
+ * 17 Unused
+ * 18 Unused
+ * 19 Unused
+ * 20 Unused
+ * 21 Unused
+ * 22 Unused
+ * 23 GX2
+ * 24 Latte IRQ Controller
+ * 25 Unused
+ * 26 IPC (CPU2)
+ * 27 Unused
+ * 28 IPC (CPU1)
+ * 29 Unused
+ * 30 IPC (CPU0)
+ * 31 Unused
+ */
+
+struct espresso_pic {
+ __be32 icr; /* Triggered IRQs */
+ __be32 imr; /* Allowed IRQs */
+} __packed;
+
+#define ESPRESSO_NR_IRQS 32
+
+unsigned int espresso_pic_get_irq(void);
+void espresso_pic_init(void);
+
+#endif
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 07/12] powerpc: wiiu: espresso interrupt controller support
@ 2022-03-02 4:44 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, Roberto Van Eeden, j.ne
Add support for the "Espresso" interrupt controller in the Nintendo Wii
U.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Makefile | 1 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 +++++++++++++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 +++++++
3 files changed, 243 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index b1e0e1307f6e..aabf4b43e806 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WIIU) += espresso-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.c b/arch/powerpc/platforms/wiiu/espresso-pic.c
new file mode 100644
index 000000000000..1aa5d88002d5
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on flipper-pic.c
+ * Copyright (C) 2004-2009 The GameCube Linux Team
+ * Copyright (C) 2007-2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "espresso-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include "espresso-pic.h"
+
+static DEFINE_PER_CPU(struct espresso_pic *, espresso_pic_cpu);
+
+/*
+ * IRQ chip operations
+ */
+
+static void espresso_pic_mask_and_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+}
+
+static void espresso_pic_mask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_unmask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ setbits32(&pic->imr, mask);
+}
+
+static struct irq_chip espresso_pic_chip = {
+ .name = "espresso-pic",
+ .irq_ack = espresso_pic_ack,
+ .irq_mask_ack = espresso_pic_mask_and_ack,
+ .irq_mask = espresso_pic_mask,
+ .irq_unmask = espresso_pic_unmask,
+};
+
+/*
+ * Domain Ops
+ */
+
+static int espresso_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("espresso-pic: %s IRQ matches with this driver\n",
+ node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int espresso_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &espresso_pic_chip,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &espresso_pic_chip, h->host_data);
+ }
+ return 0;
+}
+
+static void espresso_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops espresso_pic_ops = {
+ .match = espresso_pic_match,
+ .alloc = espresso_pic_alloc,
+ .free = espresso_pic_free,
+};
+
+/* Store irq domain for espresso_pic_get_irq (the function gets no arguments) */
+static struct irq_domain *espresso_irq_domain;
+
+unsigned int espresso_pic_get_irq(void)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 irq_status, irq;
+
+ irq_status = in_be32(&pic->icr) & in_be32(&pic->imr);
+
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* Return first IRQ */
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(espresso_irq_domain, irq);
+}
+
+void __init espresso_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,espresso-pic");
+ struct irq_domain *host;
+ struct resource res;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &res) != 0) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct espresso_pic **pic = per_cpu_ptr(&espresso_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct espresso_pic) * cpu);
+
+ /* Mask and Ack all IRQs */
+ out_be32(&(*pic)->imr, 0);
+ out_be32(&(*pic)->icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np, ESPRESSO_NR_IRQS, &espresso_pic_ops,
+ NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ /* Save irq domain for espresso_pic_get_irq */
+ espresso_irq_domain = host;
+
+ irq_set_default_host(host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.h b/arch/powerpc/platforms/wiiu/espresso-pic.h
new file mode 100644
index 000000000000..b5b4e44ad60e
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __ESPRESSO_PIC_H
+#define __ESPRESSO_PIC_H
+
+/*
+ * Instead of using COS custom IRQ remapping, the normal IRQ mapping is used:
+ *
+ * IRQ Description
+ * -------------------------------------------
+ * 0 Error
+ * 1 Unused
+ * 2 Unused
+ * 3 Audio Interface (TV)
+ * 4 Unused
+ * 5 DSP Accelerator
+ * 6 DSP
+ * 7 DSP DMA
+ * 8 Unused
+ * 9 Unused
+ * 10 GPIPPC (?)
+ * 11 Unused
+ * 12 Audio Interface (Gamepad)
+ * 13 I2C
+ * 14 Unused
+ * 15 Unused
+ * 16 Unused
+ * 17 Unused
+ * 18 Unused
+ * 19 Unused
+ * 20 Unused
+ * 21 Unused
+ * 22 Unused
+ * 23 GX2
+ * 24 Latte IRQ Controller
+ * 25 Unused
+ * 26 IPC (CPU2)
+ * 27 Unused
+ * 28 IPC (CPU1)
+ * 29 Unused
+ * 30 IPC (CPU0)
+ * 31 Unused
+ */
+
+struct espresso_pic {
+ __be32 icr; /* Triggered IRQs */
+ __be32 imr; /* Allowed IRQs */
+} __packed;
+
+#define ESPRESSO_NR_IRQS 32
+
+unsigned int espresso_pic_get_irq(void);
+void espresso_pic_init(void);
+
+#endif
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 08/12] powerpc: wiiu: latte interrupt controller support
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:44 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, Roberto Van Eeden
Add support for the "Latte" interrupt controller in the Nintendo Wii U.
This controller is used for the entire SoC and is wired to a cascade
interrupt on the Espresso controller.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Kconfig | 1 +
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 +++
4 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index fa86cbc33d5e..5e062536ca58 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,6 +3,7 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+ select IRQ_DOMAIN_HIERARCHY
config LATTEIPC_UDBG
bool "Chipset IPC udbg console for the Nintendo Wii U"
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index aabf4b43e806..fa16c60261e6 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o
+obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.c b/arch/powerpc/platforms/wiiu/latte-pic.c
new file mode 100644
index 000000000000..d16e0c2de2b0
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.c
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Latte" interrupt controller support.
+ * This is the controller for all the SoC devices, and has a cascade interrupt for the Espresso
+ * CPU interrupt controller.
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on hlwd-pic.c
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "latte-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/io.h>
+#include "latte-pic.h"
+
+static DEFINE_PER_CPU(struct lt_pic *, lt_pic_cpu);
+
+/*
+ * IRQ chip operations
+ * These handle both AHBALL and AHBLT IRQs, with AHBLT mapped above 32
+ */
+
+static void latte_pic_mask_and_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ }
+}
+
+static void latte_pic_mask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_unmask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ setbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ setbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static struct irq_chip latte_pic = {
+ .name = "latte-pic",
+ .irq_ack = latte_pic_ack,
+ .irq_mask_ack = latte_pic_mask_and_ack,
+ .irq_mask = latte_pic_mask,
+ .irq_unmask = latte_pic_unmask,
+};
+
+/*
+ * Domain ops
+ */
+
+static int latte_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("%s IRQ matches with this driver\n", node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int latte_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &latte_pic,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &latte_pic, h->host_data);
+ }
+ return 0;
+}
+
+static void latte_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops latte_pic_ops = {
+ .match = latte_pic_match,
+ .alloc = latte_pic_alloc,
+ .free = latte_pic_free,
+};
+
+/*
+ * Determinate if there are interrupts pending
+ * Checks AHBALL (0-32) and AHBLT (32-64)
+ */
+unsigned int latte_pic_get_irq(struct irq_domain *h)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq_status, irq;
+
+ /* Check AHBALL first */
+ irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
+
+ if (irq_status == 0) {
+ /* Try AHBLT */
+ irq_status =
+ in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
+ irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
+ return irq_linear_revmap(h, irq);
+ }
+
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(h, irq);
+}
+
+/*
+ * Cascade IRQ handler
+ */
+static void latte_irq_cascade(struct irq_desc *desc)
+{
+ struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virq;
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
+ raw_spin_unlock(&desc->lock);
+
+ virq = latte_pic_get_irq(irq_domain);
+ if (virq)
+ generic_handle_irq(virq);
+ else
+ pr_err("spurious interrupt!\n");
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
+ if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
+ chip->irq_unmask(&desc->irq_data);
+ raw_spin_unlock(&desc->lock);
+}
+
+void __init latte_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,latte-pic");
+ struct irq_domain *host;
+ struct resource res;
+ int irq_cascade;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+ if (!of_get_property(np, "interrupts", NULL)) {
+ pr_err("could not find cascade interrupt!\n");
+ goto out;
+ }
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct lt_pic **pic = per_cpu_ptr(<_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct lt_pic) * cpu);
+
+ /* Mask and Ack CPU IRQs */
+ out_be32(&(*pic)->ahball_imr, 0);
+ out_be32(&(*pic)->ahball_icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np,
+ LATTE_AHBALL_NR_IRQS + LATTE_AHBLT_NR_IRQS,
+ &latte_pic_ops, NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ irq_cascade = irq_of_parse_and_map(np, 0);
+ irq_set_chained_handler_and_data(irq_cascade, latte_irq_cascade, host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.h b/arch/powerpc/platforms/wiiu/latte-pic.h
new file mode 100644
index 000000000000..7021d9497d35
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Latte" interrupt controller support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __LATTE_PIC_H
+#define __LATTE_PIC_H
+
+struct lt_pic {
+ __be32 ahball_icr; /* Triggered AHB IRQs (all) */
+ __be32 ahblt_icr; /* Triggered AHB IRQs (latte only) */
+ __be32 ahball_imr; /* Allowed AHB IRQs (all) */
+ __be32 ahblt_imr; /* Allowed AHB IRQs (latte only) */
+} __packed;
+
+#define LATTE_AHBALL_NR_IRQS 32
+#define LATTE_AHBLT_NR_IRQS 32
+
+void latte_pic_init(void);
+
+#endif
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 08/12] powerpc: wiiu: latte interrupt controller support
@ 2022-03-02 4:44 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, Roberto Van Eeden, j.ne
Add support for the "Latte" interrupt controller in the Nintendo Wii U.
This controller is used for the entire SoC and is wired to a cascade
interrupt on the Espresso controller.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Kconfig | 1 +
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 +++
4 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index fa86cbc33d5e..5e062536ca58 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,6 +3,7 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+ select IRQ_DOMAIN_HIERARCHY
config LATTEIPC_UDBG
bool "Chipset IPC udbg console for the Nintendo Wii U"
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index aabf4b43e806..fa16c60261e6 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o
+obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.c b/arch/powerpc/platforms/wiiu/latte-pic.c
new file mode 100644
index 000000000000..d16e0c2de2b0
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.c
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Latte" interrupt controller support.
+ * This is the controller for all the SoC devices, and has a cascade interrupt for the Espresso
+ * CPU interrupt controller.
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on hlwd-pic.c
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "latte-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/io.h>
+#include "latte-pic.h"
+
+static DEFINE_PER_CPU(struct lt_pic *, lt_pic_cpu);
+
+/*
+ * IRQ chip operations
+ * These handle both AHBALL and AHBLT IRQs, with AHBLT mapped above 32
+ */
+
+static void latte_pic_mask_and_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ }
+}
+
+static void latte_pic_mask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_unmask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ setbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ setbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static struct irq_chip latte_pic = {
+ .name = "latte-pic",
+ .irq_ack = latte_pic_ack,
+ .irq_mask_ack = latte_pic_mask_and_ack,
+ .irq_mask = latte_pic_mask,
+ .irq_unmask = latte_pic_unmask,
+};
+
+/*
+ * Domain ops
+ */
+
+static int latte_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("%s IRQ matches with this driver\n", node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int latte_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &latte_pic,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &latte_pic, h->host_data);
+ }
+ return 0;
+}
+
+static void latte_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops latte_pic_ops = {
+ .match = latte_pic_match,
+ .alloc = latte_pic_alloc,
+ .free = latte_pic_free,
+};
+
+/*
+ * Determinate if there are interrupts pending
+ * Checks AHBALL (0-32) and AHBLT (32-64)
+ */
+unsigned int latte_pic_get_irq(struct irq_domain *h)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq_status, irq;
+
+ /* Check AHBALL first */
+ irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
+
+ if (irq_status == 0) {
+ /* Try AHBLT */
+ irq_status =
+ in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
+ irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
+ return irq_linear_revmap(h, irq);
+ }
+
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(h, irq);
+}
+
+/*
+ * Cascade IRQ handler
+ */
+static void latte_irq_cascade(struct irq_desc *desc)
+{
+ struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virq;
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
+ raw_spin_unlock(&desc->lock);
+
+ virq = latte_pic_get_irq(irq_domain);
+ if (virq)
+ generic_handle_irq(virq);
+ else
+ pr_err("spurious interrupt!\n");
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
+ if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
+ chip->irq_unmask(&desc->irq_data);
+ raw_spin_unlock(&desc->lock);
+}
+
+void __init latte_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,latte-pic");
+ struct irq_domain *host;
+ struct resource res;
+ int irq_cascade;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+ if (!of_get_property(np, "interrupts", NULL)) {
+ pr_err("could not find cascade interrupt!\n");
+ goto out;
+ }
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct lt_pic **pic = per_cpu_ptr(<_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct lt_pic) * cpu);
+
+ /* Mask and Ack CPU IRQs */
+ out_be32(&(*pic)->ahball_imr, 0);
+ out_be32(&(*pic)->ahball_icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np,
+ LATTE_AHBALL_NR_IRQS + LATTE_AHBLT_NR_IRQS,
+ &latte_pic_ops, NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ irq_cascade = irq_of_parse_and_map(np, 0);
+ irq_set_chained_handler_and_data(irq_cascade, latte_irq_cascade, host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.h b/arch/powerpc/platforms/wiiu/latte-pic.h
new file mode 100644
index 000000000000..7021d9497d35
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Latte" interrupt controller support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __LATTE_PIC_H
+#define __LATTE_PIC_H
+
+struct lt_pic {
+ __be32 ahball_icr; /* Triggered AHB IRQs (all) */
+ __be32 ahblt_icr; /* Triggered AHB IRQs (latte only) */
+ __be32 ahball_imr; /* Allowed AHB IRQs (all) */
+ __be32 ahblt_imr; /* Allowed AHB IRQs (latte only) */
+} __packed;
+
+#define LATTE_AHBALL_NR_IRQS 32
+#define LATTE_AHBLT_NR_IRQS 32
+
+void latte_pic_init(void);
+
+#endif
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 09/12] powerpc: espresso processor support
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:44 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, Roberto Van Eeden
From: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Adds a cputable entry for the "Espresso" processor found on the Nintendo
Wii U, which has a PVR unrelated to other 750CL-like chips.
Only this revision has been seen in the wild.
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/kernel/cputable.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index ae0fdef0ac11..b575f5570485 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -718,6 +718,22 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform = "ppc750",
.oprofile_cpu_type = "ppc/750",
},
+ { /* "Espresso" (750CL-like) */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x70010201,
+ .cpu_name = "Espresso",
+ .cpu_features = CPU_FTRS_750CL,
+ .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
+ .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_750,
+ .machine_check = machine_check_generic,
+ .platform = "ppc750",
+ .oprofile_cpu_type = "ppc/750",
+ },
{ /* 745/755 */
.pvr_mask = 0xfffff000,
.pvr_value = 0x00083000,
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 09/12] powerpc: espresso processor support
@ 2022-03-02 4:44 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, Roberto Van Eeden, j.ne
From: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Adds a cputable entry for the "Espresso" processor found on the Nintendo
Wii U, which has a PVR unrelated to other 750CL-like chips.
Only this revision has been seen in the wild.
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/kernel/cputable.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index ae0fdef0ac11..b575f5570485 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -718,6 +718,22 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform = "ppc750",
.oprofile_cpu_type = "ppc/750",
},
+ { /* "Espresso" (750CL-like) */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x70010201,
+ .cpu_name = "Espresso",
+ .cpu_features = CPU_FTRS_750CL,
+ .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
+ .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_750,
+ .machine_check = machine_check_generic,
+ .platform = "ppc750",
+ .oprofile_cpu_type = "ppc/750",
+ },
{ /* 745/755 */
.pvr_mask = 0xfffff000,
.pvr_value = 0x00083000,
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 10/12] powerpc: wiiu: platform support
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:44 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, Roberto Van Eeden, Emmanuel Gil Peyrot
Add platform support for the Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/setup.c | 67 ++++++++++++++++++++++++++++
2 files changed, 68 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index fa16c60261e6..abcb7a1beebf 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
+obj-$(CONFIG_WIIU) += setup.o espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/setup.c b/arch/powerpc/platforms/wiiu/setup.c
new file mode 100644
index 000000000000..279fa899a296
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/setup.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U board-specific support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+#define DRV_MODULE_NAME "wiiu"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "espresso-pic.h"
+#include "latte-pic.h"
+#include "udbg_latteipc.h"
+
+static int __init wiiu_probe(void)
+{
+ if (!of_machine_is_compatible("nintendo,wiiu"))
+ return 0;
+
+ latteipc_udbg_init();
+
+ return 1;
+}
+
+static void __noreturn wiiu_halt(void)
+{
+ for (;;)
+ cpu_relax();
+}
+
+static void __init wiiu_init_irq(void)
+{
+ espresso_pic_init();
+ latte_pic_init();
+}
+
+static const struct of_device_id wiiu_of_bus[] = {
+ {
+ .compatible = "nintendo,latte",
+ },
+ {},
+};
+
+static int __init wiiu_device_probe(void)
+{
+ if (!machine_is(wiiu))
+ return 0;
+
+ of_platform_populate(NULL, wiiu_of_bus, NULL, NULL);
+ return 0;
+}
+device_initcall(wiiu_device_probe);
+
+define_machine(wiiu) {
+ .name = "wiiu",
+ .probe = wiiu_probe,
+ .halt = wiiu_halt,
+ .progress = udbg_progress,
+ .calibrate_decr = generic_calibrate_decr,
+ .init_IRQ = wiiu_init_irq,
+ .get_irq = espresso_pic_get_irq,
+};
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 10/12] powerpc: wiiu: platform support
@ 2022-03-02 4:44 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: Emmanuel Gil Peyrot, linuxppc-dev, linux-kernel, Roberto Van Eeden, j.ne
Add platform support for the Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/setup.c | 67 ++++++++++++++++++++++++++++
2 files changed, 68 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index fa16c60261e6..abcb7a1beebf 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
+obj-$(CONFIG_WIIU) += setup.o espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/setup.c b/arch/powerpc/platforms/wiiu/setup.c
new file mode 100644
index 000000000000..279fa899a296
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/setup.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U board-specific support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+#define DRV_MODULE_NAME "wiiu"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "espresso-pic.h"
+#include "latte-pic.h"
+#include "udbg_latteipc.h"
+
+static int __init wiiu_probe(void)
+{
+ if (!of_machine_is_compatible("nintendo,wiiu"))
+ return 0;
+
+ latteipc_udbg_init();
+
+ return 1;
+}
+
+static void __noreturn wiiu_halt(void)
+{
+ for (;;)
+ cpu_relax();
+}
+
+static void __init wiiu_init_irq(void)
+{
+ espresso_pic_init();
+ latte_pic_init();
+}
+
+static const struct of_device_id wiiu_of_bus[] = {
+ {
+ .compatible = "nintendo,latte",
+ },
+ {},
+};
+
+static int __init wiiu_device_probe(void)
+{
+ if (!machine_is(wiiu))
+ return 0;
+
+ of_platform_populate(NULL, wiiu_of_bus, NULL, NULL);
+ return 0;
+}
+device_initcall(wiiu_device_probe);
+
+define_machine(wiiu) {
+ .name = "wiiu",
+ .probe = wiiu_probe,
+ .halt = wiiu_halt,
+ .progress = udbg_progress,
+ .calibrate_decr = generic_calibrate_decr,
+ .init_IRQ = wiiu_init_irq,
+ .get_irq = espresso_pic_get_irq,
+};
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:44 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne
pgtable_32.c:mapin_ram loops over each valid memory range, which means
non-contiguous memory just works.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/mm/init_32.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 3d690be48e84..59a84629d9a0 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -125,10 +125,10 @@ void __init MMU_init(void)
* lowmem_end_addr is initialized below.
*/
if (memblock.memory.cnt > 1) {
-#ifndef CONFIG_WII
+#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
memblock_enforce_memory_limit(memblock.memory.regions[0].size);
pr_warn("Only using first contiguous memory region\n");
-#else
+#elif defined(CONFIG_WII)
wii_memory_fixups();
#endif
}
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-03-02 4:44 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, j.ne
pgtable_32.c:mapin_ram loops over each valid memory range, which means
non-contiguous memory just works.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/mm/init_32.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 3d690be48e84..59a84629d9a0 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -125,10 +125,10 @@ void __init MMU_init(void)
* lowmem_end_addr is initialized below.
*/
if (memblock.memory.cnt > 1) {
-#ifndef CONFIG_WII
+#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
memblock_enforce_memory_limit(memblock.memory.regions[0].size);
pr_warn("Only using first contiguous memory region\n");
-#else
+#elif defined(CONFIG_WII)
wii_memory_fixups();
#endif
}
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 12/12] powerpc: wiiu: Add minimal default config
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 4:44 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne
Add a bare-minimum config to get a kernel compiled. Will need some more
interesting options once a storage device to boot from is added.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/configs/wiiu_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/powerpc/configs/wiiu_defconfig
diff --git a/arch/powerpc/configs/wiiu_defconfig b/arch/powerpc/configs/wiiu_defconfig
new file mode 100644
index 000000000000..a761ebcdd9f2
--- /dev/null
+++ b/arch/powerpc/configs/wiiu_defconfig
@@ -0,0 +1,7 @@
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_WIIU=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_HIGHMEM=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_PPC_EARLY_DEBUG=y
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH 12/12] powerpc: wiiu: Add minimal default config
@ 2022-03-02 4:44 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-02 4:44 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linuxppc-dev, linux-kernel, j.ne
Add a bare-minimum config to get a kernel compiled. Will need some more
interesting options once a storage device to boot from is added.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/configs/wiiu_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/powerpc/configs/wiiu_defconfig
diff --git a/arch/powerpc/configs/wiiu_defconfig b/arch/powerpc/configs/wiiu_defconfig
new file mode 100644
index 000000000000..a761ebcdd9f2
--- /dev/null
+++ b/arch/powerpc/configs/wiiu_defconfig
@@ -0,0 +1,7 @@
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_WIIU=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_HIGHMEM=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_PPC_EARLY_DEBUG=y
--
2.35.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* Re: [PATCH 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 13:28 ` Rob Herring
-1 siblings, 0 replies; 170+ messages in thread
From: Rob Herring @ 2022-03-02 13:28 UTC (permalink / raw)
To: Ash Logan
Cc: Paul Mackerras, Michael Ellerman, Christophe Leroy,
Benjamin Herrenschmidt, linux-kernel, linuxppc-dev,
Jonathan Neuschäfer
On Tue, Mar 1, 2022 at 10:44 PM Ash Logan <ash@heyquark.com> wrote:
>
> Adds schema for the various Wii U devicetree nodes used.
Please resend to the DT list if you want this reviewed and so that checks run.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> .../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
> 8 files changed, 300 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> new file mode 100644
> index 000000000000..5824b07928f5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> @@ -0,0 +1,28 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U bindings
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U video game console binding.
> +
> +properties:
> + $nodename:
> + const: "/"
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U video game console
> + items:
> + - const: nintendo,wiiu
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> new file mode 100644
> index 000000000000..878a81595f5f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U "Espresso" interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U "Espresso" interrupt controller
> + items:
> + - const: nintendo,espresso-pic
> + '#interrupt-cells':
> + # Interrupt numbers 0-32 in one cell
> + const: 1
> + interrupt-controller: true
> + reg:
> + items:
> + - description: Core registers
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + espresso_pic: pic@c000078 {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> new file mode 100644
> index 000000000000..e54d49015f36
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte "GPU7" graphics processor
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
> + Nintendo Wii U.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte "GPU7" graphics processor
> + items:
> + - const: nintendo,latte-gpu7
> + reg:
> + items:
> + - description: GpuF0MMReg registers
> + interrupts:
> + items:
> + - description: Main interrupt, connected via Espresso PIC
> +
> +# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
> +additionalProperties: true
> +
> +examples:
> + - |
> + gpu7@c200000 {
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> new file mode 100644
> index 000000000000..7b9de4effcb0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte AHCI controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte AHCI controller
> + items:
> + - const: nintendo,latte-ahci
> + reg:
> + items:
> + - description: |
> + HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
> + registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
> + interrupts:
> + items:
> + - description: Main HBA interrupt
> + - description: Vendor debugging interrupt
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sata: ahci@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x408>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38>, <28>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> new file mode 100644
> index 000000000000..ed0b4c28ce48
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte DSP
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U digital signal processor, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte DSP
> + items:
> + - const: nintendo,latte-dsp
> + reg:
> + items:
> + - description: DSP registers
> +
> +# Once more is known about this device more properties will likely be added
> +additionalProperties: true
> +
> +examples:
> + - |
> + latte_dsp: dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> new file mode 100644
> index 000000000000..a2df71fb9964
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte interrupt controller
> + items:
> + - const: nintendo,latte-pic
> + '#interrupt-cells':
> + # Interrupt numbers 0-64 in one cell.
> + const: 1
> + interrupt-controller: true
> + reg:
> + items:
> + - description: Core registers
> + interrupts:
> + items:
> + - description: Cascade interrupt for Espresso PIC
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + latte_pic: pic@d800440 {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,latte-pic";
> + reg = <0x0d800440 0x30>;
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> new file mode 100644
> index 000000000000..4b9b0820edc1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte SD Host controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte SDHCI
> + items:
> + - const: nintendo,latte-sdhci
> + - const: sdhci
> + reg:
> + items:
> + - description: Core registers
> + interrupts:
> + items:
> + - description: SDHCI interrupt
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sdcard_0: sdhci@d070000 {
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> new file mode 100644
> index 000000000000..6ae86d198fa3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> @@ -0,0 +1,25 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Latte system bus
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U "Latte" SoC
> + items:
> + - const: nintendo,latte
> +
> +additionalProperties: true
> +
> +...
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2022-03-02 13:28 ` Rob Herring
0 siblings, 0 replies; 170+ messages in thread
From: Rob Herring @ 2022-03-02 13:28 UTC (permalink / raw)
To: Ash Logan
Cc: linux-kernel, Paul Mackerras, linuxppc-dev, Jonathan Neuschäfer
On Tue, Mar 1, 2022 at 10:44 PM Ash Logan <ash@heyquark.com> wrote:
>
> Adds schema for the various Wii U devicetree nodes used.
Please resend to the DT list if you want this reviewed and so that checks run.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> .../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
> 8 files changed, 300 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> new file mode 100644
> index 000000000000..5824b07928f5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> @@ -0,0 +1,28 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U bindings
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U video game console binding.
> +
> +properties:
> + $nodename:
> + const: "/"
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U video game console
> + items:
> + - const: nintendo,wiiu
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> new file mode 100644
> index 000000000000..878a81595f5f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U "Espresso" interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U "Espresso" interrupt controller
> + items:
> + - const: nintendo,espresso-pic
> + '#interrupt-cells':
> + # Interrupt numbers 0-32 in one cell
> + const: 1
> + interrupt-controller: true
> + reg:
> + items:
> + - description: Core registers
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + espresso_pic: pic@c000078 {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> new file mode 100644
> index 000000000000..e54d49015f36
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte "GPU7" graphics processor
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
> + Nintendo Wii U.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte "GPU7" graphics processor
> + items:
> + - const: nintendo,latte-gpu7
> + reg:
> + items:
> + - description: GpuF0MMReg registers
> + interrupts:
> + items:
> + - description: Main interrupt, connected via Espresso PIC
> +
> +# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
> +additionalProperties: true
> +
> +examples:
> + - |
> + gpu7@c200000 {
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> new file mode 100644
> index 000000000000..7b9de4effcb0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte AHCI controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte AHCI controller
> + items:
> + - const: nintendo,latte-ahci
> + reg:
> + items:
> + - description: |
> + HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
> + registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
> + interrupts:
> + items:
> + - description: Main HBA interrupt
> + - description: Vendor debugging interrupt
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sata: ahci@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x408>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38>, <28>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> new file mode 100644
> index 000000000000..ed0b4c28ce48
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte DSP
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U digital signal processor, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte DSP
> + items:
> + - const: nintendo,latte-dsp
> + reg:
> + items:
> + - description: DSP registers
> +
> +# Once more is known about this device more properties will likely be added
> +additionalProperties: true
> +
> +examples:
> + - |
> + latte_dsp: dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> new file mode 100644
> index 000000000000..a2df71fb9964
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte interrupt controller
> + items:
> + - const: nintendo,latte-pic
> + '#interrupt-cells':
> + # Interrupt numbers 0-64 in one cell.
> + const: 1
> + interrupt-controller: true
> + reg:
> + items:
> + - description: Core registers
> + interrupts:
> + items:
> + - description: Cascade interrupt for Espresso PIC
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + latte_pic: pic@d800440 {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,latte-pic";
> + reg = <0x0d800440 0x30>;
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> new file mode 100644
> index 000000000000..4b9b0820edc1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte SD Host controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte SDHCI
> + items:
> + - const: nintendo,latte-sdhci
> + - const: sdhci
> + reg:
> + items:
> + - description: Core registers
> + interrupts:
> + items:
> + - description: SDHCI interrupt
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sdcard_0: sdhci@d070000 {
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> new file mode 100644
> index 000000000000..6ae86d198fa3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> @@ -0,0 +1,25 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Latte system bus
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U "Latte" SoC
> + items:
> + - const: nintendo,latte
> +
> +additionalProperties: true
> +
> +...
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 02/12] powerpc: wiiu: device tree
2022-03-02 4:43 ` Ash Logan
@ 2022-03-02 13:36 ` Rob Herring
-1 siblings, 0 replies; 170+ messages in thread
From: Rob Herring @ 2022-03-02 13:36 UTC (permalink / raw)
To: Ash Logan
Cc: Paul Mackerras, Michael Ellerman, Christophe Leroy,
Benjamin Herrenschmidt, linux-kernel, linuxppc-dev,
Jonathan Neuschäfer, Roberto Van Eeden, Emmanuel Gil Peyrot
On Tue, Mar 1, 2022 at 10:44 PM Ash Logan <ash@heyquark.com> wrote:
>
> Add a device tree source file for the Nintendo Wii U video game console.
Test this with 'make W=1 dtbs_checks'.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
> Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
> Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> ---
> arch/powerpc/boot/dts/wiiu.dts | 327 +++++++++++++++++++++++++++++++++
> 1 file changed, 327 insertions(+)
> create mode 100644 arch/powerpc/boot/dts/wiiu.dts
>
> diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
> new file mode 100644
> index 000000000000..aaf264963f61
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/wiiu.dts
> @@ -0,0 +1,327 @@
> +// SPDX-License-Identifier: GPL-2.0
What about non-GPL environments?
> +/*
> + * Nintendo Wii U Device Tree Source
> + *
> + * Copyright (C) 2022 The linux-wiiu Team
> + */
> +
> +/dts-v1/;
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "nintendo,wiiu";
> + compatible = "nintendo,wiiu";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen {
> + bootargs = "root=/dev/sda1 rootwait";
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
> + 0x08000000 0x00300000 /* MEM0 - 3MiB */
> + 0x10000000 0x80000000>; /* MEM2 - 2GiB */
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* TODO: Add SMP */
> + PowerPC,espresso@0 {
> + device_type = "cpu";
> + reg = <0>;
> + clock-frequency = <1243125000>; /* 1.243125GHz */
> + bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
> + timebase-frequency = <62156250>; /* 1/4 of the bus clock */
> + i-cache-size = <32768>; /* 32K icache */
> + i-cache-line-size = <32>;
> + i-cache-block-size = <32>;
> + i-cache-sets = <128>;
> + d-cache-size = <32768>; /* 32K dcache */
> + d-cache-line-size = <32>;
> + d-cache-block-size = <32>;
> + d-cache-sets = <128>;
> + next-level-cache = <&L2_0>;
> + L2_0:l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + cache-unified;
> + cache-size = <0x80000>; /* 512KB L2 */
> + cache-line-size = <64>;
> + cache-block-size = <32>;
> + cache-sets = <2048>;
> + };
> + };
> + };
> +
> + latte {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "nintendo,latte";
> + ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
> + 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
> + 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
> +
> + gpu7@c200000 {
gpu@...
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +
> + espresso_pic: pic@c000078 {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + };
> +
> + latte_dsp: dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +
> + ehci_0: usb@d040000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d040000 0x100>;
> + interrupts = <4>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_0_0: usb@d050000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d050000 0x100>;
> + interrupts = <5>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ohci_0_1: usb@d060000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d060000 0x100>;
> + interrupts = <6>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ehci_1: usb@d120000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d120000 0x100>;
> + interrupts = <16>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_1_0: usb@d130000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d130000 0x100>;
> + interrupts = <35>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ehci_2: usb@d140000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d140000 0x100>;
> + interrupts = <36>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_2_0: usb@d150000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d150000 0x100>;
> + interrupts = <37>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + sdcard_0: sdhci@d070000 {
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + wifi_0: sdhci@d080000 {
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d080000 0x200>;
> + interrupts = <8>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + legacy_ipc: ipc@d800000 {
> + compatible = "nintendo,latte-ipc","nintendo,hollywood-ipc";
space between compatibles needed.
> + reg = <0x0d800000 0x10>;
> + interrupts = <30 31>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + latte_otp: otp@d8001ec {
> + compatible = "nintendo,latte-otp";
> + reg = <0x0d8001ec 0x8>;
> + };
> +
> + sata: ahci@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x808>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38 28>;
> + };
> +
> + latte_pic: pic@d800440 {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,latte-pic";
> + reg = <0x0d800440 0x30>;
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +
> + gpio: gpio@d8000c0 {
> + #gpio-cells = <2>;
> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
> +
> + reg = <0x0d8000c0 0x40>;
> + gpio-controller;
> + /* TODO: There are actually 31 AHBALL GPIOs */
> + ngpios = <24>;
> +
> + gpio-line-names =
> + "POWER", "DWIFI", "FAN", "DC_DC",
> + "", "Esp10WorkAround", "", "",
> + "PADPD", "", "EEP_CS", "EEP_CLK",
> + "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
> + "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
> + "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <10>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + spi_gpio: spi-gpio {
Move this to root level. It's not on the 'latte' bus.
> + compatible = "spi-gpio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
Not needed, that's the default.
> +
> + cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
> + gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
> + gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
> + gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
> + num-chipselects = <1>;
> +
> + seeprom@0 {
eeprom@0
> + compatible = "atmel,at93c66";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + spi-cs-high;
> + /* TODO: wiiubrew says this is 16-bit, but I only get the correct
> + * values in 8-bit...
> + */
> + data-size = <8>;
> + read-only;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
> + rng_seed: rng@12 { reg = <0x012 8>; };
> + ppc_pvr: pvr@20 { reg = <0x020 4>; };
> + seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
> + seeprom_ver: sver@2a { reg = <0x02A 2>; };
> + otp_ver: over@2c { reg = <0x02C 2>; };
> + otp_rev: orev@2e { reg = <0x02E 2>; };
> + otp_ver_str: over-str@30 { reg = <0x030 8>; };
> +
> + bc_crc: bc-crc@38 { reg = <0x038 4>; };
> + bc_sz: bc-sz@3c { reg = <0x03C 2>; };
> + bc_ver: bc-ver@3e { reg = <0x03E 2>; };
> + bc_boardtype: boardtype@42 { reg = <0x042 2>; };
> + bc_boardrev: boardrev@44 { reg = <0x044 2>; };
> + bc_bootsource: bootsource@46 { reg = <0x046 2>; };
> + bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
> + bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
> + bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
> + bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
> + bc_video1080p: video1080p@50 { reg = <0x050 2>; };
> + bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
> + bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
> + bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
> + bc_satadevice: satadevice@58 { reg = <0x058 2>; };
> + bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
> + bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
> +
> + drive_key: drvkey@80 { reg = <0x080 16>; };
> + factory_key: fackey@90 { reg = <0x090 16>; };
> + shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
> + usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
> + drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
> + usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
> + shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
> +
> + sysprod_version: sp_ver@140 { reg = <0x140 4>; };
> + sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
> + sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
> + sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
> + sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
> + sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
> + sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
> + sysprod_code: sp_code@158 { reg = <0x158 8>; };
> + sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
> + sysprod_model: sp_model@170 { reg = <0x170 16>; };
> +
> + prod_year: pyear@188 { reg = <0x188 2>; };
> + prod_date: pdate@18a { reg = <0x18A 2>; };
> + prod_time: ptime@18c { reg = <0x18C 2>; };
> +
> + boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
> + };
> + };
> +
> + /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
> + gpio-keys-polled {
This too.
> + poll-interval = <50>;
> + compatible = "gpio-keys-polled";
> +
> + power {
> + label = "Power Button";
> + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
> + linux,code = <KEY_POWER>;
> + };
> + };
> +
> + gpio2: gpio2@d8000c0 {
gpio@d800520
> + #gpio-cells = <2>;
> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
> +
> + reg = <0x0d800520 0x40>;
> + gpio-controller;
> + ngpios = <7>;
> +
> + gpio-line-names =
> + "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
> + "AVE_INT", "", "AVE_RESET";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <10>;
> + interrupt-parent = <&latte_pic>;
> + };
> + };
> +};
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 02/12] powerpc: wiiu: device tree
@ 2022-03-02 13:36 ` Rob Herring
0 siblings, 0 replies; 170+ messages in thread
From: Rob Herring @ 2022-03-02 13:36 UTC (permalink / raw)
To: Ash Logan
Cc: Emmanuel Gil Peyrot, linux-kernel, Paul Mackerras,
Roberto Van Eeden, linuxppc-dev, Jonathan Neuschäfer
On Tue, Mar 1, 2022 at 10:44 PM Ash Logan <ash@heyquark.com> wrote:
>
> Add a device tree source file for the Nintendo Wii U video game console.
Test this with 'make W=1 dtbs_checks'.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
> Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
> Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> ---
> arch/powerpc/boot/dts/wiiu.dts | 327 +++++++++++++++++++++++++++++++++
> 1 file changed, 327 insertions(+)
> create mode 100644 arch/powerpc/boot/dts/wiiu.dts
>
> diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
> new file mode 100644
> index 000000000000..aaf264963f61
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/wiiu.dts
> @@ -0,0 +1,327 @@
> +// SPDX-License-Identifier: GPL-2.0
What about non-GPL environments?
> +/*
> + * Nintendo Wii U Device Tree Source
> + *
> + * Copyright (C) 2022 The linux-wiiu Team
> + */
> +
> +/dts-v1/;
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "nintendo,wiiu";
> + compatible = "nintendo,wiiu";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen {
> + bootargs = "root=/dev/sda1 rootwait";
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
> + 0x08000000 0x00300000 /* MEM0 - 3MiB */
> + 0x10000000 0x80000000>; /* MEM2 - 2GiB */
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* TODO: Add SMP */
> + PowerPC,espresso@0 {
> + device_type = "cpu";
> + reg = <0>;
> + clock-frequency = <1243125000>; /* 1.243125GHz */
> + bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
> + timebase-frequency = <62156250>; /* 1/4 of the bus clock */
> + i-cache-size = <32768>; /* 32K icache */
> + i-cache-line-size = <32>;
> + i-cache-block-size = <32>;
> + i-cache-sets = <128>;
> + d-cache-size = <32768>; /* 32K dcache */
> + d-cache-line-size = <32>;
> + d-cache-block-size = <32>;
> + d-cache-sets = <128>;
> + next-level-cache = <&L2_0>;
> + L2_0:l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + cache-unified;
> + cache-size = <0x80000>; /* 512KB L2 */
> + cache-line-size = <64>;
> + cache-block-size = <32>;
> + cache-sets = <2048>;
> + };
> + };
> + };
> +
> + latte {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "nintendo,latte";
> + ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
> + 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
> + 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
> +
> + gpu7@c200000 {
gpu@...
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +
> + espresso_pic: pic@c000078 {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + };
> +
> + latte_dsp: dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +
> + ehci_0: usb@d040000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d040000 0x100>;
> + interrupts = <4>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_0_0: usb@d050000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d050000 0x100>;
> + interrupts = <5>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ohci_0_1: usb@d060000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d060000 0x100>;
> + interrupts = <6>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ehci_1: usb@d120000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d120000 0x100>;
> + interrupts = <16>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_1_0: usb@d130000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d130000 0x100>;
> + interrupts = <35>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ehci_2: usb@d140000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d140000 0x100>;
> + interrupts = <36>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_2_0: usb@d150000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d150000 0x100>;
> + interrupts = <37>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + sdcard_0: sdhci@d070000 {
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + wifi_0: sdhci@d080000 {
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d080000 0x200>;
> + interrupts = <8>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + legacy_ipc: ipc@d800000 {
> + compatible = "nintendo,latte-ipc","nintendo,hollywood-ipc";
space between compatibles needed.
> + reg = <0x0d800000 0x10>;
> + interrupts = <30 31>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + latte_otp: otp@d8001ec {
> + compatible = "nintendo,latte-otp";
> + reg = <0x0d8001ec 0x8>;
> + };
> +
> + sata: ahci@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x808>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38 28>;
> + };
> +
> + latte_pic: pic@d800440 {
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,latte-pic";
> + reg = <0x0d800440 0x30>;
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +
> + gpio: gpio@d8000c0 {
> + #gpio-cells = <2>;
> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
> +
> + reg = <0x0d8000c0 0x40>;
> + gpio-controller;
> + /* TODO: There are actually 31 AHBALL GPIOs */
> + ngpios = <24>;
> +
> + gpio-line-names =
> + "POWER", "DWIFI", "FAN", "DC_DC",
> + "", "Esp10WorkAround", "", "",
> + "PADPD", "", "EEP_CS", "EEP_CLK",
> + "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
> + "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
> + "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <10>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + spi_gpio: spi-gpio {
Move this to root level. It's not on the 'latte' bus.
> + compatible = "spi-gpio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
Not needed, that's the default.
> +
> + cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
> + gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
> + gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
> + gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
> + num-chipselects = <1>;
> +
> + seeprom@0 {
eeprom@0
> + compatible = "atmel,at93c66";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + spi-cs-high;
> + /* TODO: wiiubrew says this is 16-bit, but I only get the correct
> + * values in 8-bit...
> + */
> + data-size = <8>;
> + read-only;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
> + rng_seed: rng@12 { reg = <0x012 8>; };
> + ppc_pvr: pvr@20 { reg = <0x020 4>; };
> + seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
> + seeprom_ver: sver@2a { reg = <0x02A 2>; };
> + otp_ver: over@2c { reg = <0x02C 2>; };
> + otp_rev: orev@2e { reg = <0x02E 2>; };
> + otp_ver_str: over-str@30 { reg = <0x030 8>; };
> +
> + bc_crc: bc-crc@38 { reg = <0x038 4>; };
> + bc_sz: bc-sz@3c { reg = <0x03C 2>; };
> + bc_ver: bc-ver@3e { reg = <0x03E 2>; };
> + bc_boardtype: boardtype@42 { reg = <0x042 2>; };
> + bc_boardrev: boardrev@44 { reg = <0x044 2>; };
> + bc_bootsource: bootsource@46 { reg = <0x046 2>; };
> + bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
> + bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
> + bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
> + bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
> + bc_video1080p: video1080p@50 { reg = <0x050 2>; };
> + bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
> + bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
> + bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
> + bc_satadevice: satadevice@58 { reg = <0x058 2>; };
> + bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
> + bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
> +
> + drive_key: drvkey@80 { reg = <0x080 16>; };
> + factory_key: fackey@90 { reg = <0x090 16>; };
> + shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
> + usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
> + drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
> + usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
> + shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
> +
> + sysprod_version: sp_ver@140 { reg = <0x140 4>; };
> + sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
> + sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
> + sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
> + sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
> + sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
> + sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
> + sysprod_code: sp_code@158 { reg = <0x158 8>; };
> + sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
> + sysprod_model: sp_model@170 { reg = <0x170 16>; };
> +
> + prod_year: pyear@188 { reg = <0x188 2>; };
> + prod_date: pdate@18a { reg = <0x18A 2>; };
> + prod_time: ptime@18c { reg = <0x18C 2>; };
> +
> + boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
> + };
> + };
> +
> + /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
> + gpio-keys-polled {
This too.
> + poll-interval = <50>;
> + compatible = "gpio-keys-polled";
> +
> + power {
> + label = "Power Button";
> + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
> + linux,code = <KEY_POWER>;
> + };
> + };
> +
> + gpio2: gpio2@d8000c0 {
gpio@d800520
> + #gpio-cells = <2>;
> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
> +
> + reg = <0x0d800520 0x40>;
> + gpio-controller;
> + ngpios = <7>;
> +
> + gpio-line-names =
> + "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
> + "AVE_INT", "", "AVE_RESET";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <10>;
> + interrupt-parent = <&latte_pic>;
> + };
> + };
> +};
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 02/12] powerpc: wiiu: device tree
2022-03-02 13:36 ` Rob Herring
@ 2022-03-03 2:41 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-03 2:41 UTC (permalink / raw)
To: Rob Herring
Cc: Paul Mackerras, Michael Ellerman, Christophe Leroy,
Benjamin Herrenschmidt, linux-kernel, linuxppc-dev,
Jonathan Neuschäfer, Roberto Van Eeden, Emmanuel Gil Peyrot,
devicetree
Hi Rob,
Thanks for the review.
On 3/3/22 00:36, Rob Herring wrote:
> On Tue, Mar 1, 2022 at 10:44 PM Ash Logan <ash@heyquark.com> wrote:
>>
>> Add a device tree source file for the Nintendo Wii U video game console.
>
> Test this with 'make W=1 dtbs_checks'.
Does make W=1 ARCH=powerpc wiiu_defconfig dtbs_check seem reasonable? I
ran it, and saw LINT/CHKDT/UPD/SCHEMA/COPY steps, but if I put garbage
in the .dts it gives no warnings.
>>
>> Signed-off-by: Ash Logan <ash@heyquark.com>
>> Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
>> Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
>> Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
>> Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
>> ---
>> arch/powerpc/boot/dts/wiiu.dts | 327 +++++++++++++++++++++++++++++++++
>> 1 file changed, 327 insertions(+)
>> create mode 100644 arch/powerpc/boot/dts/wiiu.dts
>>
>> diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
>> new file mode 100644
>> index 000000000000..aaf264963f61
>> --- /dev/null
>> +++ b/arch/powerpc/boot/dts/wiiu.dts
>> @@ -0,0 +1,327 @@
>> +// SPDX-License-Identifier: GPL-2.0
>
> What about non-GPL environments?
The other powerpc dts files are all GPL-2.0(-or-later), is there a
preferred license for devicetrees?
>> +/*
>> + * Nintendo Wii U Device Tree Source
>> + *
>> + * Copyright (C) 2022 The linux-wiiu Team
>> + */
>> +
>> +/dts-v1/;
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +
>> +/ {
>> + model = "nintendo,wiiu";
>> + compatible = "nintendo,wiiu";
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + chosen {
>> + bootargs = "root=/dev/sda1 rootwait";
>> + };
>> +
>> + memory {
>> + device_type = "memory";
>> + reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
>> + 0x08000000 0x00300000 /* MEM0 - 3MiB */
>> + 0x10000000 0x80000000>; /* MEM2 - 2GiB */
>> + };
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + /* TODO: Add SMP */
>> + PowerPC,espresso@0 {
>> + device_type = "cpu";
>> + reg = <0>;
>> + clock-frequency = <1243125000>; /* 1.243125GHz */
>> + bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
>> + timebase-frequency = <62156250>; /* 1/4 of the bus clock */
>> + i-cache-size = <32768>; /* 32K icache */
>> + i-cache-line-size = <32>;
>> + i-cache-block-size = <32>;
>> + i-cache-sets = <128>;
>> + d-cache-size = <32768>; /* 32K dcache */
>> + d-cache-line-size = <32>;
>> + d-cache-block-size = <32>;
>> + d-cache-sets = <128>;
>> + next-level-cache = <&L2_0>;
>> + L2_0:l2-cache {
>> + compatible = "cache";
>> + cache-level = <2>;
>> + cache-unified;
>> + cache-size = <0x80000>; /* 512KB L2 */
>> + cache-line-size = <64>;
>> + cache-block-size = <32>;
>> + cache-sets = <2048>;
>> + };
>> + };
>> + };
>> +
>> + latte {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "nintendo,latte";
>> + ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
>> + 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
>> + 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
>> +
>> + gpu7@c200000 {
>
> gpu@...
>
>> + compatible = "nintendo,latte-gpu7";
>> + reg = <0x0c200000 0x80000>;
>> + interrupts = <2>;
>> + interrupt-parent = <&espresso_pic>;
>> + };
>> +
>> + espresso_pic: pic@c000078 {
>> + #interrupt-cells = <1>;
>> + interrupt-controller;
>> +
>> + compatible = "nintendo,espresso-pic";
>> + reg = <0x0c000078 0x18>;
>> + };
>> +
>> + latte_dsp: dsp@c005000 {
>> + compatible = "nintendo,latte-dsp";
>> + reg = <0x0c005000 0x200>;
>> + };
>> +
>> + ehci_0: usb@d040000 {
>> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
>> + reg = <0x0d040000 0x100>;
>> + interrupts = <4>;
>> + interrupt-parent = <&latte_pic>;
>> + big-endian-regs;
>> + };
>> +
>> + ohci_0_0: usb@d050000 {
>> + compatible = "nintendo,latte-usb-ohci";
>> + reg = <0x0d050000 0x100>;
>> + interrupts = <5>;
>> + interrupt-parent = <&latte_pic>;
>> +
>> + big-endian-regs;
>> + };
>> +
>> + ohci_0_1: usb@d060000 {
>> + compatible = "nintendo,latte-usb-ohci";
>> + reg = <0x0d060000 0x100>;
>> + interrupts = <6>;
>> + interrupt-parent = <&latte_pic>;
>> +
>> + big-endian-regs;
>> + };
>> +
>> + ehci_1: usb@d120000 {
>> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
>> + reg = <0x0d120000 0x100>;
>> + interrupts = <16>;
>> + interrupt-parent = <&latte_pic>;
>> + big-endian-regs;
>> + };
>> +
>> + ohci_1_0: usb@d130000 {
>> + compatible = "nintendo,latte-usb-ohci";
>> + reg = <0x0d130000 0x100>;
>> + interrupts = <35>;
>> + interrupt-parent = <&latte_pic>;
>> +
>> + big-endian-regs;
>> + };
>> +
>> + ehci_2: usb@d140000 {
>> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
>> + reg = <0x0d140000 0x100>;
>> + interrupts = <36>;
>> + interrupt-parent = <&latte_pic>;
>> + big-endian-regs;
>> + };
>> +
>> + ohci_2_0: usb@d150000 {
>> + compatible = "nintendo,latte-usb-ohci";
>> + reg = <0x0d150000 0x100>;
>> + interrupts = <37>;
>> + interrupt-parent = <&latte_pic>;
>> +
>> + big-endian-regs;
>> + };
>> +
>> + sdcard_0: sdhci@d070000 {
>> + compatible = "nintendo,latte-sdhci","sdhci";
>> + reg = <0x0d070000 0x200>;
>> + interrupts = <7>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> +
>> + wifi_0: sdhci@d080000 {
>> + compatible = "nintendo,latte-sdhci","sdhci";
>> + reg = <0x0d080000 0x200>;
>> + interrupts = <8>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> +
>> + legacy_ipc: ipc@d800000 {
>> + compatible = "nintendo,latte-ipc","nintendo,hollywood-ipc";
>
> space between compatibles needed.
>
>> + reg = <0x0d800000 0x10>;
>> + interrupts = <30 31>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> +
>> + latte_otp: otp@d8001ec {
>> + compatible = "nintendo,latte-otp";
>> + reg = <0x0d8001ec 0x8>;
>> + };
>> +
>> + sata: ahci@d160400 {
>> + compatible = "nintendo,latte-ahci";
>> + reg = <0x0d160400 0x808>;
>> +
>> + interrupt-parent = <&latte_pic>;
>> + interrupts = <38 28>;
>> + };
>> +
>> + latte_pic: pic@d800440 {
>> + #interrupt-cells = <1>;
>> + interrupt-controller;
>> +
>> + compatible = "nintendo,latte-pic";
>> + reg = <0x0d800440 0x30>;
>> + interrupt-parent = <&espresso_pic>;
>> + interrupts = <24>;
>> + };
>> +
>> + gpio: gpio@d8000c0 {
>> + #gpio-cells = <2>;
>> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
>> +
>> + reg = <0x0d8000c0 0x40>;
>> + gpio-controller;
>> + /* TODO: There are actually 31 AHBALL GPIOs */
>> + ngpios = <24>;
>> +
>> + gpio-line-names =
>> + "POWER", "DWIFI", "FAN", "DC_DC",
>> + "", "Esp10WorkAround", "", "",
>> + "PADPD", "", "EEP_CS", "EEP_CLK",
>> + "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
>> + "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
>> + "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupts = <10>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> +
>> + spi_gpio: spi-gpio {
>
> Move this to root level. It's not on the 'latte' bus.
>
>> + compatible = "spi-gpio";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "okay";
>
> Not needed, that's the default.
>
>> +
>> + cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
>> + gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
>> + gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
>> + gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
>> + num-chipselects = <1>;
>> +
>> + seeprom@0 {
>
> eeprom@0
>
>> + compatible = "atmel,at93c66";
>> + reg = <0>;
>> + spi-max-frequency = <1000000>;
>> + spi-cs-high;
>> + /* TODO: wiiubrew says this is 16-bit, but I only get the correct
>> + * values in 8-bit...
>> + */
>> + data-size = <8>;
>> + read-only;
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
>> + rng_seed: rng@12 { reg = <0x012 8>; };
>> + ppc_pvr: pvr@20 { reg = <0x020 4>; };
>> + seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
>> + seeprom_ver: sver@2a { reg = <0x02A 2>; };
>> + otp_ver: over@2c { reg = <0x02C 2>; };
>> + otp_rev: orev@2e { reg = <0x02E 2>; };
>> + otp_ver_str: over-str@30 { reg = <0x030 8>; };
>> +
>> + bc_crc: bc-crc@38 { reg = <0x038 4>; };
>> + bc_sz: bc-sz@3c { reg = <0x03C 2>; };
>> + bc_ver: bc-ver@3e { reg = <0x03E 2>; };
>> + bc_boardtype: boardtype@42 { reg = <0x042 2>; };
>> + bc_boardrev: boardrev@44 { reg = <0x044 2>; };
>> + bc_bootsource: bootsource@46 { reg = <0x046 2>; };
>> + bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
>> + bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
>> + bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
>> + bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
>> + bc_video1080p: video1080p@50 { reg = <0x050 2>; };
>> + bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
>> + bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
>> + bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
>> + bc_satadevice: satadevice@58 { reg = <0x058 2>; };
>> + bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
>> + bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
>> +
>> + drive_key: drvkey@80 { reg = <0x080 16>; };
>> + factory_key: fackey@90 { reg = <0x090 16>; };
>> + shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
>> + usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
>> + drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
>> + usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
>> + shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
>> +
>> + sysprod_version: sp_ver@140 { reg = <0x140 4>; };
>> + sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
>> + sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
>> + sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
>> + sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
>> + sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
>> + sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
>> + sysprod_code: sp_code@158 { reg = <0x158 8>; };
>> + sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
>> + sysprod_model: sp_model@170 { reg = <0x170 16>; };
>> +
>> + prod_year: pyear@188 { reg = <0x188 2>; };
>> + prod_date: pdate@18a { reg = <0x18A 2>; };
>> + prod_time: ptime@18c { reg = <0x18C 2>; };
>> +
>> + boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
>> + };
>> + };
>> +
>> + /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
>> + gpio-keys-polled {
>
> This too.
>
>> + poll-interval = <50>;
>> + compatible = "gpio-keys-polled";
>> +
>> + power {
>> + label = "Power Button";
>> + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
>> + linux,code = <KEY_POWER>;
>> + };
>> + };
>> +
>> + gpio2: gpio2@d8000c0 {
>
> gpio@d800520
>
>> + #gpio-cells = <2>;
>> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
>> +
>> + reg = <0x0d800520 0x40>;
>> + gpio-controller;
>> + ngpios = <7>;
>> +
>> + gpio-line-names =
>> + "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
>> + "AVE_INT", "", "AVE_RESET";
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupts = <10>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> + };
>> +};
>> --
>> 2.35.1
>>
Will do in v2.
Thanks,
Ash
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 02/12] powerpc: wiiu: device tree
@ 2022-03-03 2:41 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-03-03 2:41 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Emmanuel Gil Peyrot, linux-kernel, Paul Mackerras,
Roberto Van Eeden, linuxppc-dev, Jonathan Neuschäfer
Hi Rob,
Thanks for the review.
On 3/3/22 00:36, Rob Herring wrote:
> On Tue, Mar 1, 2022 at 10:44 PM Ash Logan <ash@heyquark.com> wrote:
>>
>> Add a device tree source file for the Nintendo Wii U video game console.
>
> Test this with 'make W=1 dtbs_checks'.
Does make W=1 ARCH=powerpc wiiu_defconfig dtbs_check seem reasonable? I
ran it, and saw LINT/CHKDT/UPD/SCHEMA/COPY steps, but if I put garbage
in the .dts it gives no warnings.
>>
>> Signed-off-by: Ash Logan <ash@heyquark.com>
>> Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
>> Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
>> Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
>> Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
>> ---
>> arch/powerpc/boot/dts/wiiu.dts | 327 +++++++++++++++++++++++++++++++++
>> 1 file changed, 327 insertions(+)
>> create mode 100644 arch/powerpc/boot/dts/wiiu.dts
>>
>> diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
>> new file mode 100644
>> index 000000000000..aaf264963f61
>> --- /dev/null
>> +++ b/arch/powerpc/boot/dts/wiiu.dts
>> @@ -0,0 +1,327 @@
>> +// SPDX-License-Identifier: GPL-2.0
>
> What about non-GPL environments?
The other powerpc dts files are all GPL-2.0(-or-later), is there a
preferred license for devicetrees?
>> +/*
>> + * Nintendo Wii U Device Tree Source
>> + *
>> + * Copyright (C) 2022 The linux-wiiu Team
>> + */
>> +
>> +/dts-v1/;
>> +#include <dt-bindings/gpio/gpio.h>
>> +#include <dt-bindings/input/input.h>
>> +
>> +/ {
>> + model = "nintendo,wiiu";
>> + compatible = "nintendo,wiiu";
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + chosen {
>> + bootargs = "root=/dev/sda1 rootwait";
>> + };
>> +
>> + memory {
>> + device_type = "memory";
>> + reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
>> + 0x08000000 0x00300000 /* MEM0 - 3MiB */
>> + 0x10000000 0x80000000>; /* MEM2 - 2GiB */
>> + };
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + /* TODO: Add SMP */
>> + PowerPC,espresso@0 {
>> + device_type = "cpu";
>> + reg = <0>;
>> + clock-frequency = <1243125000>; /* 1.243125GHz */
>> + bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
>> + timebase-frequency = <62156250>; /* 1/4 of the bus clock */
>> + i-cache-size = <32768>; /* 32K icache */
>> + i-cache-line-size = <32>;
>> + i-cache-block-size = <32>;
>> + i-cache-sets = <128>;
>> + d-cache-size = <32768>; /* 32K dcache */
>> + d-cache-line-size = <32>;
>> + d-cache-block-size = <32>;
>> + d-cache-sets = <128>;
>> + next-level-cache = <&L2_0>;
>> + L2_0:l2-cache {
>> + compatible = "cache";
>> + cache-level = <2>;
>> + cache-unified;
>> + cache-size = <0x80000>; /* 512KB L2 */
>> + cache-line-size = <64>;
>> + cache-block-size = <32>;
>> + cache-sets = <2048>;
>> + };
>> + };
>> + };
>> +
>> + latte {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "nintendo,latte";
>> + ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
>> + 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
>> + 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
>> +
>> + gpu7@c200000 {
>
> gpu@...
>
>> + compatible = "nintendo,latte-gpu7";
>> + reg = <0x0c200000 0x80000>;
>> + interrupts = <2>;
>> + interrupt-parent = <&espresso_pic>;
>> + };
>> +
>> + espresso_pic: pic@c000078 {
>> + #interrupt-cells = <1>;
>> + interrupt-controller;
>> +
>> + compatible = "nintendo,espresso-pic";
>> + reg = <0x0c000078 0x18>;
>> + };
>> +
>> + latte_dsp: dsp@c005000 {
>> + compatible = "nintendo,latte-dsp";
>> + reg = <0x0c005000 0x200>;
>> + };
>> +
>> + ehci_0: usb@d040000 {
>> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
>> + reg = <0x0d040000 0x100>;
>> + interrupts = <4>;
>> + interrupt-parent = <&latte_pic>;
>> + big-endian-regs;
>> + };
>> +
>> + ohci_0_0: usb@d050000 {
>> + compatible = "nintendo,latte-usb-ohci";
>> + reg = <0x0d050000 0x100>;
>> + interrupts = <5>;
>> + interrupt-parent = <&latte_pic>;
>> +
>> + big-endian-regs;
>> + };
>> +
>> + ohci_0_1: usb@d060000 {
>> + compatible = "nintendo,latte-usb-ohci";
>> + reg = <0x0d060000 0x100>;
>> + interrupts = <6>;
>> + interrupt-parent = <&latte_pic>;
>> +
>> + big-endian-regs;
>> + };
>> +
>> + ehci_1: usb@d120000 {
>> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
>> + reg = <0x0d120000 0x100>;
>> + interrupts = <16>;
>> + interrupt-parent = <&latte_pic>;
>> + big-endian-regs;
>> + };
>> +
>> + ohci_1_0: usb@d130000 {
>> + compatible = "nintendo,latte-usb-ohci";
>> + reg = <0x0d130000 0x100>;
>> + interrupts = <35>;
>> + interrupt-parent = <&latte_pic>;
>> +
>> + big-endian-regs;
>> + };
>> +
>> + ehci_2: usb@d140000 {
>> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
>> + reg = <0x0d140000 0x100>;
>> + interrupts = <36>;
>> + interrupt-parent = <&latte_pic>;
>> + big-endian-regs;
>> + };
>> +
>> + ohci_2_0: usb@d150000 {
>> + compatible = "nintendo,latte-usb-ohci";
>> + reg = <0x0d150000 0x100>;
>> + interrupts = <37>;
>> + interrupt-parent = <&latte_pic>;
>> +
>> + big-endian-regs;
>> + };
>> +
>> + sdcard_0: sdhci@d070000 {
>> + compatible = "nintendo,latte-sdhci","sdhci";
>> + reg = <0x0d070000 0x200>;
>> + interrupts = <7>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> +
>> + wifi_0: sdhci@d080000 {
>> + compatible = "nintendo,latte-sdhci","sdhci";
>> + reg = <0x0d080000 0x200>;
>> + interrupts = <8>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> +
>> + legacy_ipc: ipc@d800000 {
>> + compatible = "nintendo,latte-ipc","nintendo,hollywood-ipc";
>
> space between compatibles needed.
>
>> + reg = <0x0d800000 0x10>;
>> + interrupts = <30 31>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> +
>> + latte_otp: otp@d8001ec {
>> + compatible = "nintendo,latte-otp";
>> + reg = <0x0d8001ec 0x8>;
>> + };
>> +
>> + sata: ahci@d160400 {
>> + compatible = "nintendo,latte-ahci";
>> + reg = <0x0d160400 0x808>;
>> +
>> + interrupt-parent = <&latte_pic>;
>> + interrupts = <38 28>;
>> + };
>> +
>> + latte_pic: pic@d800440 {
>> + #interrupt-cells = <1>;
>> + interrupt-controller;
>> +
>> + compatible = "nintendo,latte-pic";
>> + reg = <0x0d800440 0x30>;
>> + interrupt-parent = <&espresso_pic>;
>> + interrupts = <24>;
>> + };
>> +
>> + gpio: gpio@d8000c0 {
>> + #gpio-cells = <2>;
>> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
>> +
>> + reg = <0x0d8000c0 0x40>;
>> + gpio-controller;
>> + /* TODO: There are actually 31 AHBALL GPIOs */
>> + ngpios = <24>;
>> +
>> + gpio-line-names =
>> + "POWER", "DWIFI", "FAN", "DC_DC",
>> + "", "Esp10WorkAround", "", "",
>> + "PADPD", "", "EEP_CS", "EEP_CLK",
>> + "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
>> + "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
>> + "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupts = <10>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> +
>> + spi_gpio: spi-gpio {
>
> Move this to root level. It's not on the 'latte' bus.
>
>> + compatible = "spi-gpio";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + status = "okay";
>
> Not needed, that's the default.
>
>> +
>> + cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
>> + gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
>> + gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
>> + gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
>> + num-chipselects = <1>;
>> +
>> + seeprom@0 {
>
> eeprom@0
>
>> + compatible = "atmel,at93c66";
>> + reg = <0>;
>> + spi-max-frequency = <1000000>;
>> + spi-cs-high;
>> + /* TODO: wiiubrew says this is 16-bit, but I only get the correct
>> + * values in 8-bit...
>> + */
>> + data-size = <8>;
>> + read-only;
>> +
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
>> + rng_seed: rng@12 { reg = <0x012 8>; };
>> + ppc_pvr: pvr@20 { reg = <0x020 4>; };
>> + seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
>> + seeprom_ver: sver@2a { reg = <0x02A 2>; };
>> + otp_ver: over@2c { reg = <0x02C 2>; };
>> + otp_rev: orev@2e { reg = <0x02E 2>; };
>> + otp_ver_str: over-str@30 { reg = <0x030 8>; };
>> +
>> + bc_crc: bc-crc@38 { reg = <0x038 4>; };
>> + bc_sz: bc-sz@3c { reg = <0x03C 2>; };
>> + bc_ver: bc-ver@3e { reg = <0x03E 2>; };
>> + bc_boardtype: boardtype@42 { reg = <0x042 2>; };
>> + bc_boardrev: boardrev@44 { reg = <0x044 2>; };
>> + bc_bootsource: bootsource@46 { reg = <0x046 2>; };
>> + bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
>> + bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
>> + bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
>> + bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
>> + bc_video1080p: video1080p@50 { reg = <0x050 2>; };
>> + bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
>> + bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
>> + bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
>> + bc_satadevice: satadevice@58 { reg = <0x058 2>; };
>> + bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
>> + bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
>> +
>> + drive_key: drvkey@80 { reg = <0x080 16>; };
>> + factory_key: fackey@90 { reg = <0x090 16>; };
>> + shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
>> + usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
>> + drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
>> + usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
>> + shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
>> +
>> + sysprod_version: sp_ver@140 { reg = <0x140 4>; };
>> + sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
>> + sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
>> + sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
>> + sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
>> + sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
>> + sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
>> + sysprod_code: sp_code@158 { reg = <0x158 8>; };
>> + sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
>> + sysprod_model: sp_model@170 { reg = <0x170 16>; };
>> +
>> + prod_year: pyear@188 { reg = <0x188 2>; };
>> + prod_date: pdate@18a { reg = <0x18A 2>; };
>> + prod_time: ptime@18c { reg = <0x18C 2>; };
>> +
>> + boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
>> + };
>> + };
>> +
>> + /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
>> + gpio-keys-polled {
>
> This too.
>
>> + poll-interval = <50>;
>> + compatible = "gpio-keys-polled";
>> +
>> + power {
>> + label = "Power Button";
>> + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
>> + linux,code = <KEY_POWER>;
>> + };
>> + };
>> +
>> + gpio2: gpio2@d8000c0 {
>
> gpio@d800520
>
>> + #gpio-cells = <2>;
>> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
>> +
>> + reg = <0x0d800520 0x40>;
>> + gpio-controller;
>> + ngpios = <7>;
>> +
>> + gpio-line-names =
>> + "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
>> + "AVE_INT", "", "AVE_RESET";
>> +
>> + interrupt-controller;
>> + #interrupt-cells = <2>;
>> + interrupts = <10>;
>> + interrupt-parent = <&latte_pic>;
>> + };
>> + };
>> +};
>> --
>> 2.35.1
>>
Will do in v2.
Thanks,
Ash
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-03-02 4:44 ` Ash Logan
@ 2022-05-13 22:43 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-05-13 22:43 UTC (permalink / raw)
To: Ash Logan
Cc: paulus, mpe, christophe.leroy, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne
On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> non-contiguous memory just works.
Hello! Does it mean that non-contiguous memory works for any 32-bit
powerpc platform, and not only for wiiu? If yes, should not be
non-contiguous memory support enabled for all 32-bit ppc boards then?
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> arch/powerpc/mm/init_32.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> index 3d690be48e84..59a84629d9a0 100644
> --- a/arch/powerpc/mm/init_32.c
> +++ b/arch/powerpc/mm/init_32.c
> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> * lowmem_end_addr is initialized below.
> */
> if (memblock.memory.cnt > 1) {
> -#ifndef CONFIG_WII
> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> pr_warn("Only using first contiguous memory region\n");
> -#else
> +#elif defined(CONFIG_WII)
> wii_memory_fixups();
> #endif
> }
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-05-13 22:43 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-05-13 22:43 UTC (permalink / raw)
To: Ash Logan; +Cc: linux-kernel, robh+dt, paulus, linuxppc-dev, j.ne
On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> non-contiguous memory just works.
Hello! Does it mean that non-contiguous memory works for any 32-bit
powerpc platform, and not only for wiiu? If yes, should not be
non-contiguous memory support enabled for all 32-bit ppc boards then?
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> arch/powerpc/mm/init_32.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> index 3d690be48e84..59a84629d9a0 100644
> --- a/arch/powerpc/mm/init_32.c
> +++ b/arch/powerpc/mm/init_32.c
> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> * lowmem_end_addr is initialized below.
> */
> if (memblock.memory.cnt > 1) {
> -#ifndef CONFIG_WII
> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> pr_warn("Only using first contiguous memory region\n");
> -#else
> +#elif defined(CONFIG_WII)
> wii_memory_fixups();
> #endif
> }
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-05-13 22:43 ` Pali Rohár
@ 2022-05-20 3:41 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-05-20 3:41 UTC (permalink / raw)
To: Pali Rohár
Cc: paulus, mpe, christophe.leroy, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne
On 14/5/22 08:43, Pali Rohár wrote:
> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
>> non-contiguous memory just works.
>
> Hello! Does it mean that non-contiguous memory works for any 32-bit
> powerpc platform, and not only for wiiu? If yes, should not be
> non-contiguous memory support enabled for all 32-bit ppc boards then?
Hi! Sorry for my delayed response. As best I can tell, it does indeed
Just Work, but I have only been able to test on wiiu which is missing a
lot of features other boards have (like PCI) - so it's possible there's
still an assumption elsewhere in the kernel that I haven't hit.
As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
out there where it's even possible to have non-contiguous memory.
>> Signed-off-by: Ash Logan <ash@heyquark.com>
>> ---
>> arch/powerpc/mm/init_32.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
>> index 3d690be48e84..59a84629d9a0 100644
>> --- a/arch/powerpc/mm/init_32.c
>> +++ b/arch/powerpc/mm/init_32.c
>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
>> * lowmem_end_addr is initialized below.
>> */
>> if (memblock.memory.cnt > 1) {
>> -#ifndef CONFIG_WII
>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
>> pr_warn("Only using first contiguous memory region\n");
>> -#else
>> +#elif defined(CONFIG_WII)
>> wii_memory_fixups();
>> #endif
>> }
>> --
>> 2.35.1
>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-05-20 3:41 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-05-20 3:41 UTC (permalink / raw)
To: Pali Rohár; +Cc: linux-kernel, robh+dt, paulus, linuxppc-dev, j.ne
On 14/5/22 08:43, Pali Rohár wrote:
> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
>> non-contiguous memory just works.
>
> Hello! Does it mean that non-contiguous memory works for any 32-bit
> powerpc platform, and not only for wiiu? If yes, should not be
> non-contiguous memory support enabled for all 32-bit ppc boards then?
Hi! Sorry for my delayed response. As best I can tell, it does indeed
Just Work, but I have only been able to test on wiiu which is missing a
lot of features other boards have (like PCI) - so it's possible there's
still an assumption elsewhere in the kernel that I haven't hit.
As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
out there where it's even possible to have non-contiguous memory.
>> Signed-off-by: Ash Logan <ash@heyquark.com>
>> ---
>> arch/powerpc/mm/init_32.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
>> index 3d690be48e84..59a84629d9a0 100644
>> --- a/arch/powerpc/mm/init_32.c
>> +++ b/arch/powerpc/mm/init_32.c
>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
>> * lowmem_end_addr is initialized below.
>> */
>> if (memblock.memory.cnt > 1) {
>> -#ifndef CONFIG_WII
>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
>> pr_warn("Only using first contiguous memory region\n");
>> -#else
>> +#elif defined(CONFIG_WII)
>> wii_memory_fixups();
>> #endif
>> }
>> --
>> 2.35.1
>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-05-20 3:41 ` Ash Logan
@ 2022-05-20 8:04 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-05-20 8:04 UTC (permalink / raw)
To: Ash Logan
Cc: paulus, mpe, christophe.leroy, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne
On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> On 14/5/22 08:43, Pali Rohár wrote:
> > On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> >> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> >> non-contiguous memory just works.
> >
> > Hello! Does it mean that non-contiguous memory works for any 32-bit
> > powerpc platform, and not only for wiiu? If yes, should not be
> > non-contiguous memory support enabled for all 32-bit ppc boards then?
>
> Hi! Sorry for my delayed response. As best I can tell, it does indeed
> Just Work, but I have only been able to test on wiiu which is missing a
> lot of features other boards have (like PCI) - so it's possible there's
> still an assumption elsewhere in the kernel that I haven't hit.
>
> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
> out there where it's even possible to have non-contiguous memory.
What is the reason that those two boards are the **only**? Is there some
specific requirement from bootloader or hardware to "enable"
non-contiguous memory support?
I'm interested in enabling non-contiguous memory support for P2020-based
board as it has gaps in its 32-bit memory layout and which could be used
for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
> >> Signed-off-by: Ash Logan <ash@heyquark.com>
> >> ---
> >> arch/powerpc/mm/init_32.c | 4 ++--
> >> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> >> index 3d690be48e84..59a84629d9a0 100644
> >> --- a/arch/powerpc/mm/init_32.c
> >> +++ b/arch/powerpc/mm/init_32.c
> >> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> >> * lowmem_end_addr is initialized below.
> >> */
> >> if (memblock.memory.cnt > 1) {
> >> -#ifndef CONFIG_WII
> >> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> >> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> >> pr_warn("Only using first contiguous memory region\n");
> >> -#else
> >> +#elif defined(CONFIG_WII)
> >> wii_memory_fixups();
> >> #endif
> >> }
> >> --
> >> 2.35.1
> >>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-05-20 8:04 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-05-20 8:04 UTC (permalink / raw)
To: Ash Logan; +Cc: linux-kernel, robh+dt, paulus, linuxppc-dev, j.ne
On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> On 14/5/22 08:43, Pali Rohár wrote:
> > On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> >> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> >> non-contiguous memory just works.
> >
> > Hello! Does it mean that non-contiguous memory works for any 32-bit
> > powerpc platform, and not only for wiiu? If yes, should not be
> > non-contiguous memory support enabled for all 32-bit ppc boards then?
>
> Hi! Sorry for my delayed response. As best I can tell, it does indeed
> Just Work, but I have only been able to test on wiiu which is missing a
> lot of features other boards have (like PCI) - so it's possible there's
> still an assumption elsewhere in the kernel that I haven't hit.
>
> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
> out there where it's even possible to have non-contiguous memory.
What is the reason that those two boards are the **only**? Is there some
specific requirement from bootloader or hardware to "enable"
non-contiguous memory support?
I'm interested in enabling non-contiguous memory support for P2020-based
board as it has gaps in its 32-bit memory layout and which could be used
for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
> >> Signed-off-by: Ash Logan <ash@heyquark.com>
> >> ---
> >> arch/powerpc/mm/init_32.c | 4 ++--
> >> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> >> index 3d690be48e84..59a84629d9a0 100644
> >> --- a/arch/powerpc/mm/init_32.c
> >> +++ b/arch/powerpc/mm/init_32.c
> >> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> >> * lowmem_end_addr is initialized below.
> >> */
> >> if (memblock.memory.cnt > 1) {
> >> -#ifndef CONFIG_WII
> >> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> >> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> >> pr_warn("Only using first contiguous memory region\n");
> >> -#else
> >> +#elif defined(CONFIG_WII)
> >> wii_memory_fixups();
> >> #endif
> >> }
> >> --
> >> 2.35.1
> >>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-05-20 8:04 ` Pali Rohár
@ 2022-05-20 10:44 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-05-20 10:44 UTC (permalink / raw)
To: Pali Rohár; +Cc: linux-kernel, robh+dt, paulus, linuxppc-dev, j.ne
On 20/5/22 18:04, Pali Rohár wrote:
> On Friday 20 May 2022 13:41:04 Ash Logan wrote:
>> On 14/5/22 08:43, Pali Rohár wrote:
>>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
>>>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
>>>> non-contiguous memory just works.
>>>
>>> Hello! Does it mean that non-contiguous memory works for any 32-bit
>>> powerpc platform, and not only for wiiu? If yes, should not be
>>> non-contiguous memory support enabled for all 32-bit ppc boards then?
>>
>> Hi! Sorry for my delayed response. As best I can tell, it does indeed
>> Just Work, but I have only been able to test on wiiu which is missing a
>> lot of features other boards have (like PCI) - so it's possible there's
>> still an assumption elsewhere in the kernel that I haven't hit.
>>
>> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
>> out there where it's even possible to have non-contiguous memory.
>
> What is the reason that those two boards are the **only**? Is there some
> specific requirement from bootloader or hardware to "enable"
> non-contiguous memory support?
Not that I know of, I was just saying that I was only aware of those two
boards where the memory map isn't contiguous, and that is the only place
where it has been tested. Evidently you know of another board!
> I'm interested in enabling non-contiguous memory support for P2020-based
> board as it has gaps in its 32-bit memory layout and which could be used
> for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
If it's like the Wii or Wii U (some memory at 0, a gap for MMIO or
whatever, then more memory at a higher address) then you should try a
patch along these lines, because barring the unknowns I mentioned before
it should work. At least as far as I'm aware ;)
>>>> Signed-off-by: Ash Logan <ash@heyquark.com>
>>>> ---
>>>> arch/powerpc/mm/init_32.c | 4 ++--
>>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
>>>> index 3d690be48e84..59a84629d9a0 100644
>>>> --- a/arch/powerpc/mm/init_32.c
>>>> +++ b/arch/powerpc/mm/init_32.c
>>>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
>>>> * lowmem_end_addr is initialized below.
>>>> */
>>>> if (memblock.memory.cnt > 1) {
>>>> -#ifndef CONFIG_WII
>>>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
>>>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
>>>> pr_warn("Only using first contiguous memory region\n");
>>>> -#else
>>>> +#elif defined(CONFIG_WII)
>>>> wii_memory_fixups();
>>>> #endif
>>>> }
>>>> --
>>>> 2.35.1
>>>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-05-20 10:44 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-05-20 10:44 UTC (permalink / raw)
To: Pali Rohár
Cc: paulus, mpe, christophe.leroy, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne
On 20/5/22 18:04, Pali Rohár wrote:
> On Friday 20 May 2022 13:41:04 Ash Logan wrote:
>> On 14/5/22 08:43, Pali Rohár wrote:
>>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
>>>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
>>>> non-contiguous memory just works.
>>>
>>> Hello! Does it mean that non-contiguous memory works for any 32-bit
>>> powerpc platform, and not only for wiiu? If yes, should not be
>>> non-contiguous memory support enabled for all 32-bit ppc boards then?
>>
>> Hi! Sorry for my delayed response. As best I can tell, it does indeed
>> Just Work, but I have only been able to test on wiiu which is missing a
>> lot of features other boards have (like PCI) - so it's possible there's
>> still an assumption elsewhere in the kernel that I haven't hit.
>>
>> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
>> out there where it's even possible to have non-contiguous memory.
>
> What is the reason that those two boards are the **only**? Is there some
> specific requirement from bootloader or hardware to "enable"
> non-contiguous memory support?
Not that I know of, I was just saying that I was only aware of those two
boards where the memory map isn't contiguous, and that is the only place
where it has been tested. Evidently you know of another board!
> I'm interested in enabling non-contiguous memory support for P2020-based
> board as it has gaps in its 32-bit memory layout and which could be used
> for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
If it's like the Wii or Wii U (some memory at 0, a gap for MMIO or
whatever, then more memory at a higher address) then you should try a
patch along these lines, because barring the unknowns I mentioned before
it should work. At least as far as I'm aware ;)
>>>> Signed-off-by: Ash Logan <ash@heyquark.com>
>>>> ---
>>>> arch/powerpc/mm/init_32.c | 4 ++--
>>>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
>>>> index 3d690be48e84..59a84629d9a0 100644
>>>> --- a/arch/powerpc/mm/init_32.c
>>>> +++ b/arch/powerpc/mm/init_32.c
>>>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
>>>> * lowmem_end_addr is initialized below.
>>>> */
>>>> if (memblock.memory.cnt > 1) {
>>>> -#ifndef CONFIG_WII
>>>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
>>>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
>>>> pr_warn("Only using first contiguous memory region\n");
>>>> -#else
>>>> +#elif defined(CONFIG_WII)
>>>> wii_memory_fixups();
>>>> #endif
>>>> }
>>>> --
>>>> 2.35.1
>>>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-05-20 10:44 ` Ash Logan
@ 2022-05-20 12:30 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-05-20 12:30 UTC (permalink / raw)
To: linux-mm
Cc: Ash Logan, paulus, mpe, christophe.leroy, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne
+ linux-mm
Do you know what are requirements for kernel to support non-contiguous
memory support and what is needed to enable it for 32-bit powerpc?
Currently powerpc arch code does not support "memblock.memory.cnt > 1"
except for WII which seems like a hack... See below.
On Friday 20 May 2022 20:44:04 Ash Logan wrote:
> On 20/5/22 18:04, Pali Rohár wrote:
> > On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> >> On 14/5/22 08:43, Pali Rohár wrote:
> >>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> >>>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> >>>> non-contiguous memory just works.
> >>>
> >>> Hello! Does it mean that non-contiguous memory works for any 32-bit
> >>> powerpc platform, and not only for wiiu? If yes, should not be
> >>> non-contiguous memory support enabled for all 32-bit ppc boards then?
> >>
> >> Hi! Sorry for my delayed response. As best I can tell, it does indeed
> >> Just Work, but I have only been able to test on wiiu which is missing a
> >> lot of features other boards have (like PCI) - so it's possible there's
> >> still an assumption elsewhere in the kernel that I haven't hit.
> >>
> >> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
> >> out there where it's even possible to have non-contiguous memory.
> >
> > What is the reason that those two boards are the **only**? Is there some
> > specific requirement from bootloader or hardware to "enable"
> > non-contiguous memory support?
>
> Not that I know of, I was just saying that I was only aware of those two
> boards where the memory map isn't contiguous, and that is the only place
> where it has been tested. Evidently you know of another board!
>
> > I'm interested in enabling non-contiguous memory support for P2020-based
> > board as it has gaps in its 32-bit memory layout and which could be used
> > for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
>
> If it's like the Wii or Wii U (some memory at 0, a gap for MMIO or
> whatever, then more memory at a higher address) then you should try a
> patch along these lines, because barring the unknowns I mentioned before
> it should work. At least as far as I'm aware ;)
>
> >>>> Signed-off-by: Ash Logan <ash@heyquark.com>
> >>>> ---
> >>>> arch/powerpc/mm/init_32.c | 4 ++--
> >>>> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>>>
> >>>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> >>>> index 3d690be48e84..59a84629d9a0 100644
> >>>> --- a/arch/powerpc/mm/init_32.c
> >>>> +++ b/arch/powerpc/mm/init_32.c
> >>>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> >>>> * lowmem_end_addr is initialized below.
> >>>> */
> >>>> if (memblock.memory.cnt > 1) {
> >>>> -#ifndef CONFIG_WII
> >>>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> >>>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> >>>> pr_warn("Only using first contiguous memory region\n");
> >>>> -#else
> >>>> +#elif defined(CONFIG_WII)
> >>>> wii_memory_fixups();
> >>>> #endif
> >>>> }
> >>>> --
> >>>> 2.35.1
> >>>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-05-20 12:30 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-05-20 12:30 UTC (permalink / raw)
To: linux-mm; +Cc: linux-kernel, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
+ linux-mm
Do you know what are requirements for kernel to support non-contiguous
memory support and what is needed to enable it for 32-bit powerpc?
Currently powerpc arch code does not support "memblock.memory.cnt > 1"
except for WII which seems like a hack... See below.
On Friday 20 May 2022 20:44:04 Ash Logan wrote:
> On 20/5/22 18:04, Pali Rohár wrote:
> > On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> >> On 14/5/22 08:43, Pali Rohár wrote:
> >>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> >>>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> >>>> non-contiguous memory just works.
> >>>
> >>> Hello! Does it mean that non-contiguous memory works for any 32-bit
> >>> powerpc platform, and not only for wiiu? If yes, should not be
> >>> non-contiguous memory support enabled for all 32-bit ppc boards then?
> >>
> >> Hi! Sorry for my delayed response. As best I can tell, it does indeed
> >> Just Work, but I have only been able to test on wiiu which is missing a
> >> lot of features other boards have (like PCI) - so it's possible there's
> >> still an assumption elsewhere in the kernel that I haven't hit.
> >>
> >> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
> >> out there where it's even possible to have non-contiguous memory.
> >
> > What is the reason that those two boards are the **only**? Is there some
> > specific requirement from bootloader or hardware to "enable"
> > non-contiguous memory support?
>
> Not that I know of, I was just saying that I was only aware of those two
> boards where the memory map isn't contiguous, and that is the only place
> where it has been tested. Evidently you know of another board!
>
> > I'm interested in enabling non-contiguous memory support for P2020-based
> > board as it has gaps in its 32-bit memory layout and which could be used
> > for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
>
> If it's like the Wii or Wii U (some memory at 0, a gap for MMIO or
> whatever, then more memory at a higher address) then you should try a
> patch along these lines, because barring the unknowns I mentioned before
> it should work. At least as far as I'm aware ;)
>
> >>>> Signed-off-by: Ash Logan <ash@heyquark.com>
> >>>> ---
> >>>> arch/powerpc/mm/init_32.c | 4 ++--
> >>>> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>>>
> >>>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> >>>> index 3d690be48e84..59a84629d9a0 100644
> >>>> --- a/arch/powerpc/mm/init_32.c
> >>>> +++ b/arch/powerpc/mm/init_32.c
> >>>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> >>>> * lowmem_end_addr is initialized below.
> >>>> */
> >>>> if (memblock.memory.cnt > 1) {
> >>>> -#ifndef CONFIG_WII
> >>>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> >>>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> >>>> pr_warn("Only using first contiguous memory region\n");
> >>>> -#else
> >>>> +#elif defined(CONFIG_WII)
> >>>> wii_memory_fixups();
> >>>> #endif
> >>>> }
> >>>> --
> >>>> 2.35.1
> >>>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-05-20 12:30 ` Pali Rohár
@ 2022-06-09 22:24 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-06-09 22:24 UTC (permalink / raw)
To: linux-mm
Cc: Ash Logan, paulus, mpe, christophe.leroy, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne
On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> + linux-mm
>
> Do you know what are requirements for kernel to support non-contiguous
> memory support and what is needed to enable it for 32-bit powerpc?
Any hints?
> Currently powerpc arch code does not support "memblock.memory.cnt > 1"
> except for WII which seems like a hack... See below.
>
> On Friday 20 May 2022 20:44:04 Ash Logan wrote:
> > On 20/5/22 18:04, Pali Rohár wrote:
> > > On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> > >> On 14/5/22 08:43, Pali Rohár wrote:
> > >>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> > >>>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> > >>>> non-contiguous memory just works.
> > >>>
> > >>> Hello! Does it mean that non-contiguous memory works for any 32-bit
> > >>> powerpc platform, and not only for wiiu? If yes, should not be
> > >>> non-contiguous memory support enabled for all 32-bit ppc boards then?
> > >>
> > >> Hi! Sorry for my delayed response. As best I can tell, it does indeed
> > >> Just Work, but I have only been able to test on wiiu which is missing a
> > >> lot of features other boards have (like PCI) - so it's possible there's
> > >> still an assumption elsewhere in the kernel that I haven't hit.
> > >>
> > >> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
> > >> out there where it's even possible to have non-contiguous memory.
> > >
> > > What is the reason that those two boards are the **only**? Is there some
> > > specific requirement from bootloader or hardware to "enable"
> > > non-contiguous memory support?
> >
> > Not that I know of, I was just saying that I was only aware of those two
> > boards where the memory map isn't contiguous, and that is the only place
> > where it has been tested. Evidently you know of another board!
> >
> > > I'm interested in enabling non-contiguous memory support for P2020-based
> > > board as it has gaps in its 32-bit memory layout and which could be used
> > > for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
> >
> > If it's like the Wii or Wii U (some memory at 0, a gap for MMIO or
> > whatever, then more memory at a higher address) then you should try a
> > patch along these lines, because barring the unknowns I mentioned before
> > it should work. At least as far as I'm aware ;)
> >
> > >>>> Signed-off-by: Ash Logan <ash@heyquark.com>
> > >>>> ---
> > >>>> arch/powerpc/mm/init_32.c | 4 ++--
> > >>>> 1 file changed, 2 insertions(+), 2 deletions(-)
> > >>>>
> > >>>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> > >>>> index 3d690be48e84..59a84629d9a0 100644
> > >>>> --- a/arch/powerpc/mm/init_32.c
> > >>>> +++ b/arch/powerpc/mm/init_32.c
> > >>>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> > >>>> * lowmem_end_addr is initialized below.
> > >>>> */
> > >>>> if (memblock.memory.cnt > 1) {
> > >>>> -#ifndef CONFIG_WII
> > >>>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> > >>>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> > >>>> pr_warn("Only using first contiguous memory region\n");
> > >>>> -#else
> > >>>> +#elif defined(CONFIG_WII)
> > >>>> wii_memory_fixups();
> > >>>> #endif
> > >>>> }
> > >>>> --
> > >>>> 2.35.1
> > >>>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-06-09 22:24 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-06-09 22:24 UTC (permalink / raw)
To: linux-mm; +Cc: linux-kernel, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> + linux-mm
>
> Do you know what are requirements for kernel to support non-contiguous
> memory support and what is needed to enable it for 32-bit powerpc?
Any hints?
> Currently powerpc arch code does not support "memblock.memory.cnt > 1"
> except for WII which seems like a hack... See below.
>
> On Friday 20 May 2022 20:44:04 Ash Logan wrote:
> > On 20/5/22 18:04, Pali Rohár wrote:
> > > On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> > >> On 14/5/22 08:43, Pali Rohár wrote:
> > >>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> > >>>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> > >>>> non-contiguous memory just works.
> > >>>
> > >>> Hello! Does it mean that non-contiguous memory works for any 32-bit
> > >>> powerpc platform, and not only for wiiu? If yes, should not be
> > >>> non-contiguous memory support enabled for all 32-bit ppc boards then?
> > >>
> > >> Hi! Sorry for my delayed response. As best I can tell, it does indeed
> > >> Just Work, but I have only been able to test on wiiu which is missing a
> > >> lot of features other boards have (like PCI) - so it's possible there's
> > >> still an assumption elsewhere in the kernel that I haven't hit.
> > >>
> > >> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
> > >> out there where it's even possible to have non-contiguous memory.
> > >
> > > What is the reason that those two boards are the **only**? Is there some
> > > specific requirement from bootloader or hardware to "enable"
> > > non-contiguous memory support?
> >
> > Not that I know of, I was just saying that I was only aware of those two
> > boards where the memory map isn't contiguous, and that is the only place
> > where it has been tested. Evidently you know of another board!
> >
> > > I'm interested in enabling non-contiguous memory support for P2020-based
> > > board as it has gaps in its 32-bit memory layout and which could be used
> > > for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
> >
> > If it's like the Wii or Wii U (some memory at 0, a gap for MMIO or
> > whatever, then more memory at a higher address) then you should try a
> > patch along these lines, because barring the unknowns I mentioned before
> > it should work. At least as far as I'm aware ;)
> >
> > >>>> Signed-off-by: Ash Logan <ash@heyquark.com>
> > >>>> ---
> > >>>> arch/powerpc/mm/init_32.c | 4 ++--
> > >>>> 1 file changed, 2 insertions(+), 2 deletions(-)
> > >>>>
> > >>>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> > >>>> index 3d690be48e84..59a84629d9a0 100644
> > >>>> --- a/arch/powerpc/mm/init_32.c
> > >>>> +++ b/arch/powerpc/mm/init_32.c
> > >>>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> > >>>> * lowmem_end_addr is initialized below.
> > >>>> */
> > >>>> if (memblock.memory.cnt > 1) {
> > >>>> -#ifndef CONFIG_WII
> > >>>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> > >>>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> > >>>> pr_warn("Only using first contiguous memory region\n");
> > >>>> -#else
> > >>>> +#elif defined(CONFIG_WII)
> > >>>> wii_memory_fixups();
> > >>>> #endif
> > >>>> }
> > >>>> --
> > >>>> 2.35.1
> > >>>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v2 00/12] powerpc: Nintendo Wii U support
2022-03-02 4:43 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
The following patches add basic support for the Nintendo Wii U video
game console, a PowerPC system somewhat similar to the GameCube and
Wii.
This includes:
- devicetree source
- bootwrapper support
- udbg console to bootloader
- early udbg console
- interrupt controllers
- platform support
- recognition of the Espresso processor
- workaround for the discontiguous RAM blocks
This is enough to boot on hardware. dmesg pics (with a small hack to
udbg-immortal, not included):
Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
For those who have hardware and would like to try these patches, some
modification is required to the stock OS to allow Linux. For info:
https://wiki.linux-wiiu.org/wiki/AdvancedSetup
Some of the design choices (new platform > embedded6xx) were discussed
previously:
Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
Turns out even less changes were needed than previously anticipated for
discontiguous memory, and KUAP is yet to give trouble. Thanks to those
who helped and discussed this.
Changes since v1:
- Style and formatting tweaks to the devicetree, thanks Rob Herring for
the review.
Ash Logan (12):
dt-bindings: wiiu: Document the Nintendo Wii U devicetree
powerpc: wiiu: device tree
powerpc: wiiu: bootwrapper support
powerpc: wiiu: introduce wiiu platform
powerpc: wiiu: declare as non-coherent
powerpc: wiiu: udbg support for latteipc
powerpc: wiiu: espresso interrupt controller support
powerpc: wiiu: latte interrupt controller support
powerpc: espresso processor support
powerpc: wiiu: platform support
powerpc: wiiu: don't enforce flat memory
powerpc: wiiu: Add minimal default config
.../bindings/powerpc/nintendo/wiiu.yaml | 28 ++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 +++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++
arch/powerpc/Kconfig.debug | 9 +
arch/powerpc/boot/Makefile | 4 +
arch/powerpc/boot/dts/wiiu.dts | 322 ++++++++++++++++++
arch/powerpc/boot/wiiu-head.S | 103 ++++++
arch/powerpc/boot/wiiu.c | 73 ++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/configs/wiiu_defconfig | 7 +
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/cputable.c | 16 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/mm/init_32.c | 4 +-
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 19 ++
arch/powerpc/platforms/wiiu/Makefile | 4 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
arch/powerpc/platforms/wiiu/setup.c | 67 ++++
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 122 +++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
32 files changed, 1630 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
create mode 100644 arch/powerpc/configs/wiiu_defconfig
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
base-commit: 4b0986a3613c92f4ec1bdc7f60ec66fea135991f
--
2.36.1
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v2 00/12] powerpc: Nintendo Wii U support
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
The following patches add basic support for the Nintendo Wii U video
game console, a PowerPC system somewhat similar to the GameCube and
Wii.
This includes:
- devicetree source
- bootwrapper support
- udbg console to bootloader
- early udbg console
- interrupt controllers
- platform support
- recognition of the Espresso processor
- workaround for the discontiguous RAM blocks
This is enough to boot on hardware. dmesg pics (with a small hack to
udbg-immortal, not included):
Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
For those who have hardware and would like to try these patches, some
modification is required to the stock OS to allow Linux. For info:
https://wiki.linux-wiiu.org/wiki/AdvancedSetup
Some of the design choices (new platform > embedded6xx) were discussed
previously:
Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
Turns out even less changes were needed than previously anticipated for
discontiguous memory, and KUAP is yet to give trouble. Thanks to those
who helped and discussed this.
Changes since v1:
- Style and formatting tweaks to the devicetree, thanks Rob Herring for
the review.
Ash Logan (12):
dt-bindings: wiiu: Document the Nintendo Wii U devicetree
powerpc: wiiu: device tree
powerpc: wiiu: bootwrapper support
powerpc: wiiu: introduce wiiu platform
powerpc: wiiu: declare as non-coherent
powerpc: wiiu: udbg support for latteipc
powerpc: wiiu: espresso interrupt controller support
powerpc: wiiu: latte interrupt controller support
powerpc: espresso processor support
powerpc: wiiu: platform support
powerpc: wiiu: don't enforce flat memory
powerpc: wiiu: Add minimal default config
.../bindings/powerpc/nintendo/wiiu.yaml | 28 ++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 +++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++
arch/powerpc/Kconfig.debug | 9 +
arch/powerpc/boot/Makefile | 4 +
arch/powerpc/boot/dts/wiiu.dts | 322 ++++++++++++++++++
arch/powerpc/boot/wiiu-head.S | 103 ++++++
arch/powerpc/boot/wiiu.c | 73 ++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/configs/wiiu_defconfig | 7 +
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/cputable.c | 16 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/mm/init_32.c | 4 +-
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 19 ++
arch/powerpc/platforms/wiiu/Makefile | 4 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
arch/powerpc/platforms/wiiu/setup.c | 67 ++++
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 122 +++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
32 files changed, 1630 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
create mode 100644 arch/powerpc/configs/wiiu_defconfig
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
base-commit: 4b0986a3613c92f4ec1bdc7f60ec66fea135991f
--
2.36.1
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v2 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Adds schema for the various Wii U devicetree nodes used.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
.../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
8 files changed, 300 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
new file mode 100644
index 000000000000..5824b07928f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U bindings
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U video game console binding.
+
+properties:
+ $nodename:
+ const: "/"
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U video game console
+ items:
+ - const: nintendo,wiiu
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
new file mode 100644
index 000000000000..878a81595f5f
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U "Espresso" interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Espresso" interrupt controller
+ items:
+ - const: nintendo,espresso-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-32 in one cell
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+
+additionalProperties: false
+
+examples:
+ - |
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
new file mode 100644
index 000000000000..e54d49015f36
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte "GPU7" graphics processor
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
+ Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte "GPU7" graphics processor
+ items:
+ - const: nintendo,latte-gpu7
+ reg:
+ items:
+ - description: GpuF0MMReg registers
+ interrupts:
+ items:
+ - description: Main interrupt, connected via Espresso PIC
+
+# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
+additionalProperties: true
+
+examples:
+ - |
+ gpu7@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
new file mode 100644
index 000000000000..7b9de4effcb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte AHCI controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte AHCI controller
+ items:
+ - const: nintendo,latte-ahci
+ reg:
+ items:
+ - description: |
+ HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
+ registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
+ interrupts:
+ items:
+ - description: Main HBA interrupt
+ - description: Vendor debugging interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x408>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38>, <28>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
new file mode 100644
index 000000000000..ed0b4c28ce48
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte DSP
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U digital signal processor, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte DSP
+ items:
+ - const: nintendo,latte-dsp
+ reg:
+ items:
+ - description: DSP registers
+
+# Once more is known about this device more properties will likely be added
+additionalProperties: true
+
+examples:
+ - |
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
new file mode 100644
index 000000000000..a2df71fb9964
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte interrupt controller
+ items:
+ - const: nintendo,latte-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-64 in one cell.
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: Cascade interrupt for Espresso PIC
+
+additionalProperties: false
+
+examples:
+ - |
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
new file mode 100644
index 000000000000..4b9b0820edc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte SD Host controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte SDHCI
+ items:
+ - const: nintendo,latte-sdhci
+ - const: sdhci
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: SDHCI interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
new file mode 100644
index 000000000000..6ae86d198fa3
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Latte system bus
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Latte" SoC
+ items:
+ - const: nintendo,latte
+
+additionalProperties: true
+
+...
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Adds schema for the various Wii U devicetree nodes used.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
.../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
8 files changed, 300 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
new file mode 100644
index 000000000000..5824b07928f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U bindings
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U video game console binding.
+
+properties:
+ $nodename:
+ const: "/"
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U video game console
+ items:
+ - const: nintendo,wiiu
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
new file mode 100644
index 000000000000..878a81595f5f
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U "Espresso" interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Espresso" interrupt controller
+ items:
+ - const: nintendo,espresso-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-32 in one cell
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+
+additionalProperties: false
+
+examples:
+ - |
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
new file mode 100644
index 000000000000..e54d49015f36
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte "GPU7" graphics processor
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
+ Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte "GPU7" graphics processor
+ items:
+ - const: nintendo,latte-gpu7
+ reg:
+ items:
+ - description: GpuF0MMReg registers
+ interrupts:
+ items:
+ - description: Main interrupt, connected via Espresso PIC
+
+# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
+additionalProperties: true
+
+examples:
+ - |
+ gpu7@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
new file mode 100644
index 000000000000..7b9de4effcb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte AHCI controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte AHCI controller
+ items:
+ - const: nintendo,latte-ahci
+ reg:
+ items:
+ - description: |
+ HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
+ registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
+ interrupts:
+ items:
+ - description: Main HBA interrupt
+ - description: Vendor debugging interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x408>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38>, <28>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
new file mode 100644
index 000000000000..ed0b4c28ce48
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte DSP
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U digital signal processor, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte DSP
+ items:
+ - const: nintendo,latte-dsp
+ reg:
+ items:
+ - description: DSP registers
+
+# Once more is known about this device more properties will likely be added
+additionalProperties: true
+
+examples:
+ - |
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
new file mode 100644
index 000000000000..a2df71fb9964
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte interrupt controller
+ items:
+ - const: nintendo,latte-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-64 in one cell.
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: Cascade interrupt for Espresso PIC
+
+additionalProperties: false
+
+examples:
+ - |
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
new file mode 100644
index 000000000000..4b9b0820edc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte SD Host controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte SDHCI
+ items:
+ - const: nintendo,latte-sdhci
+ - const: sdhci
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: SDHCI interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
new file mode 100644
index 000000000000..6ae86d198fa3
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Latte system bus
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Latte" SoC
+ items:
+ - const: nintendo,latte
+
+additionalProperties: true
+
+...
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 02/12] powerpc: wiiu: device tree
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Add a device tree source file for the Nintendo Wii U video game console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v1->v2: Style and formatting changes suggested by Rob Herring.
License remains GPL-2.0 as the other powerpc dtses are the same, happy
to change if there is a different preferred default.
arch/powerpc/boot/dts/wiiu.dts | 322 +++++++++++++++++++++++++++++++++
1 file changed, 322 insertions(+)
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
new file mode 100644
index 000000000000..def648d4362d
--- /dev/null
+++ b/arch/powerpc/boot/dts/wiiu.dts
@@ -0,0 +1,322 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nintendo Wii U Device Tree Source
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "nintendo,wiiu";
+ compatible = "nintendo,wiiu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs = "root=/dev/sda1 rootwait";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
+ 0x08000000 0x00300000 /* MEM0 - 3MiB */
+ 0x10000000 0x80000000>; /* MEM2 - 2GiB */
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* TODO: Add SMP */
+ PowerPC,espresso@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <1243125000>; /* 1.243125GHz */
+ bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
+ timebase-frequency = <62156250>; /* 1/4 of the bus clock */
+ i-cache-size = <32768>; /* 32K icache */
+ i-cache-line-size = <32>;
+ i-cache-block-size = <32>;
+ i-cache-sets = <128>;
+ d-cache-size = <32768>; /* 32K dcache */
+ d-cache-line-size = <32>;
+ d-cache-block-size = <32>;
+ d-cache-sets = <128>;
+ next-level-cache = <&L2_0>;
+ L2_0:l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>; /* 512KB L2 */
+ cache-line-size = <64>;
+ cache-block-size = <32>;
+ cache-sets = <2048>;
+ };
+ };
+ };
+
+ latte {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "nintendo,latte";
+ ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
+ 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
+ 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
+
+ gpu@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+
+ ehci_0: usb@d040000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d040000 0x100>;
+ interrupts = <4>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_0: usb@d050000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d050000 0x100>;
+ interrupts = <5>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ohci_0_1: usb@d060000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d060000 0x100>;
+ interrupts = <6>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_1: usb@d120000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d120000 0x100>;
+ interrupts = <16>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_1_0: usb@d130000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d130000 0x100>;
+ interrupts = <35>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_2: usb@d140000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d140000 0x100>;
+ interrupts = <36>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_2_0: usb@d150000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d150000 0x100>;
+ interrupts = <37>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ wifi_0: sdhci@d080000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d080000 0x200>;
+ interrupts = <8>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ legacy_ipc: ipc@d800000 {
+ compatible = "nintendo,latte-ipc", "nintendo,hollywood-ipc";
+ reg = <0x0d800000 0x10>;
+ interrupts = <30 31>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ latte_otp: otp@d8001ec {
+ compatible = "nintendo,latte-otp";
+ reg = <0x0d8001ec 0x8>;
+ };
+
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x808>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38 28>;
+ };
+
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+
+ gpio: gpio@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d8000c0 0x40>;
+ gpio-controller;
+ /* TODO: There are actually 31 AHBALL GPIOs */
+ ngpios = <24>;
+
+ gpio-line-names =
+ "POWER", "DWIFI", "FAN", "DC_DC",
+ "", "Esp10WorkAround", "", "",
+ "PADPD", "", "EEP_CS", "EEP_CLK",
+ "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
+ "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
+ "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ gpio2: gpio@d800520 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d800520 0x40>;
+ gpio-controller;
+ ngpios = <7>;
+
+ gpio-line-names =
+ "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
+ "AVE_INT", "", "AVE_RESET";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+ };
+
+ spi_gpio: spi-gpio {
+ cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+ gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ eeprom@0 {
+ compatible = "atmel,at93c66";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ /* TODO: wiiubrew says this is 16-bit, but I only get the correct
+ * values in 8-bit...
+ */
+ data-size = <8>;
+ read-only;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
+ rng_seed: rng@12 { reg = <0x012 8>; };
+ ppc_pvr: pvr@20 { reg = <0x020 4>; };
+ seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
+ seeprom_ver: sver@2a { reg = <0x02A 2>; };
+ otp_ver: over@2c { reg = <0x02C 2>; };
+ otp_rev: orev@2e { reg = <0x02E 2>; };
+ otp_ver_str: over-str@30 { reg = <0x030 8>; };
+
+ bc_crc: bc-crc@38 { reg = <0x038 4>; };
+ bc_sz: bc-sz@3c { reg = <0x03C 2>; };
+ bc_ver: bc-ver@3e { reg = <0x03E 2>; };
+ bc_boardtype: boardtype@42 { reg = <0x042 2>; };
+ bc_boardrev: boardrev@44 { reg = <0x044 2>; };
+ bc_bootsource: bootsource@46 { reg = <0x046 2>; };
+ bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
+ bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
+ bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
+ bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
+ bc_video1080p: video1080p@50 { reg = <0x050 2>; };
+ bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
+ bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
+ bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
+ bc_satadevice: satadevice@58 { reg = <0x058 2>; };
+ bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
+ bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
+
+ drive_key: drvkey@80 { reg = <0x080 16>; };
+ factory_key: fackey@90 { reg = <0x090 16>; };
+ shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
+ usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
+ drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
+ usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
+ shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
+
+ sysprod_version: sp_ver@140 { reg = <0x140 4>; };
+ sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
+ sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
+ sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
+ sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
+ sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
+ sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
+ sysprod_code: sp_code@158 { reg = <0x158 8>; };
+ sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
+ sysprod_model: sp_model@170 { reg = <0x170 16>; };
+
+ prod_year: pyear@188 { reg = <0x188 2>; };
+ prod_date: pdate@18a { reg = <0x18A 2>; };
+ prod_time: ptime@18c { reg = <0x18C 2>; };
+
+ boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
+ };
+ };
+
+ /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
+ gpio-keys-polled {
+ poll-interval = <50>;
+ compatible = "gpio-keys-polled";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 02/12] powerpc: wiiu: device tree
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Add a device tree source file for the Nintendo Wii U video game console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v1->v2: Style and formatting changes suggested by Rob Herring.
License remains GPL-2.0 as the other powerpc dtses are the same, happy
to change if there is a different preferred default.
arch/powerpc/boot/dts/wiiu.dts | 322 +++++++++++++++++++++++++++++++++
1 file changed, 322 insertions(+)
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
new file mode 100644
index 000000000000..def648d4362d
--- /dev/null
+++ b/arch/powerpc/boot/dts/wiiu.dts
@@ -0,0 +1,322 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nintendo Wii U Device Tree Source
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "nintendo,wiiu";
+ compatible = "nintendo,wiiu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs = "root=/dev/sda1 rootwait";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
+ 0x08000000 0x00300000 /* MEM0 - 3MiB */
+ 0x10000000 0x80000000>; /* MEM2 - 2GiB */
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* TODO: Add SMP */
+ PowerPC,espresso@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <1243125000>; /* 1.243125GHz */
+ bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
+ timebase-frequency = <62156250>; /* 1/4 of the bus clock */
+ i-cache-size = <32768>; /* 32K icache */
+ i-cache-line-size = <32>;
+ i-cache-block-size = <32>;
+ i-cache-sets = <128>;
+ d-cache-size = <32768>; /* 32K dcache */
+ d-cache-line-size = <32>;
+ d-cache-block-size = <32>;
+ d-cache-sets = <128>;
+ next-level-cache = <&L2_0>;
+ L2_0:l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>; /* 512KB L2 */
+ cache-line-size = <64>;
+ cache-block-size = <32>;
+ cache-sets = <2048>;
+ };
+ };
+ };
+
+ latte {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "nintendo,latte";
+ ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
+ 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
+ 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
+
+ gpu@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+
+ ehci_0: usb@d040000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d040000 0x100>;
+ interrupts = <4>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_0: usb@d050000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d050000 0x100>;
+ interrupts = <5>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ohci_0_1: usb@d060000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d060000 0x100>;
+ interrupts = <6>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_1: usb@d120000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d120000 0x100>;
+ interrupts = <16>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_1_0: usb@d130000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d130000 0x100>;
+ interrupts = <35>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_2: usb@d140000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d140000 0x100>;
+ interrupts = <36>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_2_0: usb@d150000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d150000 0x100>;
+ interrupts = <37>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ wifi_0: sdhci@d080000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d080000 0x200>;
+ interrupts = <8>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ legacy_ipc: ipc@d800000 {
+ compatible = "nintendo,latte-ipc", "nintendo,hollywood-ipc";
+ reg = <0x0d800000 0x10>;
+ interrupts = <30 31>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ latte_otp: otp@d8001ec {
+ compatible = "nintendo,latte-otp";
+ reg = <0x0d8001ec 0x8>;
+ };
+
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x808>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38 28>;
+ };
+
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+
+ gpio: gpio@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d8000c0 0x40>;
+ gpio-controller;
+ /* TODO: There are actually 31 AHBALL GPIOs */
+ ngpios = <24>;
+
+ gpio-line-names =
+ "POWER", "DWIFI", "FAN", "DC_DC",
+ "", "Esp10WorkAround", "", "",
+ "PADPD", "", "EEP_CS", "EEP_CLK",
+ "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
+ "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
+ "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ gpio2: gpio@d800520 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d800520 0x40>;
+ gpio-controller;
+ ngpios = <7>;
+
+ gpio-line-names =
+ "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
+ "AVE_INT", "", "AVE_RESET";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+ };
+
+ spi_gpio: spi-gpio {
+ cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+ gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ eeprom@0 {
+ compatible = "atmel,at93c66";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ /* TODO: wiiubrew says this is 16-bit, but I only get the correct
+ * values in 8-bit...
+ */
+ data-size = <8>;
+ read-only;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
+ rng_seed: rng@12 { reg = <0x012 8>; };
+ ppc_pvr: pvr@20 { reg = <0x020 4>; };
+ seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
+ seeprom_ver: sver@2a { reg = <0x02A 2>; };
+ otp_ver: over@2c { reg = <0x02C 2>; };
+ otp_rev: orev@2e { reg = <0x02E 2>; };
+ otp_ver_str: over-str@30 { reg = <0x030 8>; };
+
+ bc_crc: bc-crc@38 { reg = <0x038 4>; };
+ bc_sz: bc-sz@3c { reg = <0x03C 2>; };
+ bc_ver: bc-ver@3e { reg = <0x03E 2>; };
+ bc_boardtype: boardtype@42 { reg = <0x042 2>; };
+ bc_boardrev: boardrev@44 { reg = <0x044 2>; };
+ bc_bootsource: bootsource@46 { reg = <0x046 2>; };
+ bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
+ bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
+ bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
+ bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
+ bc_video1080p: video1080p@50 { reg = <0x050 2>; };
+ bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
+ bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
+ bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
+ bc_satadevice: satadevice@58 { reg = <0x058 2>; };
+ bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
+ bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
+
+ drive_key: drvkey@80 { reg = <0x080 16>; };
+ factory_key: fackey@90 { reg = <0x090 16>; };
+ shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
+ usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
+ drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
+ usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
+ shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
+
+ sysprod_version: sp_ver@140 { reg = <0x140 4>; };
+ sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
+ sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
+ sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
+ sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
+ sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
+ sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
+ sysprod_code: sp_code@158 { reg = <0x158 8>; };
+ sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
+ sysprod_model: sp_model@170 { reg = <0x170 16>; };
+
+ prod_year: pyear@188 { reg = <0x188 2>; };
+ prod_date: pdate@18a { reg = <0x18A 2>; };
+ prod_time: ptime@18c { reg = <0x18C 2>; };
+
+ boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
+ };
+ };
+
+ /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
+ gpio-keys-polled {
+ poll-interval = <50>;
+ compatible = "gpio-keys-polled";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 03/12] powerpc: wiiu: bootwrapper support
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Add support for the Nintendo Wii U game console to the powerpc
bootwrapper.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/Makefile | 4 ++
arch/powerpc/boot/wiiu-head.S | 103 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/wiiu.c | 73 ++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 4b4827c475c6..74e77f072e35 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -155,6 +155,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
gamecube-head.S gamecube.c \
wii-head.S wii.c holly.c \
fixed-head.S mvme5100.c
+src-plat-$(CONFIG_WIIU) += wiiu-head.S wiiu.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -353,6 +354,9 @@ image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
image-$(CONFIG_WII) += dtbImage.wii
image-$(CONFIG_MVME5100) += dtbImage.mvme5100
+# Board port in arch/powerpc/platform/wiiu/Kconfig
+image-$(CONFIG_WIIU) += dtbImage.wiiu
+
# Board port in arch/powerpc/platform/amigaone/Kconfig
image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/wiiu-head.S b/arch/powerpc/boot/wiiu-head.S
new file mode 100644
index 000000000000..8586e2e992d5
--- /dev/null
+++ b/arch/powerpc/boot/wiiu-head.S
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entrypoint head asm
+ * This code expects to be called directly after the Espresso BootROM, which implies certain MSR
+ * states.
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include "ppc_asm.h"
+
+.text
+.global _zimage_start
+_zimage_start:
+ /* Clear out all BATs. MMU is already off. */
+ li r8, 0
+
+ mtspr 0x210, r8 /* IBAT0U */
+ mtspr 0x212, r8 /* IBAT1U */
+ mtspr 0x214, r8 /* IBAT2U */
+ mtspr 0x216, r8 /* IBAT3U */
+ mtspr 0x218, r8 /* DBAT0U */
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x21c, r8 /* DBAT2U */
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ mtspr 0x230, r8 /* IBAT4U */
+ mtspr 0x232, r8 /* IBAT5U */
+ mtspr 0x234, r8 /* IBAT6U */
+ mtspr 0x236, r8 /* IBAT7U */
+ mtspr 0x238, r8 /* DBAT4U */
+ mtspr 0x23a, r8 /* DBAT5U */
+ mtspr 0x23c, r8 /* DBAT6U */
+ mtspr 0x23e, r8 /* DBAT7U */
+
+ /* MEM1 */
+ /* 32MB, starting at 0x00000000... */
+ li r8, 0x000003ff@l
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x212, r8 /* IBAT1U */
+
+ /* mapped into phys 0x00000000; read-write; normal caching. */
+ li r8, 0x00000002@l
+ mtspr 0x21b, r8 /* DBAT1L */
+ mtspr 0x213, r8 /* IBAT1L */
+
+ /* Latte MMIO area */
+ /* 64MB, starting at 0x0d800000... */
+ lis r8, 0x0d8007ff@h
+ ori r8, r8,0x0d800007ff@l
+ mtspr 0x21c, r8 /* DBAT2U */
+
+ /* mapped into phys 0x0d800000; read-write; writethrough/nocache/guard*/
+ lis r8, 0x0d80006A@h
+ ori r8, r8,0x0d80006A@l
+ mtspr 0x21d, r8 /* DBAT2L */
+
+ /* Bootloader comms area (actually 0x89200000) */
+ /* 128MiB, starting at 0x88000000... */
+ lis r8, 0x88000fff@h
+ ori r8, r8, 0x88000fff@l
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ /* mapped into phys 0x88000000; read-write; normal caching. */
+ lis r8, 0x88000002@h
+ ori r8, r8, 0x88000002@l
+ mtspr 0x21f, r8 /* DBAT3L */
+
+ /* Turn on BAT 4 through 7, configure CPU */
+ mfspr r8, 0x3f3 /* HID4 */
+ oris r8, r8, 0x3200 /* L2FM: 64-byte fetch, BPD: max depth is 4, SBE */
+ mtspr 0x3f3, r8
+
+ /* Turn on and invalidate caches */
+ mfspr r8, 0x3f0 /* HID0 */
+ /* HID0_ICE | HID0_ICFI | HID0_DCE | HID0_DCFI */
+ ori r8, r8, (1 << 15) | (1 << 11) | (1 << 14) | (1 << 10)
+ mtspr 0x3f0, r8
+ isync
+
+ li r3, 0
+ li r4, 0
+ li r5, 0
+
+ bl get_lr
+get_lr:
+ mflr r8
+ /* Get absolute address of done */
+ addi r8, r8, done - get_lr
+
+ /* Set up MSR */
+ /* MSR_DR | MSR_IR | MSR_FP */
+ /* Data/instruction MMUs, FPU because why not */
+ ori r9, r3, (1 << 4) | (1 << 5) | (1 << 13)
+
+ /* Apply our new MSR, starting execution at "done" */
+ mtsrr0 r8
+ mtsrr1 r9
+ sync
+ rfi
+done:
+ b _zimage_start_lib
diff --git a/arch/powerpc/boot/wiiu.c b/arch/powerpc/boot/wiiu.c
new file mode 100644
index 000000000000..fe88eb2c42ae
--- /dev/null
+++ b/arch/powerpc/boot/wiiu.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Platform support and IPC debug console to linux-loader (on Starbuck)
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include <stddef.h>
+#include "string.h"
+#include "stdio.h"
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+BSS_STACK(8192);
+
+// Volatile is used here since the io.h routines require it
+#define LT_IPC_PPCMSG ((volatile u32 *)0x0d800000)
+#define LT_IPC_PPCCTRL ((volatile u32 *)0x0d800004)
+#define LT_IPC_PPCCTRL_X1 0x1
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+static void wiiu_ipc_sendmsg(int msg)
+{
+ out_be32(LT_IPC_PPCMSG, msg);
+ out_be32(LT_IPC_PPCCTRL, LT_IPC_PPCCTRL_X1);
+ while (in_be32(LT_IPC_PPCCTRL) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Send logging string out over IPC to linux-loader for early printing.
+ * Packs 3 chars at a time where possible.
+ */
+static void wiiu_write_ipc(const char *buf, int len)
+{
+ int i = 0;
+
+ for (i = 0; i + 2 < len; i += 3) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i + 0] << 16) |
+ (buf[i + 1] << 8) | buf[i + 2];
+
+ wiiu_ipc_sendmsg(msg);
+ }
+
+ if (i < len) {
+ for (; i < len; i++) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i] << 16);
+
+ wiiu_ipc_sendmsg(msg);
+ }
+ }
+}
+
+/*
+ * Note 32MiB heap - not ideal but seems fine for the bootwrapper
+ */
+void platform_init(unsigned int r3, unsigned int r4, unsigned int r5)
+{
+ u32 heapsize;
+
+ console_ops.write = wiiu_write_ipc;
+ printf("wiiu: bootwrapper ok\n");
+
+ heapsize = 32 * 1024 * 1024 - (u32)_end;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ printf("wiiu: heap ok\n");
+
+ fdt_init(_dtb_start);
+ printf("wiiu: dtb ok\n");
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 9184eda780fd..f42abe4ebde2 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -344,6 +344,10 @@ gamecube|wii)
link_address='0x600000'
platformo="$object/$platform-head.o $object/$platform.o"
;;
+wiiu)
+ link_address='0x600000'
+ platformo="$object/wiiu-head.o $object/$platform.o"
+ ;;
microwatt)
link_address='0x500000'
platformo="$object/fixed-head.o $object/$platform.o"
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 03/12] powerpc: wiiu: bootwrapper support
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Add support for the Nintendo Wii U game console to the powerpc
bootwrapper.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/Makefile | 4 ++
arch/powerpc/boot/wiiu-head.S | 103 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/wiiu.c | 73 ++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 4b4827c475c6..74e77f072e35 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -155,6 +155,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
gamecube-head.S gamecube.c \
wii-head.S wii.c holly.c \
fixed-head.S mvme5100.c
+src-plat-$(CONFIG_WIIU) += wiiu-head.S wiiu.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -353,6 +354,9 @@ image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
image-$(CONFIG_WII) += dtbImage.wii
image-$(CONFIG_MVME5100) += dtbImage.mvme5100
+# Board port in arch/powerpc/platform/wiiu/Kconfig
+image-$(CONFIG_WIIU) += dtbImage.wiiu
+
# Board port in arch/powerpc/platform/amigaone/Kconfig
image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/wiiu-head.S b/arch/powerpc/boot/wiiu-head.S
new file mode 100644
index 000000000000..8586e2e992d5
--- /dev/null
+++ b/arch/powerpc/boot/wiiu-head.S
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entrypoint head asm
+ * This code expects to be called directly after the Espresso BootROM, which implies certain MSR
+ * states.
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include "ppc_asm.h"
+
+.text
+.global _zimage_start
+_zimage_start:
+ /* Clear out all BATs. MMU is already off. */
+ li r8, 0
+
+ mtspr 0x210, r8 /* IBAT0U */
+ mtspr 0x212, r8 /* IBAT1U */
+ mtspr 0x214, r8 /* IBAT2U */
+ mtspr 0x216, r8 /* IBAT3U */
+ mtspr 0x218, r8 /* DBAT0U */
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x21c, r8 /* DBAT2U */
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ mtspr 0x230, r8 /* IBAT4U */
+ mtspr 0x232, r8 /* IBAT5U */
+ mtspr 0x234, r8 /* IBAT6U */
+ mtspr 0x236, r8 /* IBAT7U */
+ mtspr 0x238, r8 /* DBAT4U */
+ mtspr 0x23a, r8 /* DBAT5U */
+ mtspr 0x23c, r8 /* DBAT6U */
+ mtspr 0x23e, r8 /* DBAT7U */
+
+ /* MEM1 */
+ /* 32MB, starting at 0x00000000... */
+ li r8, 0x000003ff@l
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x212, r8 /* IBAT1U */
+
+ /* mapped into phys 0x00000000; read-write; normal caching. */
+ li r8, 0x00000002@l
+ mtspr 0x21b, r8 /* DBAT1L */
+ mtspr 0x213, r8 /* IBAT1L */
+
+ /* Latte MMIO area */
+ /* 64MB, starting at 0x0d800000... */
+ lis r8, 0x0d8007ff@h
+ ori r8, r8,0x0d800007ff@l
+ mtspr 0x21c, r8 /* DBAT2U */
+
+ /* mapped into phys 0x0d800000; read-write; writethrough/nocache/guard*/
+ lis r8, 0x0d80006A@h
+ ori r8, r8,0x0d80006A@l
+ mtspr 0x21d, r8 /* DBAT2L */
+
+ /* Bootloader comms area (actually 0x89200000) */
+ /* 128MiB, starting at 0x88000000... */
+ lis r8, 0x88000fff@h
+ ori r8, r8, 0x88000fff@l
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ /* mapped into phys 0x88000000; read-write; normal caching. */
+ lis r8, 0x88000002@h
+ ori r8, r8, 0x88000002@l
+ mtspr 0x21f, r8 /* DBAT3L */
+
+ /* Turn on BAT 4 through 7, configure CPU */
+ mfspr r8, 0x3f3 /* HID4 */
+ oris r8, r8, 0x3200 /* L2FM: 64-byte fetch, BPD: max depth is 4, SBE */
+ mtspr 0x3f3, r8
+
+ /* Turn on and invalidate caches */
+ mfspr r8, 0x3f0 /* HID0 */
+ /* HID0_ICE | HID0_ICFI | HID0_DCE | HID0_DCFI */
+ ori r8, r8, (1 << 15) | (1 << 11) | (1 << 14) | (1 << 10)
+ mtspr 0x3f0, r8
+ isync
+
+ li r3, 0
+ li r4, 0
+ li r5, 0
+
+ bl get_lr
+get_lr:
+ mflr r8
+ /* Get absolute address of done */
+ addi r8, r8, done - get_lr
+
+ /* Set up MSR */
+ /* MSR_DR | MSR_IR | MSR_FP */
+ /* Data/instruction MMUs, FPU because why not */
+ ori r9, r3, (1 << 4) | (1 << 5) | (1 << 13)
+
+ /* Apply our new MSR, starting execution at "done" */
+ mtsrr0 r8
+ mtsrr1 r9
+ sync
+ rfi
+done:
+ b _zimage_start_lib
diff --git a/arch/powerpc/boot/wiiu.c b/arch/powerpc/boot/wiiu.c
new file mode 100644
index 000000000000..fe88eb2c42ae
--- /dev/null
+++ b/arch/powerpc/boot/wiiu.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Platform support and IPC debug console to linux-loader (on Starbuck)
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include <stddef.h>
+#include "string.h"
+#include "stdio.h"
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+BSS_STACK(8192);
+
+// Volatile is used here since the io.h routines require it
+#define LT_IPC_PPCMSG ((volatile u32 *)0x0d800000)
+#define LT_IPC_PPCCTRL ((volatile u32 *)0x0d800004)
+#define LT_IPC_PPCCTRL_X1 0x1
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+static void wiiu_ipc_sendmsg(int msg)
+{
+ out_be32(LT_IPC_PPCMSG, msg);
+ out_be32(LT_IPC_PPCCTRL, LT_IPC_PPCCTRL_X1);
+ while (in_be32(LT_IPC_PPCCTRL) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Send logging string out over IPC to linux-loader for early printing.
+ * Packs 3 chars at a time where possible.
+ */
+static void wiiu_write_ipc(const char *buf, int len)
+{
+ int i = 0;
+
+ for (i = 0; i + 2 < len; i += 3) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i + 0] << 16) |
+ (buf[i + 1] << 8) | buf[i + 2];
+
+ wiiu_ipc_sendmsg(msg);
+ }
+
+ if (i < len) {
+ for (; i < len; i++) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i] << 16);
+
+ wiiu_ipc_sendmsg(msg);
+ }
+ }
+}
+
+/*
+ * Note 32MiB heap - not ideal but seems fine for the bootwrapper
+ */
+void platform_init(unsigned int r3, unsigned int r4, unsigned int r5)
+{
+ u32 heapsize;
+
+ console_ops.write = wiiu_write_ipc;
+ printf("wiiu: bootwrapper ok\n");
+
+ heapsize = 32 * 1024 * 1024 - (u32)_end;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ printf("wiiu: heap ok\n");
+
+ fdt_init(_dtb_start);
+ printf("wiiu: dtb ok\n");
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 9184eda780fd..f42abe4ebde2 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -344,6 +344,10 @@ gamecube|wii)
link_address='0x600000'
platformo="$object/$platform-head.o $object/$platform.o"
;;
+wiiu)
+ link_address='0x600000'
+ platformo="$object/wiiu-head.o $object/$platform.o"
+ ;;
microwatt)
link_address='0x500000'
platformo="$object/fixed-head.o $object/$platform.o"
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 04/12] powerpc: wiiu: introduce wiiu platform
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Adds empty platforms/wiiu for Nintendo Wii U console
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 5 +++++
arch/powerpc/platforms/wiiu/Makefile | 1 +
4 files changed, 8 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d41dad227de8..c4a9c3c0b409 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/wiiu/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 94470fb27c99..944ddd938711 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
obj-$(CONFIG_PPC_MICROWATT) += microwatt/
+obj-$(CONFIG_WIIU) += wiiu/
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
new file mode 100644
index 000000000000..e5513205da3c
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config WIIU
+ bool "Nintendo Wii U"
+ depends on PPC_BOOK3S_32
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
new file mode 100644
index 000000000000..f66554cd5c45
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: GPL-2.0
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 04/12] powerpc: wiiu: introduce wiiu platform
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Adds empty platforms/wiiu for Nintendo Wii U console
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 5 +++++
arch/powerpc/platforms/wiiu/Makefile | 1 +
4 files changed, 8 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d41dad227de8..c4a9c3c0b409 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/wiiu/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 94470fb27c99..944ddd938711 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
obj-$(CONFIG_PPC_MICROWATT) += microwatt/
+obj-$(CONFIG_WIIU) += wiiu/
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
new file mode 100644
index 000000000000..e5513205da3c
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config WIIU
+ bool "Nintendo Wii U"
+ depends on PPC_BOOK3S_32
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
new file mode 100644
index 000000000000..f66554cd5c45
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: GPL-2.0
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 05/12] powerpc: wiiu: declare as non-coherent
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
The Nintendo Wii U requires explicit cache handling when interfacing
with DMA devices.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index e2e1fec91c6e..fd1e82603278 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -504,7 +504,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ GAMECUBE_COMMON || AMIGAONE || WIIU
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 05/12] powerpc: wiiu: declare as non-coherent
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
The Nintendo Wii U requires explicit cache handling when interfacing
with DMA devices.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index e2e1fec91c6e..fd1e82603278 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -504,7 +504,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ GAMECUBE_COMMON || AMIGAONE || WIIU
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 06/12] powerpc: wiiu: udbg support for latteipc
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Add support for using the Latte chipset IPC for udbg on the Nintendo Wii
U console.
These messages can then be received by a special firmware running on the
"Starbuck" coprocessor.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/Kconfig.debug | 9 ++
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/wiiu/Kconfig | 13 +++
arch/powerpc/platforms/wiiu/Makefile | 2 +
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 122 ++++++++++++++++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 +++++
8 files changed, 197 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 192f0ed0097f..15c7fa7c040a 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,15 @@ config PPC_EARLY_DEBUG_USBGECKO
Select this to enable early debugging for Nintendo GameCube/Wii
consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_LATTEIPC
+ bool "Early debugging through Latte chipset IPC"
+ depends on WIIU
+ select LATTEIPC_UDBG
+ help
+ Select this to enable early debugging for Nintendo Wii U consoles via
+ chipset IPC to the security coprocessor. This assumes a firmware is
+ running on the coprocessor to receive messages.
+
config PPC_EARLY_DEBUG_PS3GELIC
bool "Early debugging through the PS3 Ethernet port"
depends on PPC_PS3
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index b4aa0d88ce2c..266b0e744ddc 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -53,6 +53,7 @@ extern void __init udbg_init_ehv_bc(void);
extern void __init udbg_init_ps3gelic(void);
extern void __init udbg_init_debug_opal_raw(void);
extern void __init udbg_init_debug_opal_hvsi(void);
+extern void __init udbg_init_latteipc(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 6c739beb938c..48d487efb25c 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -164,6 +164,9 @@ __after_mmu_off:
#ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO
bl setup_usbgecko_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+ bl setup_latteipc_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1201,4 +1204,21 @@ setup_usbgecko_bat:
blr
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+setup_latteipc_bat:
+ /* prepare a BAT for early io */
+ lis r8, 0x0d80
+
+ /*
+ * The virtual address used must match the virtual address
+ * associated to the fixmap entry FIX_EARLY_DEBUG_BASE.
+ */
+ lis r11, 0xfffe /* top 128K */
+ ori r8, r8, 0x002a /* uncached, guarded ,rw */
+ ori r11, r11, 0x2 /* 128K, Vs=1, Vp=0 */
+ mtspr SPRN_DBAT1L, r8
+ mtspr SPRN_DBAT1U, r11
+ blr
+#endif
+
.data
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index b1544b2f6321..84eae25c195e 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -67,6 +67,9 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_raw();
#elif defined(CONFIG_PPC_EARLY_DEBUG_OPAL_HVSI)
udbg_init_debug_opal_hvsi();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_LATTEIPC)
+ /* For use on Nintendo Wii U */
+ udbg_init_latteipc();
#endif
#ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index e5513205da3c..fa86cbc33d5e 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,3 +3,16 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+
+config LATTEIPC_UDBG
+ bool "Chipset IPC udbg console for the Nintendo Wii U"
+ depends on WIIU
+ help
+ If you say yes to this option, support will be included for the
+ Wii U's chipset IPC as a udbg console.
+ These IPC messages can be received by a firmware running on the
+ console's "Starbuck" security coprocessor.
+
+ This driver bypasses the IPC layer completely.
+
+ If in doubt, say N here.
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index f66554cd5c45..b1e0e1307f6e 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.c b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
new file mode 100644
index 000000000000..d546b3ba9bab
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.c
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#include <mm/mmu_decl.h>
+
+#include <linux/io.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/fixmap.h>
+
+#define LT_MMIO_BASE ((phys_addr_t)0x0d800000)
+#define LT_IPC_PPCMSG 0x00
+#define LT_IPC_PPCCTRL 0x04
+#define LT_IPC_PPCCTRL_X1 0x01
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+void __iomem *latteipc_io_base;
+
+/*
+ * Transmits a character.
+ * Sends over IPC to linux-loader for printing.
+ */
+static void latteipc_udbg_putc(char c)
+{
+ void __iomem *ppcmsg_reg = latteipc_io_base + LT_IPC_PPCMSG;
+ void __iomem *ppcctrl_reg = latteipc_io_base + LT_IPC_PPCCTRL;
+
+ out_be32(ppcmsg_reg, WIIU_LOADER_CMD_PRINT | (c << 16));
+ out_be32(ppcctrl_reg, LT_IPC_PPCCTRL_X1);
+
+ while (in_be32(ppcctrl_reg) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Retrieves and prepares the virtual address needed to access the hardware.
+ */
+static void __iomem *latteipc_udbg_setup_ipc_io_base(struct device_node *np)
+{
+ void __iomem *ipc_io_base = NULL;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ reg = of_get_property(np, "reg", NULL);
+ if (reg) {
+ paddr = of_translate_address(np, reg);
+ if (paddr)
+ ipc_io_base = ioremap(paddr, reg[1]);
+ }
+ return ipc_io_base;
+}
+
+/*
+ * Latte IPC udbg support initialization.
+ */
+void __init latteipc_udbg_init(void)
+{
+ struct device_node *np;
+ void __iomem *ipc_io_base;
+
+ if (latteipc_io_base)
+ udbg_printf("%s: early -> final\n", __func__);
+
+ np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
+ if (!np) {
+ udbg_printf("%s: IPC node not found\n", __func__);
+ goto out;
+ }
+
+ ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
+ if (!ipc_io_base) {
+ udbg_printf("%s: failed to setup IPC io base\n", __func__);
+ goto done;
+ }
+
+ udbg_putc = latteipc_udbg_putc;
+ udbg_printf("latteipc_udbg: ready\n");
+
+done:
+ of_node_put(np);
+out:
+ return;
+}
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+
+void __init udbg_init_latteipc(void)
+{
+ /*
+ * At this point we have a BAT already setup that enables I/O
+ * to the IPC hardware.
+ *
+ * The BAT uses a virtual address range reserved at the fixmap.
+ * This must match the virtual address configured in
+ * head_32.S:setup_latteipc_bat().
+ */
+ latteipc_io_base = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE);
+
+ /* Assume a firmware is present, add hooks */
+ udbg_putc = latteipc_udbg_putc;
+
+ /*
+ * Prepare again the same BAT for MMU_init.
+ * This allows udbg I/O to continue working after the MMU is
+ * turned on for real.
+ * It is safe to continue using the same virtual address as it is
+ * a reserved fixmap area.
+ */
+ setbat(1, (unsigned long)latteipc_io_base, LT_MMIO_BASE, 128 * 1024,
+ PAGE_KERNEL_NCG);
+}
+
+#endif /* CONFIG_PPC_EARLY_DEBUG_LATTEIPC */
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.h b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
new file mode 100644
index 000000000000..ca6d34e49158
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.h
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#ifndef __LATTEIPC_UDBG_H
+#define __LATTEIPC_UDBG_H
+
+#ifdef CONFIG_LATTEIPC_UDBG
+
+void __init latteipc_udbg_init(void);
+
+#else
+
+static inline void __init latteipc_udbg_init(void)
+{
+}
+
+#endif /* CONFIG_LATTEIPC_UDBG */
+
+#endif /* __LATTEIPC_UDBG_H */
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 06/12] powerpc: wiiu: udbg support for latteipc
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Add support for using the Latte chipset IPC for udbg on the Nintendo Wii
U console.
These messages can then be received by a special firmware running on the
"Starbuck" coprocessor.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/Kconfig.debug | 9 ++
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/wiiu/Kconfig | 13 +++
arch/powerpc/platforms/wiiu/Makefile | 2 +
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 122 ++++++++++++++++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 +++++
8 files changed, 197 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 192f0ed0097f..15c7fa7c040a 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,15 @@ config PPC_EARLY_DEBUG_USBGECKO
Select this to enable early debugging for Nintendo GameCube/Wii
consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_LATTEIPC
+ bool "Early debugging through Latte chipset IPC"
+ depends on WIIU
+ select LATTEIPC_UDBG
+ help
+ Select this to enable early debugging for Nintendo Wii U consoles via
+ chipset IPC to the security coprocessor. This assumes a firmware is
+ running on the coprocessor to receive messages.
+
config PPC_EARLY_DEBUG_PS3GELIC
bool "Early debugging through the PS3 Ethernet port"
depends on PPC_PS3
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index b4aa0d88ce2c..266b0e744ddc 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -53,6 +53,7 @@ extern void __init udbg_init_ehv_bc(void);
extern void __init udbg_init_ps3gelic(void);
extern void __init udbg_init_debug_opal_raw(void);
extern void __init udbg_init_debug_opal_hvsi(void);
+extern void __init udbg_init_latteipc(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 6c739beb938c..48d487efb25c 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -164,6 +164,9 @@ __after_mmu_off:
#ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO
bl setup_usbgecko_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+ bl setup_latteipc_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1201,4 +1204,21 @@ setup_usbgecko_bat:
blr
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+setup_latteipc_bat:
+ /* prepare a BAT for early io */
+ lis r8, 0x0d80
+
+ /*
+ * The virtual address used must match the virtual address
+ * associated to the fixmap entry FIX_EARLY_DEBUG_BASE.
+ */
+ lis r11, 0xfffe /* top 128K */
+ ori r8, r8, 0x002a /* uncached, guarded ,rw */
+ ori r11, r11, 0x2 /* 128K, Vs=1, Vp=0 */
+ mtspr SPRN_DBAT1L, r8
+ mtspr SPRN_DBAT1U, r11
+ blr
+#endif
+
.data
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index b1544b2f6321..84eae25c195e 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -67,6 +67,9 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_raw();
#elif defined(CONFIG_PPC_EARLY_DEBUG_OPAL_HVSI)
udbg_init_debug_opal_hvsi();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_LATTEIPC)
+ /* For use on Nintendo Wii U */
+ udbg_init_latteipc();
#endif
#ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index e5513205da3c..fa86cbc33d5e 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,3 +3,16 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+
+config LATTEIPC_UDBG
+ bool "Chipset IPC udbg console for the Nintendo Wii U"
+ depends on WIIU
+ help
+ If you say yes to this option, support will be included for the
+ Wii U's chipset IPC as a udbg console.
+ These IPC messages can be received by a firmware running on the
+ console's "Starbuck" security coprocessor.
+
+ This driver bypasses the IPC layer completely.
+
+ If in doubt, say N here.
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index f66554cd5c45..b1e0e1307f6e 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.c b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
new file mode 100644
index 000000000000..d546b3ba9bab
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.c
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#include <mm/mmu_decl.h>
+
+#include <linux/io.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/fixmap.h>
+
+#define LT_MMIO_BASE ((phys_addr_t)0x0d800000)
+#define LT_IPC_PPCMSG 0x00
+#define LT_IPC_PPCCTRL 0x04
+#define LT_IPC_PPCCTRL_X1 0x01
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+void __iomem *latteipc_io_base;
+
+/*
+ * Transmits a character.
+ * Sends over IPC to linux-loader for printing.
+ */
+static void latteipc_udbg_putc(char c)
+{
+ void __iomem *ppcmsg_reg = latteipc_io_base + LT_IPC_PPCMSG;
+ void __iomem *ppcctrl_reg = latteipc_io_base + LT_IPC_PPCCTRL;
+
+ out_be32(ppcmsg_reg, WIIU_LOADER_CMD_PRINT | (c << 16));
+ out_be32(ppcctrl_reg, LT_IPC_PPCCTRL_X1);
+
+ while (in_be32(ppcctrl_reg) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Retrieves and prepares the virtual address needed to access the hardware.
+ */
+static void __iomem *latteipc_udbg_setup_ipc_io_base(struct device_node *np)
+{
+ void __iomem *ipc_io_base = NULL;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ reg = of_get_property(np, "reg", NULL);
+ if (reg) {
+ paddr = of_translate_address(np, reg);
+ if (paddr)
+ ipc_io_base = ioremap(paddr, reg[1]);
+ }
+ return ipc_io_base;
+}
+
+/*
+ * Latte IPC udbg support initialization.
+ */
+void __init latteipc_udbg_init(void)
+{
+ struct device_node *np;
+ void __iomem *ipc_io_base;
+
+ if (latteipc_io_base)
+ udbg_printf("%s: early -> final\n", __func__);
+
+ np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
+ if (!np) {
+ udbg_printf("%s: IPC node not found\n", __func__);
+ goto out;
+ }
+
+ ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
+ if (!ipc_io_base) {
+ udbg_printf("%s: failed to setup IPC io base\n", __func__);
+ goto done;
+ }
+
+ udbg_putc = latteipc_udbg_putc;
+ udbg_printf("latteipc_udbg: ready\n");
+
+done:
+ of_node_put(np);
+out:
+ return;
+}
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+
+void __init udbg_init_latteipc(void)
+{
+ /*
+ * At this point we have a BAT already setup that enables I/O
+ * to the IPC hardware.
+ *
+ * The BAT uses a virtual address range reserved at the fixmap.
+ * This must match the virtual address configured in
+ * head_32.S:setup_latteipc_bat().
+ */
+ latteipc_io_base = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE);
+
+ /* Assume a firmware is present, add hooks */
+ udbg_putc = latteipc_udbg_putc;
+
+ /*
+ * Prepare again the same BAT for MMU_init.
+ * This allows udbg I/O to continue working after the MMU is
+ * turned on for real.
+ * It is safe to continue using the same virtual address as it is
+ * a reserved fixmap area.
+ */
+ setbat(1, (unsigned long)latteipc_io_base, LT_MMIO_BASE, 128 * 1024,
+ PAGE_KERNEL_NCG);
+}
+
+#endif /* CONFIG_PPC_EARLY_DEBUG_LATTEIPC */
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.h b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
new file mode 100644
index 000000000000..ca6d34e49158
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.h
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#ifndef __LATTEIPC_UDBG_H
+#define __LATTEIPC_UDBG_H
+
+#ifdef CONFIG_LATTEIPC_UDBG
+
+void __init latteipc_udbg_init(void);
+
+#else
+
+static inline void __init latteipc_udbg_init(void)
+{
+}
+
+#endif /* CONFIG_LATTEIPC_UDBG */
+
+#endif /* __LATTEIPC_UDBG_H */
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 07/12] powerpc: wiiu: espresso interrupt controller support
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Add support for the "Espresso" interrupt controller in the Nintendo Wii
U.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Makefile | 1 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 +++++++++++++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 +++++++
3 files changed, 243 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index b1e0e1307f6e..aabf4b43e806 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WIIU) += espresso-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.c b/arch/powerpc/platforms/wiiu/espresso-pic.c
new file mode 100644
index 000000000000..1aa5d88002d5
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on flipper-pic.c
+ * Copyright (C) 2004-2009 The GameCube Linux Team
+ * Copyright (C) 2007-2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "espresso-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include "espresso-pic.h"
+
+static DEFINE_PER_CPU(struct espresso_pic *, espresso_pic_cpu);
+
+/*
+ * IRQ chip operations
+ */
+
+static void espresso_pic_mask_and_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+}
+
+static void espresso_pic_mask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_unmask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ setbits32(&pic->imr, mask);
+}
+
+static struct irq_chip espresso_pic_chip = {
+ .name = "espresso-pic",
+ .irq_ack = espresso_pic_ack,
+ .irq_mask_ack = espresso_pic_mask_and_ack,
+ .irq_mask = espresso_pic_mask,
+ .irq_unmask = espresso_pic_unmask,
+};
+
+/*
+ * Domain Ops
+ */
+
+static int espresso_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("espresso-pic: %s IRQ matches with this driver\n",
+ node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int espresso_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &espresso_pic_chip,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &espresso_pic_chip, h->host_data);
+ }
+ return 0;
+}
+
+static void espresso_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops espresso_pic_ops = {
+ .match = espresso_pic_match,
+ .alloc = espresso_pic_alloc,
+ .free = espresso_pic_free,
+};
+
+/* Store irq domain for espresso_pic_get_irq (the function gets no arguments) */
+static struct irq_domain *espresso_irq_domain;
+
+unsigned int espresso_pic_get_irq(void)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 irq_status, irq;
+
+ irq_status = in_be32(&pic->icr) & in_be32(&pic->imr);
+
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* Return first IRQ */
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(espresso_irq_domain, irq);
+}
+
+void __init espresso_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,espresso-pic");
+ struct irq_domain *host;
+ struct resource res;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &res) != 0) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct espresso_pic **pic = per_cpu_ptr(&espresso_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct espresso_pic) * cpu);
+
+ /* Mask and Ack all IRQs */
+ out_be32(&(*pic)->imr, 0);
+ out_be32(&(*pic)->icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np, ESPRESSO_NR_IRQS, &espresso_pic_ops,
+ NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ /* Save irq domain for espresso_pic_get_irq */
+ espresso_irq_domain = host;
+
+ irq_set_default_host(host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.h b/arch/powerpc/platforms/wiiu/espresso-pic.h
new file mode 100644
index 000000000000..b5b4e44ad60e
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __ESPRESSO_PIC_H
+#define __ESPRESSO_PIC_H
+
+/*
+ * Instead of using COS custom IRQ remapping, the normal IRQ mapping is used:
+ *
+ * IRQ Description
+ * -------------------------------------------
+ * 0 Error
+ * 1 Unused
+ * 2 Unused
+ * 3 Audio Interface (TV)
+ * 4 Unused
+ * 5 DSP Accelerator
+ * 6 DSP
+ * 7 DSP DMA
+ * 8 Unused
+ * 9 Unused
+ * 10 GPIPPC (?)
+ * 11 Unused
+ * 12 Audio Interface (Gamepad)
+ * 13 I2C
+ * 14 Unused
+ * 15 Unused
+ * 16 Unused
+ * 17 Unused
+ * 18 Unused
+ * 19 Unused
+ * 20 Unused
+ * 21 Unused
+ * 22 Unused
+ * 23 GX2
+ * 24 Latte IRQ Controller
+ * 25 Unused
+ * 26 IPC (CPU2)
+ * 27 Unused
+ * 28 IPC (CPU1)
+ * 29 Unused
+ * 30 IPC (CPU0)
+ * 31 Unused
+ */
+
+struct espresso_pic {
+ __be32 icr; /* Triggered IRQs */
+ __be32 imr; /* Allowed IRQs */
+} __packed;
+
+#define ESPRESSO_NR_IRQS 32
+
+unsigned int espresso_pic_get_irq(void);
+void espresso_pic_init(void);
+
+#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 07/12] powerpc: wiiu: espresso interrupt controller support
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Add support for the "Espresso" interrupt controller in the Nintendo Wii
U.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Makefile | 1 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 +++++++++++++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 +++++++
3 files changed, 243 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index b1e0e1307f6e..aabf4b43e806 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WIIU) += espresso-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.c b/arch/powerpc/platforms/wiiu/espresso-pic.c
new file mode 100644
index 000000000000..1aa5d88002d5
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on flipper-pic.c
+ * Copyright (C) 2004-2009 The GameCube Linux Team
+ * Copyright (C) 2007-2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "espresso-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include "espresso-pic.h"
+
+static DEFINE_PER_CPU(struct espresso_pic *, espresso_pic_cpu);
+
+/*
+ * IRQ chip operations
+ */
+
+static void espresso_pic_mask_and_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+}
+
+static void espresso_pic_mask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_unmask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ setbits32(&pic->imr, mask);
+}
+
+static struct irq_chip espresso_pic_chip = {
+ .name = "espresso-pic",
+ .irq_ack = espresso_pic_ack,
+ .irq_mask_ack = espresso_pic_mask_and_ack,
+ .irq_mask = espresso_pic_mask,
+ .irq_unmask = espresso_pic_unmask,
+};
+
+/*
+ * Domain Ops
+ */
+
+static int espresso_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("espresso-pic: %s IRQ matches with this driver\n",
+ node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int espresso_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &espresso_pic_chip,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &espresso_pic_chip, h->host_data);
+ }
+ return 0;
+}
+
+static void espresso_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops espresso_pic_ops = {
+ .match = espresso_pic_match,
+ .alloc = espresso_pic_alloc,
+ .free = espresso_pic_free,
+};
+
+/* Store irq domain for espresso_pic_get_irq (the function gets no arguments) */
+static struct irq_domain *espresso_irq_domain;
+
+unsigned int espresso_pic_get_irq(void)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 irq_status, irq;
+
+ irq_status = in_be32(&pic->icr) & in_be32(&pic->imr);
+
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* Return first IRQ */
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(espresso_irq_domain, irq);
+}
+
+void __init espresso_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,espresso-pic");
+ struct irq_domain *host;
+ struct resource res;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &res) != 0) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct espresso_pic **pic = per_cpu_ptr(&espresso_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct espresso_pic) * cpu);
+
+ /* Mask and Ack all IRQs */
+ out_be32(&(*pic)->imr, 0);
+ out_be32(&(*pic)->icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np, ESPRESSO_NR_IRQS, &espresso_pic_ops,
+ NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ /* Save irq domain for espresso_pic_get_irq */
+ espresso_irq_domain = host;
+
+ irq_set_default_host(host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.h b/arch/powerpc/platforms/wiiu/espresso-pic.h
new file mode 100644
index 000000000000..b5b4e44ad60e
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __ESPRESSO_PIC_H
+#define __ESPRESSO_PIC_H
+
+/*
+ * Instead of using COS custom IRQ remapping, the normal IRQ mapping is used:
+ *
+ * IRQ Description
+ * -------------------------------------------
+ * 0 Error
+ * 1 Unused
+ * 2 Unused
+ * 3 Audio Interface (TV)
+ * 4 Unused
+ * 5 DSP Accelerator
+ * 6 DSP
+ * 7 DSP DMA
+ * 8 Unused
+ * 9 Unused
+ * 10 GPIPPC (?)
+ * 11 Unused
+ * 12 Audio Interface (Gamepad)
+ * 13 I2C
+ * 14 Unused
+ * 15 Unused
+ * 16 Unused
+ * 17 Unused
+ * 18 Unused
+ * 19 Unused
+ * 20 Unused
+ * 21 Unused
+ * 22 Unused
+ * 23 GX2
+ * 24 Latte IRQ Controller
+ * 25 Unused
+ * 26 IPC (CPU2)
+ * 27 Unused
+ * 28 IPC (CPU1)
+ * 29 Unused
+ * 30 IPC (CPU0)
+ * 31 Unused
+ */
+
+struct espresso_pic {
+ __be32 icr; /* Triggered IRQs */
+ __be32 imr; /* Allowed IRQs */
+} __packed;
+
+#define ESPRESSO_NR_IRQS 32
+
+unsigned int espresso_pic_get_irq(void);
+void espresso_pic_init(void);
+
+#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 08/12] powerpc: wiiu: latte interrupt controller support
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Add support for the "Latte" interrupt controller in the Nintendo Wii U.
This controller is used for the entire SoC and is wired to a cascade
interrupt on the Espresso controller.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Kconfig | 1 +
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 +++
4 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index fa86cbc33d5e..5e062536ca58 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,6 +3,7 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+ select IRQ_DOMAIN_HIERARCHY
config LATTEIPC_UDBG
bool "Chipset IPC udbg console for the Nintendo Wii U"
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index aabf4b43e806..fa16c60261e6 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o
+obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.c b/arch/powerpc/platforms/wiiu/latte-pic.c
new file mode 100644
index 000000000000..d16e0c2de2b0
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.c
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Latte" interrupt controller support.
+ * This is the controller for all the SoC devices, and has a cascade interrupt for the Espresso
+ * CPU interrupt controller.
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on hlwd-pic.c
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "latte-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/io.h>
+#include "latte-pic.h"
+
+static DEFINE_PER_CPU(struct lt_pic *, lt_pic_cpu);
+
+/*
+ * IRQ chip operations
+ * These handle both AHBALL and AHBLT IRQs, with AHBLT mapped above 32
+ */
+
+static void latte_pic_mask_and_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ }
+}
+
+static void latte_pic_mask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_unmask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ setbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ setbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static struct irq_chip latte_pic = {
+ .name = "latte-pic",
+ .irq_ack = latte_pic_ack,
+ .irq_mask_ack = latte_pic_mask_and_ack,
+ .irq_mask = latte_pic_mask,
+ .irq_unmask = latte_pic_unmask,
+};
+
+/*
+ * Domain ops
+ */
+
+static int latte_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("%s IRQ matches with this driver\n", node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int latte_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &latte_pic,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &latte_pic, h->host_data);
+ }
+ return 0;
+}
+
+static void latte_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops latte_pic_ops = {
+ .match = latte_pic_match,
+ .alloc = latte_pic_alloc,
+ .free = latte_pic_free,
+};
+
+/*
+ * Determinate if there are interrupts pending
+ * Checks AHBALL (0-32) and AHBLT (32-64)
+ */
+unsigned int latte_pic_get_irq(struct irq_domain *h)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq_status, irq;
+
+ /* Check AHBALL first */
+ irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
+
+ if (irq_status == 0) {
+ /* Try AHBLT */
+ irq_status =
+ in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
+ irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
+ return irq_linear_revmap(h, irq);
+ }
+
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(h, irq);
+}
+
+/*
+ * Cascade IRQ handler
+ */
+static void latte_irq_cascade(struct irq_desc *desc)
+{
+ struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virq;
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
+ raw_spin_unlock(&desc->lock);
+
+ virq = latte_pic_get_irq(irq_domain);
+ if (virq)
+ generic_handle_irq(virq);
+ else
+ pr_err("spurious interrupt!\n");
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
+ if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
+ chip->irq_unmask(&desc->irq_data);
+ raw_spin_unlock(&desc->lock);
+}
+
+void __init latte_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,latte-pic");
+ struct irq_domain *host;
+ struct resource res;
+ int irq_cascade;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+ if (!of_get_property(np, "interrupts", NULL)) {
+ pr_err("could not find cascade interrupt!\n");
+ goto out;
+ }
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct lt_pic **pic = per_cpu_ptr(<_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct lt_pic) * cpu);
+
+ /* Mask and Ack CPU IRQs */
+ out_be32(&(*pic)->ahball_imr, 0);
+ out_be32(&(*pic)->ahball_icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np,
+ LATTE_AHBALL_NR_IRQS + LATTE_AHBLT_NR_IRQS,
+ &latte_pic_ops, NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ irq_cascade = irq_of_parse_and_map(np, 0);
+ irq_set_chained_handler_and_data(irq_cascade, latte_irq_cascade, host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.h b/arch/powerpc/platforms/wiiu/latte-pic.h
new file mode 100644
index 000000000000..7021d9497d35
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Latte" interrupt controller support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __LATTE_PIC_H
+#define __LATTE_PIC_H
+
+struct lt_pic {
+ __be32 ahball_icr; /* Triggered AHB IRQs (all) */
+ __be32 ahblt_icr; /* Triggered AHB IRQs (latte only) */
+ __be32 ahball_imr; /* Allowed AHB IRQs (all) */
+ __be32 ahblt_imr; /* Allowed AHB IRQs (latte only) */
+} __packed;
+
+#define LATTE_AHBALL_NR_IRQS 32
+#define LATTE_AHBLT_NR_IRQS 32
+
+void latte_pic_init(void);
+
+#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 08/12] powerpc: wiiu: latte interrupt controller support
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Add support for the "Latte" interrupt controller in the Nintendo Wii U.
This controller is used for the entire SoC and is wired to a cascade
interrupt on the Espresso controller.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Kconfig | 1 +
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 +++
4 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index fa86cbc33d5e..5e062536ca58 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,6 +3,7 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+ select IRQ_DOMAIN_HIERARCHY
config LATTEIPC_UDBG
bool "Chipset IPC udbg console for the Nintendo Wii U"
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index aabf4b43e806..fa16c60261e6 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o
+obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.c b/arch/powerpc/platforms/wiiu/latte-pic.c
new file mode 100644
index 000000000000..d16e0c2de2b0
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.c
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Latte" interrupt controller support.
+ * This is the controller for all the SoC devices, and has a cascade interrupt for the Espresso
+ * CPU interrupt controller.
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on hlwd-pic.c
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "latte-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/io.h>
+#include "latte-pic.h"
+
+static DEFINE_PER_CPU(struct lt_pic *, lt_pic_cpu);
+
+/*
+ * IRQ chip operations
+ * These handle both AHBALL and AHBLT IRQs, with AHBLT mapped above 32
+ */
+
+static void latte_pic_mask_and_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ }
+}
+
+static void latte_pic_mask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_unmask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ setbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ setbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static struct irq_chip latte_pic = {
+ .name = "latte-pic",
+ .irq_ack = latte_pic_ack,
+ .irq_mask_ack = latte_pic_mask_and_ack,
+ .irq_mask = latte_pic_mask,
+ .irq_unmask = latte_pic_unmask,
+};
+
+/*
+ * Domain ops
+ */
+
+static int latte_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("%s IRQ matches with this driver\n", node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int latte_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &latte_pic,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &latte_pic, h->host_data);
+ }
+ return 0;
+}
+
+static void latte_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops latte_pic_ops = {
+ .match = latte_pic_match,
+ .alloc = latte_pic_alloc,
+ .free = latte_pic_free,
+};
+
+/*
+ * Determinate if there are interrupts pending
+ * Checks AHBALL (0-32) and AHBLT (32-64)
+ */
+unsigned int latte_pic_get_irq(struct irq_domain *h)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq_status, irq;
+
+ /* Check AHBALL first */
+ irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
+
+ if (irq_status == 0) {
+ /* Try AHBLT */
+ irq_status =
+ in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
+ irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
+ return irq_linear_revmap(h, irq);
+ }
+
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(h, irq);
+}
+
+/*
+ * Cascade IRQ handler
+ */
+static void latte_irq_cascade(struct irq_desc *desc)
+{
+ struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virq;
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
+ raw_spin_unlock(&desc->lock);
+
+ virq = latte_pic_get_irq(irq_domain);
+ if (virq)
+ generic_handle_irq(virq);
+ else
+ pr_err("spurious interrupt!\n");
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
+ if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
+ chip->irq_unmask(&desc->irq_data);
+ raw_spin_unlock(&desc->lock);
+}
+
+void __init latte_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,latte-pic");
+ struct irq_domain *host;
+ struct resource res;
+ int irq_cascade;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+ if (!of_get_property(np, "interrupts", NULL)) {
+ pr_err("could not find cascade interrupt!\n");
+ goto out;
+ }
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct lt_pic **pic = per_cpu_ptr(<_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct lt_pic) * cpu);
+
+ /* Mask and Ack CPU IRQs */
+ out_be32(&(*pic)->ahball_imr, 0);
+ out_be32(&(*pic)->ahball_icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np,
+ LATTE_AHBALL_NR_IRQS + LATTE_AHBLT_NR_IRQS,
+ &latte_pic_ops, NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ irq_cascade = irq_of_parse_and_map(np, 0);
+ irq_set_chained_handler_and_data(irq_cascade, latte_irq_cascade, host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.h b/arch/powerpc/platforms/wiiu/latte-pic.h
new file mode 100644
index 000000000000..7021d9497d35
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Latte" interrupt controller support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __LATTE_PIC_H
+#define __LATTE_PIC_H
+
+struct lt_pic {
+ __be32 ahball_icr; /* Triggered AHB IRQs (all) */
+ __be32 ahblt_icr; /* Triggered AHB IRQs (latte only) */
+ __be32 ahball_imr; /* Allowed AHB IRQs (all) */
+ __be32 ahblt_imr; /* Allowed AHB IRQs (latte only) */
+} __packed;
+
+#define LATTE_AHBALL_NR_IRQS 32
+#define LATTE_AHBLT_NR_IRQS 32
+
+void latte_pic_init(void);
+
+#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 09/12] powerpc: espresso processor support
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Adds a cputable entry for the "Espresso" processor found on the Nintendo
Wii U, which has a PVR unrelated to other 750CL-like chips.
Only this revision has been seen in the wild.
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/kernel/cputable.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index ae0fdef0ac11..b575f5570485 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -718,6 +718,22 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform = "ppc750",
.oprofile_cpu_type = "ppc/750",
},
+ { /* "Espresso" (750CL-like) */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x70010201,
+ .cpu_name = "Espresso",
+ .cpu_features = CPU_FTRS_750CL,
+ .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
+ .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_750,
+ .machine_check = machine_check_generic,
+ .platform = "ppc750",
+ .oprofile_cpu_type = "ppc/750",
+ },
{ /* 745/755 */
.pvr_mask = 0xfffff000,
.pvr_value = 0x00083000,
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 09/12] powerpc: espresso processor support
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Adds a cputable entry for the "Espresso" processor found on the Nintendo
Wii U, which has a PVR unrelated to other 750CL-like chips.
Only this revision has been seen in the wild.
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/kernel/cputable.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index ae0fdef0ac11..b575f5570485 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -718,6 +718,22 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform = "ppc750",
.oprofile_cpu_type = "ppc/750",
},
+ { /* "Espresso" (750CL-like) */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x70010201,
+ .cpu_name = "Espresso",
+ .cpu_features = CPU_FTRS_750CL,
+ .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
+ .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_750,
+ .machine_check = machine_check_generic,
+ .platform = "ppc750",
+ .oprofile_cpu_type = "ppc/750",
+ },
{ /* 745/755 */
.pvr_mask = 0xfffff000,
.pvr_value = 0x00083000,
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 10/12] powerpc: wiiu: platform support
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Add platform support for the Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/setup.c | 67 ++++++++++++++++++++++++++++
2 files changed, 68 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index fa16c60261e6..abcb7a1beebf 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
+obj-$(CONFIG_WIIU) += setup.o espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/setup.c b/arch/powerpc/platforms/wiiu/setup.c
new file mode 100644
index 000000000000..279fa899a296
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/setup.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U board-specific support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+#define DRV_MODULE_NAME "wiiu"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "espresso-pic.h"
+#include "latte-pic.h"
+#include "udbg_latteipc.h"
+
+static int __init wiiu_probe(void)
+{
+ if (!of_machine_is_compatible("nintendo,wiiu"))
+ return 0;
+
+ latteipc_udbg_init();
+
+ return 1;
+}
+
+static void __noreturn wiiu_halt(void)
+{
+ for (;;)
+ cpu_relax();
+}
+
+static void __init wiiu_init_irq(void)
+{
+ espresso_pic_init();
+ latte_pic_init();
+}
+
+static const struct of_device_id wiiu_of_bus[] = {
+ {
+ .compatible = "nintendo,latte",
+ },
+ {},
+};
+
+static int __init wiiu_device_probe(void)
+{
+ if (!machine_is(wiiu))
+ return 0;
+
+ of_platform_populate(NULL, wiiu_of_bus, NULL, NULL);
+ return 0;
+}
+device_initcall(wiiu_device_probe);
+
+define_machine(wiiu) {
+ .name = "wiiu",
+ .probe = wiiu_probe,
+ .halt = wiiu_halt,
+ .progress = udbg_progress,
+ .calibrate_decr = generic_calibrate_decr,
+ .init_IRQ = wiiu_init_irq,
+ .get_irq = espresso_pic_get_irq,
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 10/12] powerpc: wiiu: platform support
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Add platform support for the Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/setup.c | 67 ++++++++++++++++++++++++++++
2 files changed, 68 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index fa16c60261e6..abcb7a1beebf 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
+obj-$(CONFIG_WIIU) += setup.o espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/setup.c b/arch/powerpc/platforms/wiiu/setup.c
new file mode 100644
index 000000000000..279fa899a296
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/setup.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U board-specific support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+#define DRV_MODULE_NAME "wiiu"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "espresso-pic.h"
+#include "latte-pic.h"
+#include "udbg_latteipc.h"
+
+static int __init wiiu_probe(void)
+{
+ if (!of_machine_is_compatible("nintendo,wiiu"))
+ return 0;
+
+ latteipc_udbg_init();
+
+ return 1;
+}
+
+static void __noreturn wiiu_halt(void)
+{
+ for (;;)
+ cpu_relax();
+}
+
+static void __init wiiu_init_irq(void)
+{
+ espresso_pic_init();
+ latte_pic_init();
+}
+
+static const struct of_device_id wiiu_of_bus[] = {
+ {
+ .compatible = "nintendo,latte",
+ },
+ {},
+};
+
+static int __init wiiu_device_probe(void)
+{
+ if (!machine_is(wiiu))
+ return 0;
+
+ of_platform_populate(NULL, wiiu_of_bus, NULL, NULL);
+ return 0;
+}
+device_initcall(wiiu_device_probe);
+
+define_machine(wiiu) {
+ .name = "wiiu",
+ .probe = wiiu_probe,
+ .halt = wiiu_halt,
+ .progress = udbg_progress,
+ .calibrate_decr = generic_calibrate_decr,
+ .init_IRQ = wiiu_init_irq,
+ .get_irq = espresso_pic_get_irq,
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 11/12] powerpc: wiiu: don't enforce flat memory
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
pgtable_32.c:mapin_ram loops over each valid memory range, which means
non-contiguous memory just works.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/mm/init_32.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 3d690be48e84..59a84629d9a0 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -125,10 +125,10 @@ void __init MMU_init(void)
* lowmem_end_addr is initialized below.
*/
if (memblock.memory.cnt > 1) {
-#ifndef CONFIG_WII
+#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
memblock_enforce_memory_limit(memblock.memory.regions[0].size);
pr_warn("Only using first contiguous memory region\n");
-#else
+#elif defined(CONFIG_WII)
wii_memory_fixups();
#endif
}
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
pgtable_32.c:mapin_ram loops over each valid memory range, which means
non-contiguous memory just works.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/mm/init_32.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 3d690be48e84..59a84629d9a0 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -125,10 +125,10 @@ void __init MMU_init(void)
* lowmem_end_addr is initialized below.
*/
if (memblock.memory.cnt > 1) {
-#ifndef CONFIG_WII
+#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
memblock_enforce_memory_limit(memblock.memory.regions[0].size);
pr_warn("Only using first contiguous memory region\n");
-#else
+#elif defined(CONFIG_WII)
wii_memory_fixups();
#endif
}
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 12/12] powerpc: wiiu: Add minimal default config
2022-06-22 13:10 ` Ash Logan
@ 2022-06-22 13:10 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644, devicetree
Adds a bare-minimum config to get a kernel compiled. Will need some more
interesting options once a storage device to boot from is added.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/configs/wiiu_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/powerpc/configs/wiiu_defconfig
diff --git a/arch/powerpc/configs/wiiu_defconfig b/arch/powerpc/configs/wiiu_defconfig
new file mode 100644
index 000000000000..a761ebcdd9f2
--- /dev/null
+++ b/arch/powerpc/configs/wiiu_defconfig
@@ -0,0 +1,7 @@
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_WIIU=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_HIGHMEM=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_PPC_EARLY_DEBUG=y
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v2 12/12] powerpc: wiiu: Add minimal default config
@ 2022-06-22 13:10 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-22 13:10 UTC (permalink / raw)
To: paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, linuxppc-dev, j.ne
Adds a bare-minimum config to get a kernel compiled. Will need some more
interesting options once a storage device to boot from is added.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/configs/wiiu_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/powerpc/configs/wiiu_defconfig
diff --git a/arch/powerpc/configs/wiiu_defconfig b/arch/powerpc/configs/wiiu_defconfig
new file mode 100644
index 000000000000..a761ebcdd9f2
--- /dev/null
+++ b/arch/powerpc/configs/wiiu_defconfig
@@ -0,0 +1,7 @@
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_WIIU=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_HIGHMEM=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_PPC_EARLY_DEBUG=y
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* Re: [PATCH v2 06/12] powerpc: wiiu: udbg support for latteipc
2022-06-22 13:10 ` Ash Logan
@ 2022-06-27 0:15 ` kernel test robot
-1 siblings, 0 replies; 170+ messages in thread
From: kernel test robot @ 2022-06-27 0:15 UTC (permalink / raw)
To: Ash Logan, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: llvm, kbuild-all, linux-kernel, linuxppc-dev, j.ne, linkmauve,
rw-r-r-0644, devicetree
Hi Ash,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on powerpc/next]
[also build test WARNING on robh/for-next linus/master v5.19-rc4 next-20220624]
[cannot apply to mpe/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Ash-Logan/dt-bindings-wiiu-Document-the-Nintendo-Wii-U-devicetree/20220622-221056
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-randconfig-c003-20220626
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project b0d6dd3905db145853c7c744ac92d49b00b1fa20)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://github.com/intel-lab-lkp/linux/commit/acc3ab8f224a93f1a41267aeb09dee3d2ec810fb
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Ash-Logan/dt-bindings-wiiu-Document-the-Nintendo-Wii-U-devicetree/20220622-221056
git checkout acc3ab8f224a93f1a41267aeb09dee3d2ec810fb
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash arch/powerpc/platforms/wiiu/ drivers/usb/misc/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> arch/powerpc/platforms/wiiu/udbg_latteipc.c:65:13: warning: no previous prototype for function 'latteipc_udbg_init' [-Wmissing-prototypes]
void __init latteipc_udbg_init(void)
^
arch/powerpc/platforms/wiiu/udbg_latteipc.c:65:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void __init latteipc_udbg_init(void)
^
static
1 warning generated.
vim +/latteipc_udbg_init +65 arch/powerpc/platforms/wiiu/udbg_latteipc.c
61
62 /*
63 * Latte IPC udbg support initialization.
64 */
> 65 void __init latteipc_udbg_init(void)
66 {
67 struct device_node *np;
68 void __iomem *ipc_io_base;
69
70 if (latteipc_io_base)
71 udbg_printf("%s: early -> final\n", __func__);
72
73 np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
74 if (!np) {
75 udbg_printf("%s: IPC node not found\n", __func__);
76 goto out;
77 }
78
79 ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
80 if (!ipc_io_base) {
81 udbg_printf("%s: failed to setup IPC io base\n", __func__);
82 goto done;
83 }
84
85 udbg_putc = latteipc_udbg_putc;
86 udbg_printf("latteipc_udbg: ready\n");
87
88 done:
89 of_node_put(np);
90 out:
91 return;
92 }
93
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v2 06/12] powerpc: wiiu: udbg support for latteipc
@ 2022-06-27 0:15 ` kernel test robot
0 siblings, 0 replies; 170+ messages in thread
From: kernel test robot @ 2022-06-27 0:15 UTC (permalink / raw)
To: Ash Logan, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, kbuild-all, linkmauve, llvm, linux-kernel,
rw-r-r-0644, linuxppc-dev, j.ne
Hi Ash,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on powerpc/next]
[also build test WARNING on robh/for-next linus/master v5.19-rc4 next-20220624]
[cannot apply to mpe/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Ash-Logan/dt-bindings-wiiu-Document-the-Nintendo-Wii-U-devicetree/20220622-221056
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-randconfig-c003-20220626
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project b0d6dd3905db145853c7c744ac92d49b00b1fa20)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://github.com/intel-lab-lkp/linux/commit/acc3ab8f224a93f1a41267aeb09dee3d2ec810fb
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Ash-Logan/dt-bindings-wiiu-Document-the-Nintendo-Wii-U-devicetree/20220622-221056
git checkout acc3ab8f224a93f1a41267aeb09dee3d2ec810fb
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash arch/powerpc/platforms/wiiu/ drivers/usb/misc/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> arch/powerpc/platforms/wiiu/udbg_latteipc.c:65:13: warning: no previous prototype for function 'latteipc_udbg_init' [-Wmissing-prototypes]
void __init latteipc_udbg_init(void)
^
arch/powerpc/platforms/wiiu/udbg_latteipc.c:65:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
void __init latteipc_udbg_init(void)
^
static
1 warning generated.
vim +/latteipc_udbg_init +65 arch/powerpc/platforms/wiiu/udbg_latteipc.c
61
62 /*
63 * Latte IPC udbg support initialization.
64 */
> 65 void __init latteipc_udbg_init(void)
66 {
67 struct device_node *np;
68 void __iomem *ipc_io_base;
69
70 if (latteipc_io_base)
71 udbg_printf("%s: early -> final\n", __func__);
72
73 np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
74 if (!np) {
75 udbg_printf("%s: IPC node not found\n", __func__);
76 goto out;
77 }
78
79 ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
80 if (!ipc_io_base) {
81 udbg_printf("%s: failed to setup IPC io base\n", __func__);
82 goto done;
83 }
84
85 udbg_putc = latteipc_udbg_putc;
86 udbg_printf("latteipc_udbg: ready\n");
87
88 done:
89 of_node_put(np);
90 out:
91 return;
92 }
93
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v2 08/12] powerpc: wiiu: latte interrupt controller support
2022-06-22 13:10 ` Ash Logan
@ 2022-06-27 2:51 ` kernel test robot
-1 siblings, 0 replies; 170+ messages in thread
From: kernel test robot @ 2022-06-27 2:51 UTC (permalink / raw)
To: Ash Logan, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: llvm, kbuild-all, linux-kernel, linuxppc-dev, j.ne, linkmauve,
rw-r-r-0644, devicetree
Hi Ash,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on powerpc/next]
[also build test WARNING on robh/for-next]
[cannot apply to mpe/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Ash-Logan/dt-bindings-wiiu-Document-the-Nintendo-Wii-U-devicetree/20220622-221056
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-randconfig-c003-20220626 (https://download.01.org/0day-ci/archive/20220627/202206271019.YEn99lfz-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project b0d6dd3905db145853c7c744ac92d49b00b1fa20)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://github.com/intel-lab-lkp/linux/commit/533a7cf49cc00c4eaafd2afee5ecd9e23bac99f2
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Ash-Logan/dt-bindings-wiiu-Document-the-Nintendo-Wii-U-devicetree/20220622-221056
git checkout 533a7cf49cc00c4eaafd2afee5ecd9e23bac99f2
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash arch/powerpc/platforms/wiiu/ drivers/usb/misc/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> arch/powerpc/platforms/wiiu/latte-pic.c:155:14: warning: no previous prototype for function 'latte_pic_get_irq' [-Wmissing-prototypes]
unsigned int latte_pic_get_irq(struct irq_domain *h)
^
arch/powerpc/platforms/wiiu/latte-pic.c:155:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
unsigned int latte_pic_get_irq(struct irq_domain *h)
^
static
1 warning generated.
vim +/latte_pic_get_irq +155 arch/powerpc/platforms/wiiu/latte-pic.c
150
151 /*
152 * Determinate if there are interrupts pending
153 * Checks AHBALL (0-32) and AHBLT (32-64)
154 */
> 155 unsigned int latte_pic_get_irq(struct irq_domain *h)
156 {
157 struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
158 u32 irq_status, irq;
159
160 /* Check AHBALL first */
161 irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
162
163 if (irq_status == 0) {
164 /* Try AHBLT */
165 irq_status =
166 in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
167 if (irq_status == 0)
168 return 0; /* No IRQs pending */
169
170 /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
171 irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
172 return irq_linear_revmap(h, irq);
173 }
174
175 irq = __ffs(irq_status);
176 return irq_linear_revmap(h, irq);
177 }
178
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v2 08/12] powerpc: wiiu: latte interrupt controller support
@ 2022-06-27 2:51 ` kernel test robot
0 siblings, 0 replies; 170+ messages in thread
From: kernel test robot @ 2022-06-27 2:51 UTC (permalink / raw)
To: Ash Logan, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, kbuild-all, linkmauve, llvm, linux-kernel,
rw-r-r-0644, linuxppc-dev, j.ne
Hi Ash,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on powerpc/next]
[also build test WARNING on robh/for-next]
[cannot apply to mpe/next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/intel-lab-lkp/linux/commits/Ash-Logan/dt-bindings-wiiu-Document-the-Nintendo-Wii-U-devicetree/20220622-221056
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-randconfig-c003-20220626 (https://download.01.org/0day-ci/archive/20220627/202206271019.YEn99lfz-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project b0d6dd3905db145853c7c744ac92d49b00b1fa20)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc-linux-gnu
# https://github.com/intel-lab-lkp/linux/commit/533a7cf49cc00c4eaafd2afee5ecd9e23bac99f2
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Ash-Logan/dt-bindings-wiiu-Document-the-Nintendo-Wii-U-devicetree/20220622-221056
git checkout 533a7cf49cc00c4eaafd2afee5ecd9e23bac99f2
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=powerpc SHELL=/bin/bash arch/powerpc/platforms/wiiu/ drivers/usb/misc/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> arch/powerpc/platforms/wiiu/latte-pic.c:155:14: warning: no previous prototype for function 'latte_pic_get_irq' [-Wmissing-prototypes]
unsigned int latte_pic_get_irq(struct irq_domain *h)
^
arch/powerpc/platforms/wiiu/latte-pic.c:155:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
unsigned int latte_pic_get_irq(struct irq_domain *h)
^
static
1 warning generated.
vim +/latte_pic_get_irq +155 arch/powerpc/platforms/wiiu/latte-pic.c
150
151 /*
152 * Determinate if there are interrupts pending
153 * Checks AHBALL (0-32) and AHBLT (32-64)
154 */
> 155 unsigned int latte_pic_get_irq(struct irq_domain *h)
156 {
157 struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
158 u32 irq_status, irq;
159
160 /* Check AHBALL first */
161 irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
162
163 if (irq_status == 0) {
164 /* Try AHBLT */
165 irq_status =
166 in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
167 if (irq_status == 0)
168 return 0; /* No IRQs pending */
169
170 /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
171 irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
172 return irq_linear_revmap(h, irq);
173 }
174
175 irq = __ffs(irq_status);
176 return irq_linear_revmap(h, irq);
177 }
178
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v3 00/12] powerpc: Nintendo Wii U support
2022-06-22 13:10 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
The following patches add basic support for the Nintendo Wii U video
game console, a PowerPC system somewhat similar to the GameCube and
Wii.
This includes:
- devicetree source
- bootwrapper support
- udbg console to bootloader
- early udbg console
- interrupt controllers
- platform support
- recognition of the Espresso processor
- workaround for the discontiguous RAM blocks
This is enough to boot on hardware. dmesg pics (with a small hack to
udbg-immortal, not included):
Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
For those who have hardware and would like to try these patches, some
modification is required to the stock OS to allow Linux. For info:
https://wiki.linux-wiiu.org/wiki/AdvancedSetup
Some of the design choices (new platform > embedded6xx) were discussed
previously:
Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
Turns out even less changes were needed than previously anticipated for
discontiguous memory, and KUAP is yet to give trouble. Thanks to those
who helped and discussed this.
Changes since v2:
- Fixed some overzealous deleting in the devicetree, oops.
- Fixed missing declarations for some functions (thanks robots)
- Fixed some checkpatch warnings.
- Mark latte as a simple-bus and use of_platform_default_populate.
Changes since v1:
- Style and formatting tweaks to the devicetree, thanks Rob Herring for
the review.
Ash Logan (12):
dt-bindings: wiiu: Document the Nintendo Wii U devicetree
powerpc: wiiu: device tree
powerpc: wiiu: bootwrapper support
powerpc: wiiu: introduce wiiu platform
powerpc: wiiu: declare as non-coherent
powerpc: wiiu: udbg support for latteipc
powerpc: wiiu: espresso interrupt controller support
powerpc: wiiu: latte interrupt controller support
powerpc: espresso processor support
powerpc: wiiu: platform support
powerpc: wiiu: don't enforce flat memory
powerpc: wiiu: add minimal default config
.../bindings/powerpc/nintendo/wiiu.yaml | 28 ++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 +++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++
arch/powerpc/Kconfig.debug | 9 +
arch/powerpc/boot/Makefile | 4 +
arch/powerpc/boot/dts/wiiu.dts | 326 ++++++++++++++++++
arch/powerpc/boot/wiiu-head.S | 103 ++++++
arch/powerpc/boot/wiiu.c | 73 ++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/configs/wiiu_defconfig | 7 +
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/cputable.c | 16 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/mm/init_32.c | 4 +-
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 22 ++
arch/powerpc/platforms/wiiu/Makefile | 4 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
arch/powerpc/platforms/wiiu/setup.c | 60 ++++
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 124 +++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
32 files changed, 1632 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
create mode 100644 arch/powerpc/configs/wiiu_defconfig
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
base-commit: 03c765b0e3b4cb5063276b086c76f7a612856a9a
--
2.36.1
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v3 00/12] powerpc: Nintendo Wii U support
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
The following patches add basic support for the Nintendo Wii U video
game console, a PowerPC system somewhat similar to the GameCube and
Wii.
This includes:
- devicetree source
- bootwrapper support
- udbg console to bootloader
- early udbg console
- interrupt controllers
- platform support
- recognition of the Espresso processor
- workaround for the discontiguous RAM blocks
This is enough to boot on hardware. dmesg pics (with a small hack to
udbg-immortal, not included):
Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
For those who have hardware and would like to try these patches, some
modification is required to the stock OS to allow Linux. For info:
https://wiki.linux-wiiu.org/wiki/AdvancedSetup
Some of the design choices (new platform > embedded6xx) were discussed
previously:
Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
Turns out even less changes were needed than previously anticipated for
discontiguous memory, and KUAP is yet to give trouble. Thanks to those
who helped and discussed this.
Changes since v2:
- Fixed some overzealous deleting in the devicetree, oops.
- Fixed missing declarations for some functions (thanks robots)
- Fixed some checkpatch warnings.
- Mark latte as a simple-bus and use of_platform_default_populate.
Changes since v1:
- Style and formatting tweaks to the devicetree, thanks Rob Herring for
the review.
Ash Logan (12):
dt-bindings: wiiu: Document the Nintendo Wii U devicetree
powerpc: wiiu: device tree
powerpc: wiiu: bootwrapper support
powerpc: wiiu: introduce wiiu platform
powerpc: wiiu: declare as non-coherent
powerpc: wiiu: udbg support for latteipc
powerpc: wiiu: espresso interrupt controller support
powerpc: wiiu: latte interrupt controller support
powerpc: espresso processor support
powerpc: wiiu: platform support
powerpc: wiiu: don't enforce flat memory
powerpc: wiiu: add minimal default config
.../bindings/powerpc/nintendo/wiiu.yaml | 28 ++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 +++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++
arch/powerpc/Kconfig.debug | 9 +
arch/powerpc/boot/Makefile | 4 +
arch/powerpc/boot/dts/wiiu.dts | 326 ++++++++++++++++++
arch/powerpc/boot/wiiu-head.S | 103 ++++++
arch/powerpc/boot/wiiu.c | 73 ++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/configs/wiiu_defconfig | 7 +
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/cputable.c | 16 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/mm/init_32.c | 4 +-
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 22 ++
arch/powerpc/platforms/wiiu/Makefile | 4 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
arch/powerpc/platforms/wiiu/setup.c | 60 ++++
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 124 +++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
32 files changed, 1632 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
create mode 100644 arch/powerpc/configs/wiiu_defconfig
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
base-commit: 03c765b0e3b4cb5063276b086c76f7a612856a9a
--
2.36.1
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v3 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Adds schema for the various Wii U devicetree nodes used.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
.../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
8 files changed, 300 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
new file mode 100644
index 000000000000..5824b07928f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U bindings
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U video game console binding.
+
+properties:
+ $nodename:
+ const: "/"
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U video game console
+ items:
+ - const: nintendo,wiiu
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
new file mode 100644
index 000000000000..878a81595f5f
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U "Espresso" interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Espresso" interrupt controller
+ items:
+ - const: nintendo,espresso-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-32 in one cell
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+
+additionalProperties: false
+
+examples:
+ - |
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
new file mode 100644
index 000000000000..e54d49015f36
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte "GPU7" graphics processor
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
+ Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte "GPU7" graphics processor
+ items:
+ - const: nintendo,latte-gpu7
+ reg:
+ items:
+ - description: GpuF0MMReg registers
+ interrupts:
+ items:
+ - description: Main interrupt, connected via Espresso PIC
+
+# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
+additionalProperties: true
+
+examples:
+ - |
+ gpu7@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
new file mode 100644
index 000000000000..7b9de4effcb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte AHCI controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte AHCI controller
+ items:
+ - const: nintendo,latte-ahci
+ reg:
+ items:
+ - description: |
+ HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
+ registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
+ interrupts:
+ items:
+ - description: Main HBA interrupt
+ - description: Vendor debugging interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x408>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38>, <28>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
new file mode 100644
index 000000000000..ed0b4c28ce48
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte DSP
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U digital signal processor, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte DSP
+ items:
+ - const: nintendo,latte-dsp
+ reg:
+ items:
+ - description: DSP registers
+
+# Once more is known about this device more properties will likely be added
+additionalProperties: true
+
+examples:
+ - |
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
new file mode 100644
index 000000000000..a2df71fb9964
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte interrupt controller
+ items:
+ - const: nintendo,latte-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-64 in one cell.
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: Cascade interrupt for Espresso PIC
+
+additionalProperties: false
+
+examples:
+ - |
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
new file mode 100644
index 000000000000..4b9b0820edc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte SD Host controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte SDHCI
+ items:
+ - const: nintendo,latte-sdhci
+ - const: sdhci
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: SDHCI interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
new file mode 100644
index 000000000000..6ae86d198fa3
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Latte system bus
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Latte" SoC
+ items:
+ - const: nintendo,latte
+
+additionalProperties: true
+
+...
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Adds schema for the various Wii U devicetree nodes used.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
.../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
8 files changed, 300 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
new file mode 100644
index 000000000000..5824b07928f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U bindings
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U video game console binding.
+
+properties:
+ $nodename:
+ const: "/"
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U video game console
+ items:
+ - const: nintendo,wiiu
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
new file mode 100644
index 000000000000..878a81595f5f
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U "Espresso" interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Espresso" interrupt controller
+ items:
+ - const: nintendo,espresso-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-32 in one cell
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+
+additionalProperties: false
+
+examples:
+ - |
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
new file mode 100644
index 000000000000..e54d49015f36
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte "GPU7" graphics processor
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
+ Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte "GPU7" graphics processor
+ items:
+ - const: nintendo,latte-gpu7
+ reg:
+ items:
+ - description: GpuF0MMReg registers
+ interrupts:
+ items:
+ - description: Main interrupt, connected via Espresso PIC
+
+# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
+additionalProperties: true
+
+examples:
+ - |
+ gpu7@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
new file mode 100644
index 000000000000..7b9de4effcb0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte AHCI controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte AHCI controller
+ items:
+ - const: nintendo,latte-ahci
+ reg:
+ items:
+ - description: |
+ HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
+ registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
+ interrupts:
+ items:
+ - description: Main HBA interrupt
+ - description: Vendor debugging interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x408>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38>, <28>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
new file mode 100644
index 000000000000..ed0b4c28ce48
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte DSP
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U digital signal processor, as found in the Latte chip.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte DSP
+ items:
+ - const: nintendo,latte-dsp
+ reg:
+ items:
+ - description: DSP registers
+
+# Once more is known about this device more properties will likely be added
+additionalProperties: true
+
+examples:
+ - |
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
new file mode 100644
index 000000000000..a2df71fb9964
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte interrupt controller
+ items:
+ - const: nintendo,latte-pic
+ '#interrupt-cells':
+ # Interrupt numbers 0-64 in one cell.
+ const: 1
+ interrupt-controller: true
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: Cascade interrupt for Espresso PIC
+
+additionalProperties: false
+
+examples:
+ - |
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
new file mode 100644
index 000000000000..4b9b0820edc1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte SD Host controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U Latte SDHCI
+ items:
+ - const: nintendo,latte-sdhci
+ - const: sdhci
+ reg:
+ items:
+ - description: Core registers
+ interrupts:
+ items:
+ - description: SDHCI interrupt
+
+additionalProperties: false
+
+examples:
+ - |
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
new file mode 100644
index 000000000000..6ae86d198fa3
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Latte system bus
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
+
+properties:
+ compatible:
+ oneOf:
+ - description: Nintendo Wii U "Latte" SoC
+ items:
+ - const: nintendo,latte
+
+additionalProperties: true
+
+...
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 02/12] powerpc: wiiu: device tree
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add a device tree source file for the Nintendo Wii U video game console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v1->v2: Style and formatting changes suggested by Rob Herring.
License remains GPL-2.0 as the other powerpc dtses are the same, happy
to change if there is a different preferred default.
v2->v3: Re-added address-cells accidentally removed in v2.
Marked latte as a simple-bus, since it is.
arch/powerpc/boot/dts/wiiu.dts | 326 +++++++++++++++++++++++++++++++++
1 file changed, 326 insertions(+)
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
new file mode 100644
index 000000000000..44a5a1469095
--- /dev/null
+++ b/arch/powerpc/boot/dts/wiiu.dts
@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nintendo Wii U Device Tree Source
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "nintendo,wiiu";
+ compatible = "nintendo,wiiu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs = "root=/dev/sda1 rootwait";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
+ 0x08000000 0x00300000 /* MEM0 - 3MiB */
+ 0x10000000 0x80000000>; /* MEM2 - 2GiB */
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* TODO: Add SMP */
+ PowerPC,espresso@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <1243125000>; /* 1.243125GHz */
+ bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
+ timebase-frequency = <62156250>; /* 1/4 of the bus clock */
+ i-cache-size = <32768>; /* 32K icache */
+ i-cache-line-size = <32>;
+ i-cache-block-size = <32>;
+ i-cache-sets = <128>;
+ d-cache-size = <32768>; /* 32K dcache */
+ d-cache-line-size = <32>;
+ d-cache-block-size = <32>;
+ d-cache-sets = <128>;
+ next-level-cache = <&L2_0>;
+ L2_0:l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>; /* 512KB L2 */
+ cache-line-size = <64>;
+ cache-block-size = <32>;
+ cache-sets = <2048>;
+ };
+ };
+ };
+
+ latte {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "nintendo,latte", "simple-bus";
+ ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
+ 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
+ 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
+
+ latte_gpu: gpu@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+
+ ehci_0: usb@d040000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d040000 0x100>;
+ interrupts = <4>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_0: usb@d050000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d050000 0x100>;
+ interrupts = <5>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ohci_0_1: usb@d060000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d060000 0x100>;
+ interrupts = <6>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_1: usb@d120000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d120000 0x100>;
+ interrupts = <16>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_1_0: usb@d130000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d130000 0x100>;
+ interrupts = <35>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_2: usb@d140000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d140000 0x100>;
+ interrupts = <36>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_2_0: usb@d150000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d150000 0x100>;
+ interrupts = <37>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ wifi_0: sdhci@d080000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d080000 0x200>;
+ interrupts = <8>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ legacy_ipc: ipc@d800000 {
+ compatible = "nintendo,latte-ipc", "nintendo,hollywood-ipc";
+ reg = <0x0d800000 0x10>;
+ interrupts = <30 31>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ latte_otp: otp@d8001ec {
+ compatible = "nintendo,latte-otp";
+ reg = <0x0d8001ec 0x8>;
+ };
+
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x808>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38 28>;
+ };
+
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+
+ gpio: gpio@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d8000c0 0x40>;
+ gpio-controller;
+ /* TODO: There are actually 31 AHBALL GPIOs */
+ ngpios = <24>;
+
+ gpio-line-names =
+ "POWER", "DWIFI", "FAN", "DC_DC",
+ "", "Esp10WorkAround", "", "",
+ "PADPD", "", "EEP_CS", "EEP_CLK",
+ "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
+ "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
+ "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ gpio2: gpio@d800520 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d800520 0x40>;
+ gpio-controller;
+ ngpios = <7>;
+
+ gpio-line-names =
+ "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
+ "AVE_INT", "", "AVE_RESET";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+ };
+
+ spi_gpio: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+ gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ eeprom@0 {
+ compatible = "atmel,at93c66";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ /* TODO: wiiubrew says this is 16-bit, but I only get the correct
+ * values in 8-bit...
+ */
+ data-size = <8>;
+ read-only;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
+ rng_seed: rng@12 { reg = <0x012 8>; };
+ ppc_pvr: pvr@20 { reg = <0x020 4>; };
+ seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
+ seeprom_ver: sver@2a { reg = <0x02A 2>; };
+ otp_ver: over@2c { reg = <0x02C 2>; };
+ otp_rev: orev@2e { reg = <0x02E 2>; };
+ otp_ver_str: over-str@30 { reg = <0x030 8>; };
+
+ bc_crc: bc-crc@38 { reg = <0x038 4>; };
+ bc_sz: bc-sz@3c { reg = <0x03C 2>; };
+ bc_ver: bc-ver@3e { reg = <0x03E 2>; };
+ bc_boardtype: boardtype@42 { reg = <0x042 2>; };
+ bc_boardrev: boardrev@44 { reg = <0x044 2>; };
+ bc_bootsource: bootsource@46 { reg = <0x046 2>; };
+ bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
+ bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
+ bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
+ bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
+ bc_video1080p: video1080p@50 { reg = <0x050 2>; };
+ bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
+ bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
+ bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
+ bc_satadevice: satadevice@58 { reg = <0x058 2>; };
+ bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
+ bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
+
+ drive_key: drvkey@80 { reg = <0x080 16>; };
+ factory_key: fackey@90 { reg = <0x090 16>; };
+ shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
+ usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
+ drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
+ usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
+ shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
+
+ sysprod_version: sp_ver@140 { reg = <0x140 4>; };
+ sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
+ sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
+ sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
+ sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
+ sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
+ sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
+ sysprod_code: sp_code@158 { reg = <0x158 8>; };
+ sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
+ sysprod_model: sp_model@170 { reg = <0x170 16>; };
+
+ prod_year: pyear@188 { reg = <0x188 2>; };
+ prod_date: pdate@18a { reg = <0x18A 2>; };
+ prod_time: ptime@18c { reg = <0x18C 2>; };
+
+ boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
+ };
+ };
+
+ /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
+ gpio-keys-polled {
+ poll-interval = <50>;
+ compatible = "gpio-keys-polled";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 02/12] powerpc: wiiu: device tree
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add a device tree source file for the Nintendo Wii U video game console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v1->v2: Style and formatting changes suggested by Rob Herring.
License remains GPL-2.0 as the other powerpc dtses are the same, happy
to change if there is a different preferred default.
v2->v3: Re-added address-cells accidentally removed in v2.
Marked latte as a simple-bus, since it is.
arch/powerpc/boot/dts/wiiu.dts | 326 +++++++++++++++++++++++++++++++++
1 file changed, 326 insertions(+)
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
new file mode 100644
index 000000000000..44a5a1469095
--- /dev/null
+++ b/arch/powerpc/boot/dts/wiiu.dts
@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nintendo Wii U Device Tree Source
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "nintendo,wiiu";
+ compatible = "nintendo,wiiu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ chosen {
+ bootargs = "root=/dev/sda1 rootwait";
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
+ 0x08000000 0x00300000 /* MEM0 - 3MiB */
+ 0x10000000 0x80000000>; /* MEM2 - 2GiB */
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* TODO: Add SMP */
+ PowerPC,espresso@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <1243125000>; /* 1.243125GHz */
+ bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
+ timebase-frequency = <62156250>; /* 1/4 of the bus clock */
+ i-cache-size = <32768>; /* 32K icache */
+ i-cache-line-size = <32>;
+ i-cache-block-size = <32>;
+ i-cache-sets = <128>;
+ d-cache-size = <32768>; /* 32K dcache */
+ d-cache-line-size = <32>;
+ d-cache-block-size = <32>;
+ d-cache-sets = <128>;
+ next-level-cache = <&L2_0>;
+ L2_0:l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>; /* 512KB L2 */
+ cache-line-size = <64>;
+ cache-block-size = <32>;
+ cache-sets = <2048>;
+ };
+ };
+ };
+
+ latte {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "nintendo,latte", "simple-bus";
+ ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
+ 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
+ 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
+
+ latte_gpu: gpu@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+
+ espresso_pic: pic@c000078 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ };
+
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+
+ ehci_0: usb@d040000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d040000 0x100>;
+ interrupts = <4>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_0: usb@d050000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d050000 0x100>;
+ interrupts = <5>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ohci_0_1: usb@d060000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d060000 0x100>;
+ interrupts = <6>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_1: usb@d120000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d120000 0x100>;
+ interrupts = <16>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_1_0: usb@d130000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d130000 0x100>;
+ interrupts = <35>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ ehci_2: usb@d140000 {
+ compatible = "nintendo,latte-usb-ehci", "usb-ehci";
+ reg = <0x0d140000 0x100>;
+ interrupts = <36>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_2_0: usb@d150000 {
+ compatible = "nintendo,latte-usb-ohci";
+ reg = <0x0d150000 0x100>;
+ interrupts = <37>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ sdcard_0: sdhci@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ wifi_0: sdhci@d080000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d080000 0x200>;
+ interrupts = <8>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ legacy_ipc: ipc@d800000 {
+ compatible = "nintendo,latte-ipc", "nintendo,hollywood-ipc";
+ reg = <0x0d800000 0x10>;
+ interrupts = <30 31>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ latte_otp: otp@d8001ec {
+ compatible = "nintendo,latte-otp";
+ reg = <0x0d8001ec 0x8>;
+ };
+
+ sata: ahci@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x808>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38 28>;
+ };
+
+ latte_pic: pic@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+
+ gpio: gpio@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d8000c0 0x40>;
+ gpio-controller;
+ /* TODO: There are actually 31 AHBALL GPIOs */
+ ngpios = <24>;
+
+ gpio-line-names =
+ "POWER", "DWIFI", "FAN", "DC_DC",
+ "", "Esp10WorkAround", "", "",
+ "PADPD", "", "EEP_CS", "EEP_CLK",
+ "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
+ "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
+ "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ gpio2: gpio@d800520 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d800520 0x40>;
+ gpio-controller;
+ ngpios = <7>;
+
+ gpio-line-names =
+ "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
+ "AVE_INT", "", "AVE_RESET";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+ };
+
+ spi_gpio: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+ gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ eeprom@0 {
+ compatible = "atmel,at93c66";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ /* TODO: wiiubrew says this is 16-bit, but I only get the correct
+ * values in 8-bit...
+ */
+ data-size = <8>;
+ read-only;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
+ rng_seed: rng@12 { reg = <0x012 8>; };
+ ppc_pvr: pvr@20 { reg = <0x020 4>; };
+ seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
+ seeprom_ver: sver@2a { reg = <0x02A 2>; };
+ otp_ver: over@2c { reg = <0x02C 2>; };
+ otp_rev: orev@2e { reg = <0x02E 2>; };
+ otp_ver_str: over-str@30 { reg = <0x030 8>; };
+
+ bc_crc: bc-crc@38 { reg = <0x038 4>; };
+ bc_sz: bc-sz@3c { reg = <0x03C 2>; };
+ bc_ver: bc-ver@3e { reg = <0x03E 2>; };
+ bc_boardtype: boardtype@42 { reg = <0x042 2>; };
+ bc_boardrev: boardrev@44 { reg = <0x044 2>; };
+ bc_bootsource: bootsource@46 { reg = <0x046 2>; };
+ bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
+ bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
+ bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
+ bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
+ bc_video1080p: video1080p@50 { reg = <0x050 2>; };
+ bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
+ bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
+ bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
+ bc_satadevice: satadevice@58 { reg = <0x058 2>; };
+ bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
+ bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
+
+ drive_key: drvkey@80 { reg = <0x080 16>; };
+ factory_key: fackey@90 { reg = <0x090 16>; };
+ shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
+ usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
+ drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
+ usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
+ shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
+
+ sysprod_version: sp_ver@140 { reg = <0x140 4>; };
+ sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
+ sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
+ sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
+ sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
+ sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
+ sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
+ sysprod_code: sp_code@158 { reg = <0x158 8>; };
+ sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
+ sysprod_model: sp_model@170 { reg = <0x170 16>; };
+
+ prod_year: pyear@188 { reg = <0x188 2>; };
+ prod_date: pdate@18a { reg = <0x18A 2>; };
+ prod_time: ptime@18c { reg = <0x18C 2>; };
+
+ boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
+ };
+ };
+
+ /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
+ gpio-keys-polled {
+ poll-interval = <50>;
+ compatible = "gpio-keys-polled";
+
+ power {
+ label = "Power Button";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 03/12] powerpc: wiiu: bootwrapper support
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add support for the Nintendo Wii U game console to the powerpc
bootwrapper.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/Makefile | 4 ++
arch/powerpc/boot/wiiu-head.S | 103 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/wiiu.c | 73 ++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index a9cd2ea4a861..6694f578c447 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -161,6 +161,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
gamecube-head.S gamecube.c \
wii-head.S wii.c holly.c \
fixed-head.S mvme5100.c
+src-plat-$(CONFIG_WIIU) += wiiu-head.S wiiu.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -359,6 +360,9 @@ image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
image-$(CONFIG_WII) += dtbImage.wii
image-$(CONFIG_MVME5100) += dtbImage.mvme5100
+# Board port in arch/powerpc/platform/wiiu/Kconfig
+image-$(CONFIG_WIIU) += dtbImage.wiiu
+
# Board port in arch/powerpc/platform/amigaone/Kconfig
image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/wiiu-head.S b/arch/powerpc/boot/wiiu-head.S
new file mode 100644
index 000000000000..8586e2e992d5
--- /dev/null
+++ b/arch/powerpc/boot/wiiu-head.S
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entrypoint head asm
+ * This code expects to be called directly after the Espresso BootROM, which implies certain MSR
+ * states.
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include "ppc_asm.h"
+
+.text
+.global _zimage_start
+_zimage_start:
+ /* Clear out all BATs. MMU is already off. */
+ li r8, 0
+
+ mtspr 0x210, r8 /* IBAT0U */
+ mtspr 0x212, r8 /* IBAT1U */
+ mtspr 0x214, r8 /* IBAT2U */
+ mtspr 0x216, r8 /* IBAT3U */
+ mtspr 0x218, r8 /* DBAT0U */
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x21c, r8 /* DBAT2U */
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ mtspr 0x230, r8 /* IBAT4U */
+ mtspr 0x232, r8 /* IBAT5U */
+ mtspr 0x234, r8 /* IBAT6U */
+ mtspr 0x236, r8 /* IBAT7U */
+ mtspr 0x238, r8 /* DBAT4U */
+ mtspr 0x23a, r8 /* DBAT5U */
+ mtspr 0x23c, r8 /* DBAT6U */
+ mtspr 0x23e, r8 /* DBAT7U */
+
+ /* MEM1 */
+ /* 32MB, starting at 0x00000000... */
+ li r8, 0x000003ff@l
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x212, r8 /* IBAT1U */
+
+ /* mapped into phys 0x00000000; read-write; normal caching. */
+ li r8, 0x00000002@l
+ mtspr 0x21b, r8 /* DBAT1L */
+ mtspr 0x213, r8 /* IBAT1L */
+
+ /* Latte MMIO area */
+ /* 64MB, starting at 0x0d800000... */
+ lis r8, 0x0d8007ff@h
+ ori r8, r8,0x0d800007ff@l
+ mtspr 0x21c, r8 /* DBAT2U */
+
+ /* mapped into phys 0x0d800000; read-write; writethrough/nocache/guard*/
+ lis r8, 0x0d80006A@h
+ ori r8, r8,0x0d80006A@l
+ mtspr 0x21d, r8 /* DBAT2L */
+
+ /* Bootloader comms area (actually 0x89200000) */
+ /* 128MiB, starting at 0x88000000... */
+ lis r8, 0x88000fff@h
+ ori r8, r8, 0x88000fff@l
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ /* mapped into phys 0x88000000; read-write; normal caching. */
+ lis r8, 0x88000002@h
+ ori r8, r8, 0x88000002@l
+ mtspr 0x21f, r8 /* DBAT3L */
+
+ /* Turn on BAT 4 through 7, configure CPU */
+ mfspr r8, 0x3f3 /* HID4 */
+ oris r8, r8, 0x3200 /* L2FM: 64-byte fetch, BPD: max depth is 4, SBE */
+ mtspr 0x3f3, r8
+
+ /* Turn on and invalidate caches */
+ mfspr r8, 0x3f0 /* HID0 */
+ /* HID0_ICE | HID0_ICFI | HID0_DCE | HID0_DCFI */
+ ori r8, r8, (1 << 15) | (1 << 11) | (1 << 14) | (1 << 10)
+ mtspr 0x3f0, r8
+ isync
+
+ li r3, 0
+ li r4, 0
+ li r5, 0
+
+ bl get_lr
+get_lr:
+ mflr r8
+ /* Get absolute address of done */
+ addi r8, r8, done - get_lr
+
+ /* Set up MSR */
+ /* MSR_DR | MSR_IR | MSR_FP */
+ /* Data/instruction MMUs, FPU because why not */
+ ori r9, r3, (1 << 4) | (1 << 5) | (1 << 13)
+
+ /* Apply our new MSR, starting execution at "done" */
+ mtsrr0 r8
+ mtsrr1 r9
+ sync
+ rfi
+done:
+ b _zimage_start_lib
diff --git a/arch/powerpc/boot/wiiu.c b/arch/powerpc/boot/wiiu.c
new file mode 100644
index 000000000000..fe88eb2c42ae
--- /dev/null
+++ b/arch/powerpc/boot/wiiu.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Platform support and IPC debug console to linux-loader (on Starbuck)
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include <stddef.h>
+#include "string.h"
+#include "stdio.h"
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+BSS_STACK(8192);
+
+// Volatile is used here since the io.h routines require it
+#define LT_IPC_PPCMSG ((volatile u32 *)0x0d800000)
+#define LT_IPC_PPCCTRL ((volatile u32 *)0x0d800004)
+#define LT_IPC_PPCCTRL_X1 0x1
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+static void wiiu_ipc_sendmsg(int msg)
+{
+ out_be32(LT_IPC_PPCMSG, msg);
+ out_be32(LT_IPC_PPCCTRL, LT_IPC_PPCCTRL_X1);
+ while (in_be32(LT_IPC_PPCCTRL) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Send logging string out over IPC to linux-loader for early printing.
+ * Packs 3 chars at a time where possible.
+ */
+static void wiiu_write_ipc(const char *buf, int len)
+{
+ int i = 0;
+
+ for (i = 0; i + 2 < len; i += 3) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i + 0] << 16) |
+ (buf[i + 1] << 8) | buf[i + 2];
+
+ wiiu_ipc_sendmsg(msg);
+ }
+
+ if (i < len) {
+ for (; i < len; i++) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i] << 16);
+
+ wiiu_ipc_sendmsg(msg);
+ }
+ }
+}
+
+/*
+ * Note 32MiB heap - not ideal but seems fine for the bootwrapper
+ */
+void platform_init(unsigned int r3, unsigned int r4, unsigned int r5)
+{
+ u32 heapsize;
+
+ console_ops.write = wiiu_write_ipc;
+ printf("wiiu: bootwrapper ok\n");
+
+ heapsize = 32 * 1024 * 1024 - (u32)_end;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ printf("wiiu: heap ok\n");
+
+ fdt_init(_dtb_start);
+ printf("wiiu: dtb ok\n");
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 55978f32fa77..83b74ffaae2b 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -344,6 +344,10 @@ gamecube|wii)
link_address='0x600000'
platformo="$object/$platform-head.o $object/$platform.o"
;;
+wiiu)
+ link_address='0x600000'
+ platformo="$object/wiiu-head.o $object/$platform.o"
+ ;;
microwatt)
link_address='0x500000'
platformo="$object/fixed-head.o $object/$platform.o"
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 03/12] powerpc: wiiu: bootwrapper support
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add support for the Nintendo Wii U game console to the powerpc
bootwrapper.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/Makefile | 4 ++
arch/powerpc/boot/wiiu-head.S | 103 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/wiiu.c | 73 ++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index a9cd2ea4a861..6694f578c447 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -161,6 +161,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
gamecube-head.S gamecube.c \
wii-head.S wii.c holly.c \
fixed-head.S mvme5100.c
+src-plat-$(CONFIG_WIIU) += wiiu-head.S wiiu.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -359,6 +360,9 @@ image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
image-$(CONFIG_WII) += dtbImage.wii
image-$(CONFIG_MVME5100) += dtbImage.mvme5100
+# Board port in arch/powerpc/platform/wiiu/Kconfig
+image-$(CONFIG_WIIU) += dtbImage.wiiu
+
# Board port in arch/powerpc/platform/amigaone/Kconfig
image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/wiiu-head.S b/arch/powerpc/boot/wiiu-head.S
new file mode 100644
index 000000000000..8586e2e992d5
--- /dev/null
+++ b/arch/powerpc/boot/wiiu-head.S
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entrypoint head asm
+ * This code expects to be called directly after the Espresso BootROM, which implies certain MSR
+ * states.
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include "ppc_asm.h"
+
+.text
+.global _zimage_start
+_zimage_start:
+ /* Clear out all BATs. MMU is already off. */
+ li r8, 0
+
+ mtspr 0x210, r8 /* IBAT0U */
+ mtspr 0x212, r8 /* IBAT1U */
+ mtspr 0x214, r8 /* IBAT2U */
+ mtspr 0x216, r8 /* IBAT3U */
+ mtspr 0x218, r8 /* DBAT0U */
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x21c, r8 /* DBAT2U */
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ mtspr 0x230, r8 /* IBAT4U */
+ mtspr 0x232, r8 /* IBAT5U */
+ mtspr 0x234, r8 /* IBAT6U */
+ mtspr 0x236, r8 /* IBAT7U */
+ mtspr 0x238, r8 /* DBAT4U */
+ mtspr 0x23a, r8 /* DBAT5U */
+ mtspr 0x23c, r8 /* DBAT6U */
+ mtspr 0x23e, r8 /* DBAT7U */
+
+ /* MEM1 */
+ /* 32MB, starting at 0x00000000... */
+ li r8, 0x000003ff@l
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x212, r8 /* IBAT1U */
+
+ /* mapped into phys 0x00000000; read-write; normal caching. */
+ li r8, 0x00000002@l
+ mtspr 0x21b, r8 /* DBAT1L */
+ mtspr 0x213, r8 /* IBAT1L */
+
+ /* Latte MMIO area */
+ /* 64MB, starting at 0x0d800000... */
+ lis r8, 0x0d8007ff@h
+ ori r8, r8,0x0d800007ff@l
+ mtspr 0x21c, r8 /* DBAT2U */
+
+ /* mapped into phys 0x0d800000; read-write; writethrough/nocache/guard*/
+ lis r8, 0x0d80006A@h
+ ori r8, r8,0x0d80006A@l
+ mtspr 0x21d, r8 /* DBAT2L */
+
+ /* Bootloader comms area (actually 0x89200000) */
+ /* 128MiB, starting at 0x88000000... */
+ lis r8, 0x88000fff@h
+ ori r8, r8, 0x88000fff@l
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ /* mapped into phys 0x88000000; read-write; normal caching. */
+ lis r8, 0x88000002@h
+ ori r8, r8, 0x88000002@l
+ mtspr 0x21f, r8 /* DBAT3L */
+
+ /* Turn on BAT 4 through 7, configure CPU */
+ mfspr r8, 0x3f3 /* HID4 */
+ oris r8, r8, 0x3200 /* L2FM: 64-byte fetch, BPD: max depth is 4, SBE */
+ mtspr 0x3f3, r8
+
+ /* Turn on and invalidate caches */
+ mfspr r8, 0x3f0 /* HID0 */
+ /* HID0_ICE | HID0_ICFI | HID0_DCE | HID0_DCFI */
+ ori r8, r8, (1 << 15) | (1 << 11) | (1 << 14) | (1 << 10)
+ mtspr 0x3f0, r8
+ isync
+
+ li r3, 0
+ li r4, 0
+ li r5, 0
+
+ bl get_lr
+get_lr:
+ mflr r8
+ /* Get absolute address of done */
+ addi r8, r8, done - get_lr
+
+ /* Set up MSR */
+ /* MSR_DR | MSR_IR | MSR_FP */
+ /* Data/instruction MMUs, FPU because why not */
+ ori r9, r3, (1 << 4) | (1 << 5) | (1 << 13)
+
+ /* Apply our new MSR, starting execution at "done" */
+ mtsrr0 r8
+ mtsrr1 r9
+ sync
+ rfi
+done:
+ b _zimage_start_lib
diff --git a/arch/powerpc/boot/wiiu.c b/arch/powerpc/boot/wiiu.c
new file mode 100644
index 000000000000..fe88eb2c42ae
--- /dev/null
+++ b/arch/powerpc/boot/wiiu.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Platform support and IPC debug console to linux-loader (on Starbuck)
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include <stddef.h>
+#include "string.h"
+#include "stdio.h"
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+BSS_STACK(8192);
+
+// Volatile is used here since the io.h routines require it
+#define LT_IPC_PPCMSG ((volatile u32 *)0x0d800000)
+#define LT_IPC_PPCCTRL ((volatile u32 *)0x0d800004)
+#define LT_IPC_PPCCTRL_X1 0x1
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+static void wiiu_ipc_sendmsg(int msg)
+{
+ out_be32(LT_IPC_PPCMSG, msg);
+ out_be32(LT_IPC_PPCCTRL, LT_IPC_PPCCTRL_X1);
+ while (in_be32(LT_IPC_PPCCTRL) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Send logging string out over IPC to linux-loader for early printing.
+ * Packs 3 chars at a time where possible.
+ */
+static void wiiu_write_ipc(const char *buf, int len)
+{
+ int i = 0;
+
+ for (i = 0; i + 2 < len; i += 3) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i + 0] << 16) |
+ (buf[i + 1] << 8) | buf[i + 2];
+
+ wiiu_ipc_sendmsg(msg);
+ }
+
+ if (i < len) {
+ for (; i < len; i++) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i] << 16);
+
+ wiiu_ipc_sendmsg(msg);
+ }
+ }
+}
+
+/*
+ * Note 32MiB heap - not ideal but seems fine for the bootwrapper
+ */
+void platform_init(unsigned int r3, unsigned int r4, unsigned int r5)
+{
+ u32 heapsize;
+
+ console_ops.write = wiiu_write_ipc;
+ printf("wiiu: bootwrapper ok\n");
+
+ heapsize = 32 * 1024 * 1024 - (u32)_end;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ printf("wiiu: heap ok\n");
+
+ fdt_init(_dtb_start);
+ printf("wiiu: dtb ok\n");
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 55978f32fa77..83b74ffaae2b 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -344,6 +344,10 @@ gamecube|wii)
link_address='0x600000'
platformo="$object/$platform-head.o $object/$platform.o"
;;
+wiiu)
+ link_address='0x600000'
+ platformo="$object/wiiu-head.o $object/$platform.o"
+ ;;
microwatt)
link_address='0x500000'
platformo="$object/fixed-head.o $object/$platform.o"
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 04/12] powerpc: wiiu: introduce wiiu platform
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Adds empty platforms/wiiu for Nintendo Wii U console
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v2->v3: Add help text for CONFIG_WIIU.
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 8 ++++++++
arch/powerpc/platforms/wiiu/Makefile | 1 +
4 files changed, 11 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d41dad227de8..c4a9c3c0b409 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/wiiu/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 94470fb27c99..944ddd938711 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
obj-$(CONFIG_PPC_MICROWATT) += microwatt/
+obj-$(CONFIG_WIIU) += wiiu/
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
new file mode 100644
index 000000000000..3834834c6bd7
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config WIIU
+ bool "Nintendo Wii U"
+ depends on PPC_BOOK3S_32
+ help
+ Select WIIU if configuring for the Nintendo Wii U.
+ More information at: <https://linux-wiiu.org/>
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
new file mode 100644
index 000000000000..f66554cd5c45
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: GPL-2.0
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 04/12] powerpc: wiiu: introduce wiiu platform
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Adds empty platforms/wiiu for Nintendo Wii U console
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v2->v3: Add help text for CONFIG_WIIU.
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 8 ++++++++
arch/powerpc/platforms/wiiu/Makefile | 1 +
4 files changed, 11 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d41dad227de8..c4a9c3c0b409 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/wiiu/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 94470fb27c99..944ddd938711 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
obj-$(CONFIG_PPC_MICROWATT) += microwatt/
+obj-$(CONFIG_WIIU) += wiiu/
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
new file mode 100644
index 000000000000..3834834c6bd7
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config WIIU
+ bool "Nintendo Wii U"
+ depends on PPC_BOOK3S_32
+ help
+ Select WIIU if configuring for the Nintendo Wii U.
+ More information at: <https://linux-wiiu.org/>
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
new file mode 100644
index 000000000000..f66554cd5c45
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: GPL-2.0
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 05/12] powerpc: wiiu: declare as non-coherent
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
The Nintendo Wii U requires explicit cache handling when interfacing
with DMA devices.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 9e2df4b66478..20eef6595a60 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -501,7 +501,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ GAMECUBE_COMMON || AMIGAONE || WIIU
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 05/12] powerpc: wiiu: declare as non-coherent
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
The Nintendo Wii U requires explicit cache handling when interfacing
with DMA devices.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 9e2df4b66478..20eef6595a60 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -501,7 +501,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ GAMECUBE_COMMON || AMIGAONE || WIIU
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 06/12] powerpc: wiiu: udbg support for latteipc
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add support for using the Latte chipset IPC for udbg on the Nintendo Wii
U console.
These messages can then be received by a special firmware running on the
"Starbuck" coprocessor.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v2->v3: Fix a missing declaration issue by including latteipc_udbg.h.
arch/powerpc/Kconfig.debug | 9 ++
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/wiiu/Kconfig | 13 ++
arch/powerpc/platforms/wiiu/Makefile | 2 +
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 124 ++++++++++++++++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 +++++
8 files changed, 199 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 9f363c143d86..cee97d21f5fb 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,15 @@ config PPC_EARLY_DEBUG_USBGECKO
Select this to enable early debugging for Nintendo GameCube/Wii
consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_LATTEIPC
+ bool "Early debugging through Latte chipset IPC"
+ depends on WIIU
+ select LATTEIPC_UDBG
+ help
+ Select this to enable early debugging for Nintendo Wii U consoles via
+ chipset IPC to the security coprocessor. This assumes a firmware is
+ running on the coprocessor to receive messages.
+
config PPC_EARLY_DEBUG_PS3GELIC
bool "Early debugging through the PS3 Ethernet port"
depends on PPC_PS3
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index b4aa0d88ce2c..266b0e744ddc 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -53,6 +53,7 @@ extern void __init udbg_init_ehv_bc(void);
extern void __init udbg_init_ps3gelic(void);
extern void __init udbg_init_debug_opal_raw(void);
extern void __init udbg_init_debug_opal_hvsi(void);
+extern void __init udbg_init_latteipc(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 6c739beb938c..48d487efb25c 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -164,6 +164,9 @@ __after_mmu_off:
#ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO
bl setup_usbgecko_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+ bl setup_latteipc_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1201,4 +1204,21 @@ setup_usbgecko_bat:
blr
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+setup_latteipc_bat:
+ /* prepare a BAT for early io */
+ lis r8, 0x0d80
+
+ /*
+ * The virtual address used must match the virtual address
+ * associated to the fixmap entry FIX_EARLY_DEBUG_BASE.
+ */
+ lis r11, 0xfffe /* top 128K */
+ ori r8, r8, 0x002a /* uncached, guarded ,rw */
+ ori r11, r11, 0x2 /* 128K, Vs=1, Vp=0 */
+ mtspr SPRN_DBAT1L, r8
+ mtspr SPRN_DBAT1U, r11
+ blr
+#endif
+
.data
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index b1544b2f6321..84eae25c195e 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -67,6 +67,9 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_raw();
#elif defined(CONFIG_PPC_EARLY_DEBUG_OPAL_HVSI)
udbg_init_debug_opal_hvsi();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_LATTEIPC)
+ /* For use on Nintendo Wii U */
+ udbg_init_latteipc();
#endif
#ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index 3834834c6bd7..8dfd6ac8774d 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -6,3 +6,16 @@ config WIIU
help
Select WIIU if configuring for the Nintendo Wii U.
More information at: <https://linux-wiiu.org/>
+
+config LATTEIPC_UDBG
+ bool "Chipset IPC udbg console for the Nintendo Wii U"
+ depends on WIIU
+ help
+ If you say yes to this option, support will be included for the
+ Wii U's chipset IPC as a udbg console.
+ These IPC messages can be received by a firmware running on the
+ console's "Starbuck" security coprocessor.
+
+ This driver bypasses the IPC layer completely.
+
+ If in doubt, say N here.
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index f66554cd5c45..b1e0e1307f6e 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.c b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
new file mode 100644
index 000000000000..4e44e0cb6494
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.c
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#include <mm/mmu_decl.h>
+
+#include <linux/io.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/fixmap.h>
+
+#include "udbg_latteipc.h"
+
+#define LT_MMIO_BASE ((phys_addr_t)0x0d800000)
+#define LT_IPC_PPCMSG 0x00
+#define LT_IPC_PPCCTRL 0x04
+#define LT_IPC_PPCCTRL_X1 0x01
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+void __iomem *latteipc_io_base;
+
+/*
+ * Transmits a character.
+ * Sends over IPC to linux-loader for printing.
+ */
+static void latteipc_udbg_putc(char c)
+{
+ void __iomem *ppcmsg_reg = latteipc_io_base + LT_IPC_PPCMSG;
+ void __iomem *ppcctrl_reg = latteipc_io_base + LT_IPC_PPCCTRL;
+
+ out_be32(ppcmsg_reg, WIIU_LOADER_CMD_PRINT | (c << 16));
+ out_be32(ppcctrl_reg, LT_IPC_PPCCTRL_X1);
+
+ while (in_be32(ppcctrl_reg) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Retrieves and prepares the virtual address needed to access the hardware.
+ */
+static void __iomem *latteipc_udbg_setup_ipc_io_base(struct device_node *np)
+{
+ void __iomem *ipc_io_base = NULL;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ reg = of_get_property(np, "reg", NULL);
+ if (reg) {
+ paddr = of_translate_address(np, reg);
+ if (paddr)
+ ipc_io_base = ioremap(paddr, reg[1]);
+ }
+ return ipc_io_base;
+}
+
+/*
+ * Latte IPC udbg support initialization.
+ */
+void __init latteipc_udbg_init(void)
+{
+ struct device_node *np;
+ void __iomem *ipc_io_base;
+
+ if (latteipc_io_base)
+ udbg_printf("%s: early -> final\n", __func__);
+
+ np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
+ if (!np) {
+ udbg_printf("%s: IPC node not found\n", __func__);
+ goto out;
+ }
+
+ ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
+ if (!ipc_io_base) {
+ udbg_printf("%s: failed to setup IPC io base\n", __func__);
+ goto done;
+ }
+
+ udbg_putc = latteipc_udbg_putc;
+ udbg_printf("latteipc_udbg: ready\n");
+
+done:
+ of_node_put(np);
+out:
+ return;
+}
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+
+void __init udbg_init_latteipc(void)
+{
+ /*
+ * At this point we have a BAT already setup that enables I/O
+ * to the IPC hardware.
+ *
+ * The BAT uses a virtual address range reserved at the fixmap.
+ * This must match the virtual address configured in
+ * head_32.S:setup_latteipc_bat().
+ */
+ latteipc_io_base = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE);
+
+ /* Assume a firmware is present, add hooks */
+ udbg_putc = latteipc_udbg_putc;
+
+ /*
+ * Prepare again the same BAT for MMU_init.
+ * This allows udbg I/O to continue working after the MMU is
+ * turned on for real.
+ * It is safe to continue using the same virtual address as it is
+ * a reserved fixmap area.
+ */
+ setbat(1, (unsigned long)latteipc_io_base, LT_MMIO_BASE, 128 * 1024,
+ PAGE_KERNEL_NCG);
+}
+
+#endif /* CONFIG_PPC_EARLY_DEBUG_LATTEIPC */
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.h b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
new file mode 100644
index 000000000000..ca6d34e49158
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.h
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#ifndef __LATTEIPC_UDBG_H
+#define __LATTEIPC_UDBG_H
+
+#ifdef CONFIG_LATTEIPC_UDBG
+
+void __init latteipc_udbg_init(void);
+
+#else
+
+static inline void __init latteipc_udbg_init(void)
+{
+}
+
+#endif /* CONFIG_LATTEIPC_UDBG */
+
+#endif /* __LATTEIPC_UDBG_H */
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 06/12] powerpc: wiiu: udbg support for latteipc
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add support for using the Latte chipset IPC for udbg on the Nintendo Wii
U console.
These messages can then be received by a special firmware running on the
"Starbuck" coprocessor.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v2->v3: Fix a missing declaration issue by including latteipc_udbg.h.
arch/powerpc/Kconfig.debug | 9 ++
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/wiiu/Kconfig | 13 ++
arch/powerpc/platforms/wiiu/Makefile | 2 +
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 124 ++++++++++++++++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 +++++
8 files changed, 199 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 9f363c143d86..cee97d21f5fb 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,15 @@ config PPC_EARLY_DEBUG_USBGECKO
Select this to enable early debugging for Nintendo GameCube/Wii
consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_LATTEIPC
+ bool "Early debugging through Latte chipset IPC"
+ depends on WIIU
+ select LATTEIPC_UDBG
+ help
+ Select this to enable early debugging for Nintendo Wii U consoles via
+ chipset IPC to the security coprocessor. This assumes a firmware is
+ running on the coprocessor to receive messages.
+
config PPC_EARLY_DEBUG_PS3GELIC
bool "Early debugging through the PS3 Ethernet port"
depends on PPC_PS3
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index b4aa0d88ce2c..266b0e744ddc 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -53,6 +53,7 @@ extern void __init udbg_init_ehv_bc(void);
extern void __init udbg_init_ps3gelic(void);
extern void __init udbg_init_debug_opal_raw(void);
extern void __init udbg_init_debug_opal_hvsi(void);
+extern void __init udbg_init_latteipc(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 6c739beb938c..48d487efb25c 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -164,6 +164,9 @@ __after_mmu_off:
#ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO
bl setup_usbgecko_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+ bl setup_latteipc_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1201,4 +1204,21 @@ setup_usbgecko_bat:
blr
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+setup_latteipc_bat:
+ /* prepare a BAT for early io */
+ lis r8, 0x0d80
+
+ /*
+ * The virtual address used must match the virtual address
+ * associated to the fixmap entry FIX_EARLY_DEBUG_BASE.
+ */
+ lis r11, 0xfffe /* top 128K */
+ ori r8, r8, 0x002a /* uncached, guarded ,rw */
+ ori r11, r11, 0x2 /* 128K, Vs=1, Vp=0 */
+ mtspr SPRN_DBAT1L, r8
+ mtspr SPRN_DBAT1U, r11
+ blr
+#endif
+
.data
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index b1544b2f6321..84eae25c195e 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -67,6 +67,9 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_raw();
#elif defined(CONFIG_PPC_EARLY_DEBUG_OPAL_HVSI)
udbg_init_debug_opal_hvsi();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_LATTEIPC)
+ /* For use on Nintendo Wii U */
+ udbg_init_latteipc();
#endif
#ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index 3834834c6bd7..8dfd6ac8774d 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -6,3 +6,16 @@ config WIIU
help
Select WIIU if configuring for the Nintendo Wii U.
More information at: <https://linux-wiiu.org/>
+
+config LATTEIPC_UDBG
+ bool "Chipset IPC udbg console for the Nintendo Wii U"
+ depends on WIIU
+ help
+ If you say yes to this option, support will be included for the
+ Wii U's chipset IPC as a udbg console.
+ These IPC messages can be received by a firmware running on the
+ console's "Starbuck" security coprocessor.
+
+ This driver bypasses the IPC layer completely.
+
+ If in doubt, say N here.
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index f66554cd5c45..b1e0e1307f6e 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.c b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
new file mode 100644
index 000000000000..4e44e0cb6494
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.c
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#include <mm/mmu_decl.h>
+
+#include <linux/io.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/fixmap.h>
+
+#include "udbg_latteipc.h"
+
+#define LT_MMIO_BASE ((phys_addr_t)0x0d800000)
+#define LT_IPC_PPCMSG 0x00
+#define LT_IPC_PPCCTRL 0x04
+#define LT_IPC_PPCCTRL_X1 0x01
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+void __iomem *latteipc_io_base;
+
+/*
+ * Transmits a character.
+ * Sends over IPC to linux-loader for printing.
+ */
+static void latteipc_udbg_putc(char c)
+{
+ void __iomem *ppcmsg_reg = latteipc_io_base + LT_IPC_PPCMSG;
+ void __iomem *ppcctrl_reg = latteipc_io_base + LT_IPC_PPCCTRL;
+
+ out_be32(ppcmsg_reg, WIIU_LOADER_CMD_PRINT | (c << 16));
+ out_be32(ppcctrl_reg, LT_IPC_PPCCTRL_X1);
+
+ while (in_be32(ppcctrl_reg) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Retrieves and prepares the virtual address needed to access the hardware.
+ */
+static void __iomem *latteipc_udbg_setup_ipc_io_base(struct device_node *np)
+{
+ void __iomem *ipc_io_base = NULL;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ reg = of_get_property(np, "reg", NULL);
+ if (reg) {
+ paddr = of_translate_address(np, reg);
+ if (paddr)
+ ipc_io_base = ioremap(paddr, reg[1]);
+ }
+ return ipc_io_base;
+}
+
+/*
+ * Latte IPC udbg support initialization.
+ */
+void __init latteipc_udbg_init(void)
+{
+ struct device_node *np;
+ void __iomem *ipc_io_base;
+
+ if (latteipc_io_base)
+ udbg_printf("%s: early -> final\n", __func__);
+
+ np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
+ if (!np) {
+ udbg_printf("%s: IPC node not found\n", __func__);
+ goto out;
+ }
+
+ ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
+ if (!ipc_io_base) {
+ udbg_printf("%s: failed to setup IPC io base\n", __func__);
+ goto done;
+ }
+
+ udbg_putc = latteipc_udbg_putc;
+ udbg_printf("latteipc_udbg: ready\n");
+
+done:
+ of_node_put(np);
+out:
+ return;
+}
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+
+void __init udbg_init_latteipc(void)
+{
+ /*
+ * At this point we have a BAT already setup that enables I/O
+ * to the IPC hardware.
+ *
+ * The BAT uses a virtual address range reserved at the fixmap.
+ * This must match the virtual address configured in
+ * head_32.S:setup_latteipc_bat().
+ */
+ latteipc_io_base = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE);
+
+ /* Assume a firmware is present, add hooks */
+ udbg_putc = latteipc_udbg_putc;
+
+ /*
+ * Prepare again the same BAT for MMU_init.
+ * This allows udbg I/O to continue working after the MMU is
+ * turned on for real.
+ * It is safe to continue using the same virtual address as it is
+ * a reserved fixmap area.
+ */
+ setbat(1, (unsigned long)latteipc_io_base, LT_MMIO_BASE, 128 * 1024,
+ PAGE_KERNEL_NCG);
+}
+
+#endif /* CONFIG_PPC_EARLY_DEBUG_LATTEIPC */
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.h b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
new file mode 100644
index 000000000000..ca6d34e49158
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.h
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#ifndef __LATTEIPC_UDBG_H
+#define __LATTEIPC_UDBG_H
+
+#ifdef CONFIG_LATTEIPC_UDBG
+
+void __init latteipc_udbg_init(void);
+
+#else
+
+static inline void __init latteipc_udbg_init(void)
+{
+}
+
+#endif /* CONFIG_LATTEIPC_UDBG */
+
+#endif /* __LATTEIPC_UDBG_H */
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 07/12] powerpc: wiiu: espresso interrupt controller support
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add support for the "Espresso" interrupt controller in the Nintendo Wii
U.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Makefile | 1 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 +++++++++++++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 +++++++
3 files changed, 243 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index b1e0e1307f6e..aabf4b43e806 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WIIU) += espresso-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.c b/arch/powerpc/platforms/wiiu/espresso-pic.c
new file mode 100644
index 000000000000..1aa5d88002d5
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on flipper-pic.c
+ * Copyright (C) 2004-2009 The GameCube Linux Team
+ * Copyright (C) 2007-2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "espresso-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include "espresso-pic.h"
+
+static DEFINE_PER_CPU(struct espresso_pic *, espresso_pic_cpu);
+
+/*
+ * IRQ chip operations
+ */
+
+static void espresso_pic_mask_and_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+}
+
+static void espresso_pic_mask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_unmask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ setbits32(&pic->imr, mask);
+}
+
+static struct irq_chip espresso_pic_chip = {
+ .name = "espresso-pic",
+ .irq_ack = espresso_pic_ack,
+ .irq_mask_ack = espresso_pic_mask_and_ack,
+ .irq_mask = espresso_pic_mask,
+ .irq_unmask = espresso_pic_unmask,
+};
+
+/*
+ * Domain Ops
+ */
+
+static int espresso_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("espresso-pic: %s IRQ matches with this driver\n",
+ node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int espresso_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &espresso_pic_chip,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &espresso_pic_chip, h->host_data);
+ }
+ return 0;
+}
+
+static void espresso_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops espresso_pic_ops = {
+ .match = espresso_pic_match,
+ .alloc = espresso_pic_alloc,
+ .free = espresso_pic_free,
+};
+
+/* Store irq domain for espresso_pic_get_irq (the function gets no arguments) */
+static struct irq_domain *espresso_irq_domain;
+
+unsigned int espresso_pic_get_irq(void)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 irq_status, irq;
+
+ irq_status = in_be32(&pic->icr) & in_be32(&pic->imr);
+
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* Return first IRQ */
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(espresso_irq_domain, irq);
+}
+
+void __init espresso_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,espresso-pic");
+ struct irq_domain *host;
+ struct resource res;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &res) != 0) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct espresso_pic **pic = per_cpu_ptr(&espresso_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct espresso_pic) * cpu);
+
+ /* Mask and Ack all IRQs */
+ out_be32(&(*pic)->imr, 0);
+ out_be32(&(*pic)->icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np, ESPRESSO_NR_IRQS, &espresso_pic_ops,
+ NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ /* Save irq domain for espresso_pic_get_irq */
+ espresso_irq_domain = host;
+
+ irq_set_default_host(host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.h b/arch/powerpc/platforms/wiiu/espresso-pic.h
new file mode 100644
index 000000000000..b5b4e44ad60e
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __ESPRESSO_PIC_H
+#define __ESPRESSO_PIC_H
+
+/*
+ * Instead of using COS custom IRQ remapping, the normal IRQ mapping is used:
+ *
+ * IRQ Description
+ * -------------------------------------------
+ * 0 Error
+ * 1 Unused
+ * 2 Unused
+ * 3 Audio Interface (TV)
+ * 4 Unused
+ * 5 DSP Accelerator
+ * 6 DSP
+ * 7 DSP DMA
+ * 8 Unused
+ * 9 Unused
+ * 10 GPIPPC (?)
+ * 11 Unused
+ * 12 Audio Interface (Gamepad)
+ * 13 I2C
+ * 14 Unused
+ * 15 Unused
+ * 16 Unused
+ * 17 Unused
+ * 18 Unused
+ * 19 Unused
+ * 20 Unused
+ * 21 Unused
+ * 22 Unused
+ * 23 GX2
+ * 24 Latte IRQ Controller
+ * 25 Unused
+ * 26 IPC (CPU2)
+ * 27 Unused
+ * 28 IPC (CPU1)
+ * 29 Unused
+ * 30 IPC (CPU0)
+ * 31 Unused
+ */
+
+struct espresso_pic {
+ __be32 icr; /* Triggered IRQs */
+ __be32 imr; /* Allowed IRQs */
+} __packed;
+
+#define ESPRESSO_NR_IRQS 32
+
+unsigned int espresso_pic_get_irq(void);
+void espresso_pic_init(void);
+
+#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 07/12] powerpc: wiiu: espresso interrupt controller support
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add support for the "Espresso" interrupt controller in the Nintendo Wii
U.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Makefile | 1 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 +++++++++++++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 +++++++
3 files changed, 243 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index b1e0e1307f6e..aabf4b43e806 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WIIU) += espresso-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.c b/arch/powerpc/platforms/wiiu/espresso-pic.c
new file mode 100644
index 000000000000..1aa5d88002d5
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on flipper-pic.c
+ * Copyright (C) 2004-2009 The GameCube Linux Team
+ * Copyright (C) 2007-2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "espresso-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include "espresso-pic.h"
+
+static DEFINE_PER_CPU(struct espresso_pic *, espresso_pic_cpu);
+
+/*
+ * IRQ chip operations
+ */
+
+static void espresso_pic_mask_and_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+}
+
+static void espresso_pic_mask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_unmask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ setbits32(&pic->imr, mask);
+}
+
+static struct irq_chip espresso_pic_chip = {
+ .name = "espresso-pic",
+ .irq_ack = espresso_pic_ack,
+ .irq_mask_ack = espresso_pic_mask_and_ack,
+ .irq_mask = espresso_pic_mask,
+ .irq_unmask = espresso_pic_unmask,
+};
+
+/*
+ * Domain Ops
+ */
+
+static int espresso_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("espresso-pic: %s IRQ matches with this driver\n",
+ node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int espresso_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &espresso_pic_chip,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &espresso_pic_chip, h->host_data);
+ }
+ return 0;
+}
+
+static void espresso_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops espresso_pic_ops = {
+ .match = espresso_pic_match,
+ .alloc = espresso_pic_alloc,
+ .free = espresso_pic_free,
+};
+
+/* Store irq domain for espresso_pic_get_irq (the function gets no arguments) */
+static struct irq_domain *espresso_irq_domain;
+
+unsigned int espresso_pic_get_irq(void)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 irq_status, irq;
+
+ irq_status = in_be32(&pic->icr) & in_be32(&pic->imr);
+
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* Return first IRQ */
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(espresso_irq_domain, irq);
+}
+
+void __init espresso_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,espresso-pic");
+ struct irq_domain *host;
+ struct resource res;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &res) != 0) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct espresso_pic **pic = per_cpu_ptr(&espresso_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct espresso_pic) * cpu);
+
+ /* Mask and Ack all IRQs */
+ out_be32(&(*pic)->imr, 0);
+ out_be32(&(*pic)->icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np, ESPRESSO_NR_IRQS, &espresso_pic_ops,
+ NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ /* Save irq domain for espresso_pic_get_irq */
+ espresso_irq_domain = host;
+
+ irq_set_default_host(host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.h b/arch/powerpc/platforms/wiiu/espresso-pic.h
new file mode 100644
index 000000000000..b5b4e44ad60e
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __ESPRESSO_PIC_H
+#define __ESPRESSO_PIC_H
+
+/*
+ * Instead of using COS custom IRQ remapping, the normal IRQ mapping is used:
+ *
+ * IRQ Description
+ * -------------------------------------------
+ * 0 Error
+ * 1 Unused
+ * 2 Unused
+ * 3 Audio Interface (TV)
+ * 4 Unused
+ * 5 DSP Accelerator
+ * 6 DSP
+ * 7 DSP DMA
+ * 8 Unused
+ * 9 Unused
+ * 10 GPIPPC (?)
+ * 11 Unused
+ * 12 Audio Interface (Gamepad)
+ * 13 I2C
+ * 14 Unused
+ * 15 Unused
+ * 16 Unused
+ * 17 Unused
+ * 18 Unused
+ * 19 Unused
+ * 20 Unused
+ * 21 Unused
+ * 22 Unused
+ * 23 GX2
+ * 24 Latte IRQ Controller
+ * 25 Unused
+ * 26 IPC (CPU2)
+ * 27 Unused
+ * 28 IPC (CPU1)
+ * 29 Unused
+ * 30 IPC (CPU0)
+ * 31 Unused
+ */
+
+struct espresso_pic {
+ __be32 icr; /* Triggered IRQs */
+ __be32 imr; /* Allowed IRQs */
+} __packed;
+
+#define ESPRESSO_NR_IRQS 32
+
+unsigned int espresso_pic_get_irq(void);
+void espresso_pic_init(void);
+
+#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 08/12] powerpc: wiiu: latte interrupt controller support
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add support for the "Latte" interrupt controller in the Nintendo Wii U.
This controller is used for the entire SoC and is wired to a cascade
interrupt on the Espresso controller.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
v2->v3: Make latte_pic_get_irq static.
arch/powerpc/platforms/wiiu/Kconfig | 1 +
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 +++
4 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index 8dfd6ac8774d..40ecba8396a7 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,6 +3,7 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+ select IRQ_DOMAIN_HIERARCHY
help
Select WIIU if configuring for the Nintendo Wii U.
More information at: <https://linux-wiiu.org/>
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index aabf4b43e806..fa16c60261e6 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o
+obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.c b/arch/powerpc/platforms/wiiu/latte-pic.c
new file mode 100644
index 000000000000..7e3f49844166
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.c
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Latte" interrupt controller support.
+ * This is the controller for all the SoC devices, and has a cascade interrupt for the Espresso
+ * CPU interrupt controller.
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on hlwd-pic.c
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "latte-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/io.h>
+#include "latte-pic.h"
+
+static DEFINE_PER_CPU(struct lt_pic *, lt_pic_cpu);
+
+/*
+ * IRQ chip operations
+ * These handle both AHBALL and AHBLT IRQs, with AHBLT mapped above 32
+ */
+
+static void latte_pic_mask_and_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ }
+}
+
+static void latte_pic_mask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_unmask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ setbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ setbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static struct irq_chip latte_pic = {
+ .name = "latte-pic",
+ .irq_ack = latte_pic_ack,
+ .irq_mask_ack = latte_pic_mask_and_ack,
+ .irq_mask = latte_pic_mask,
+ .irq_unmask = latte_pic_unmask,
+};
+
+/*
+ * Domain ops
+ */
+
+static int latte_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("%s IRQ matches with this driver\n", node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int latte_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &latte_pic,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &latte_pic, h->host_data);
+ }
+ return 0;
+}
+
+static void latte_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops latte_pic_ops = {
+ .match = latte_pic_match,
+ .alloc = latte_pic_alloc,
+ .free = latte_pic_free,
+};
+
+/*
+ * Determinate if there are interrupts pending
+ * Checks AHBALL (0-32) and AHBLT (32-64)
+ */
+static unsigned int latte_pic_get_irq(struct irq_domain *h)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq_status, irq;
+
+ /* Check AHBALL first */
+ irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
+
+ if (irq_status == 0) {
+ /* Try AHBLT */
+ irq_status =
+ in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
+ irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
+ return irq_linear_revmap(h, irq);
+ }
+
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(h, irq);
+}
+
+/*
+ * Cascade IRQ handler
+ */
+static void latte_irq_cascade(struct irq_desc *desc)
+{
+ struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virq;
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
+ raw_spin_unlock(&desc->lock);
+
+ virq = latte_pic_get_irq(irq_domain);
+ if (virq)
+ generic_handle_irq(virq);
+ else
+ pr_err("spurious interrupt!\n");
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
+ if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
+ chip->irq_unmask(&desc->irq_data);
+ raw_spin_unlock(&desc->lock);
+}
+
+void __init latte_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,latte-pic");
+ struct irq_domain *host;
+ struct resource res;
+ int irq_cascade;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+ if (!of_get_property(np, "interrupts", NULL)) {
+ pr_err("could not find cascade interrupt!\n");
+ goto out;
+ }
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct lt_pic **pic = per_cpu_ptr(<_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct lt_pic) * cpu);
+
+ /* Mask and Ack CPU IRQs */
+ out_be32(&(*pic)->ahball_imr, 0);
+ out_be32(&(*pic)->ahball_icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np,
+ LATTE_AHBALL_NR_IRQS + LATTE_AHBLT_NR_IRQS,
+ &latte_pic_ops, NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ irq_cascade = irq_of_parse_and_map(np, 0);
+ irq_set_chained_handler_and_data(irq_cascade, latte_irq_cascade, host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.h b/arch/powerpc/platforms/wiiu/latte-pic.h
new file mode 100644
index 000000000000..7021d9497d35
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Latte" interrupt controller support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __LATTE_PIC_H
+#define __LATTE_PIC_H
+
+struct lt_pic {
+ __be32 ahball_icr; /* Triggered AHB IRQs (all) */
+ __be32 ahblt_icr; /* Triggered AHB IRQs (latte only) */
+ __be32 ahball_imr; /* Allowed AHB IRQs (all) */
+ __be32 ahblt_imr; /* Allowed AHB IRQs (latte only) */
+} __packed;
+
+#define LATTE_AHBALL_NR_IRQS 32
+#define LATTE_AHBLT_NR_IRQS 32
+
+void latte_pic_init(void);
+
+#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 08/12] powerpc: wiiu: latte interrupt controller support
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add support for the "Latte" interrupt controller in the Nintendo Wii U.
This controller is used for the entire SoC and is wired to a cascade
interrupt on the Espresso controller.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
v2->v3: Make latte_pic_get_irq static.
arch/powerpc/platforms/wiiu/Kconfig | 1 +
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 +++
4 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index 8dfd6ac8774d..40ecba8396a7 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,6 +3,7 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+ select IRQ_DOMAIN_HIERARCHY
help
Select WIIU if configuring for the Nintendo Wii U.
More information at: <https://linux-wiiu.org/>
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index aabf4b43e806..fa16c60261e6 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o
+obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.c b/arch/powerpc/platforms/wiiu/latte-pic.c
new file mode 100644
index 000000000000..7e3f49844166
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.c
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Latte" interrupt controller support.
+ * This is the controller for all the SoC devices, and has a cascade interrupt for the Espresso
+ * CPU interrupt controller.
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on hlwd-pic.c
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "latte-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/io.h>
+#include "latte-pic.h"
+
+static DEFINE_PER_CPU(struct lt_pic *, lt_pic_cpu);
+
+/*
+ * IRQ chip operations
+ * These handle both AHBALL and AHBLT IRQs, with AHBLT mapped above 32
+ */
+
+static void latte_pic_mask_and_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ }
+}
+
+static void latte_pic_mask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_unmask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ setbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ setbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static struct irq_chip latte_pic = {
+ .name = "latte-pic",
+ .irq_ack = latte_pic_ack,
+ .irq_mask_ack = latte_pic_mask_and_ack,
+ .irq_mask = latte_pic_mask,
+ .irq_unmask = latte_pic_unmask,
+};
+
+/*
+ * Domain ops
+ */
+
+static int latte_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("%s IRQ matches with this driver\n", node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int latte_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &latte_pic,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &latte_pic, h->host_data);
+ }
+ return 0;
+}
+
+static void latte_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops latte_pic_ops = {
+ .match = latte_pic_match,
+ .alloc = latte_pic_alloc,
+ .free = latte_pic_free,
+};
+
+/*
+ * Determinate if there are interrupts pending
+ * Checks AHBALL (0-32) and AHBLT (32-64)
+ */
+static unsigned int latte_pic_get_irq(struct irq_domain *h)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq_status, irq;
+
+ /* Check AHBALL first */
+ irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
+
+ if (irq_status == 0) {
+ /* Try AHBLT */
+ irq_status =
+ in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
+ irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
+ return irq_linear_revmap(h, irq);
+ }
+
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(h, irq);
+}
+
+/*
+ * Cascade IRQ handler
+ */
+static void latte_irq_cascade(struct irq_desc *desc)
+{
+ struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virq;
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
+ raw_spin_unlock(&desc->lock);
+
+ virq = latte_pic_get_irq(irq_domain);
+ if (virq)
+ generic_handle_irq(virq);
+ else
+ pr_err("spurious interrupt!\n");
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
+ if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
+ chip->irq_unmask(&desc->irq_data);
+ raw_spin_unlock(&desc->lock);
+}
+
+void __init latte_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,latte-pic");
+ struct irq_domain *host;
+ struct resource res;
+ int irq_cascade;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+ if (!of_get_property(np, "interrupts", NULL)) {
+ pr_err("could not find cascade interrupt!\n");
+ goto out;
+ }
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct lt_pic **pic = per_cpu_ptr(<_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct lt_pic) * cpu);
+
+ /* Mask and Ack CPU IRQs */
+ out_be32(&(*pic)->ahball_imr, 0);
+ out_be32(&(*pic)->ahball_icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np,
+ LATTE_AHBALL_NR_IRQS + LATTE_AHBLT_NR_IRQS,
+ &latte_pic_ops, NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ irq_cascade = irq_of_parse_and_map(np, 0);
+ irq_set_chained_handler_and_data(irq_cascade, latte_irq_cascade, host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.h b/arch/powerpc/platforms/wiiu/latte-pic.h
new file mode 100644
index 000000000000..7021d9497d35
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Latte" interrupt controller support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __LATTE_PIC_H
+#define __LATTE_PIC_H
+
+struct lt_pic {
+ __be32 ahball_icr; /* Triggered AHB IRQs (all) */
+ __be32 ahblt_icr; /* Triggered AHB IRQs (latte only) */
+ __be32 ahball_imr; /* Allowed AHB IRQs (all) */
+ __be32 ahblt_imr; /* Allowed AHB IRQs (latte only) */
+} __packed;
+
+#define LATTE_AHBALL_NR_IRQS 32
+#define LATTE_AHBLT_NR_IRQS 32
+
+void latte_pic_init(void);
+
+#endif
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 09/12] powerpc: espresso processor support
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Adds a cputable entry for the "Espresso" processor found on the Nintendo
Wii U, which has a PVR unrelated to other 750CL-like chips.
Only this revision has been seen in the wild.
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/kernel/cputable.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index a5dbfccd2047..3a4e84d1f674 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -736,6 +736,22 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform = "ppc750",
.oprofile_cpu_type = "ppc/750",
},
+ { /* "Espresso" (750CL-like) */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x70010201,
+ .cpu_name = "Espresso",
+ .cpu_features = CPU_FTRS_750CL,
+ .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
+ .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_750,
+ .machine_check = machine_check_generic,
+ .platform = "ppc750",
+ .oprofile_cpu_type = "ppc/750",
+ },
{ /* 745/755 */
.pvr_mask = 0xfffff000,
.pvr_value = 0x00083000,
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 09/12] powerpc: espresso processor support
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Adds a cputable entry for the "Espresso" processor found on the Nintendo
Wii U, which has a PVR unrelated to other 750CL-like chips.
Only this revision has been seen in the wild.
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/kernel/cputable.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index a5dbfccd2047..3a4e84d1f674 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -736,6 +736,22 @@ static struct cpu_spec __initdata cpu_specs[] = {
.platform = "ppc750",
.oprofile_cpu_type = "ppc/750",
},
+ { /* "Espresso" (750CL-like) */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x70010201,
+ .cpu_name = "Espresso",
+ .cpu_features = CPU_FTRS_750CL,
+ .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
+ .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_750,
+ .machine_check = machine_check_generic,
+ .platform = "ppc750",
+ .oprofile_cpu_type = "ppc/750",
+ },
{ /* 745/755 */
.pvr_mask = 0xfffff000,
.pvr_value = 0x00083000,
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 10/12] powerpc: wiiu: platform support
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add platform support for the Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v2->v3: Use of_platform_default_populate instead of a custom match table.
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/setup.c | 60 ++++++++++++++++++++++++++++
2 files changed, 61 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index fa16c60261e6..abcb7a1beebf 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
+obj-$(CONFIG_WIIU) += setup.o espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/setup.c b/arch/powerpc/platforms/wiiu/setup.c
new file mode 100644
index 000000000000..e3f07ce65cad
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/setup.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U board-specific support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+#define DRV_MODULE_NAME "wiiu"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "espresso-pic.h"
+#include "latte-pic.h"
+#include "udbg_latteipc.h"
+
+static int __init wiiu_probe(void)
+{
+ if (!of_machine_is_compatible("nintendo,wiiu"))
+ return 0;
+
+ latteipc_udbg_init();
+
+ return 1;
+}
+
+static void __noreturn wiiu_halt(void)
+{
+ for (;;)
+ cpu_relax();
+}
+
+static void __init wiiu_init_irq(void)
+{
+ espresso_pic_init();
+ latte_pic_init();
+}
+
+static int __init wiiu_device_probe(void)
+{
+ if (!machine_is(wiiu))
+ return 0;
+
+ of_platform_default_populate(NULL, NULL, NULL);
+ return 0;
+}
+device_initcall(wiiu_device_probe);
+
+define_machine(wiiu) {
+ .name = "wiiu",
+ .probe = wiiu_probe,
+ .halt = wiiu_halt,
+ .progress = udbg_progress,
+ .calibrate_decr = generic_calibrate_decr,
+ .init_IRQ = wiiu_init_irq,
+ .get_irq = espresso_pic_get_irq,
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 10/12] powerpc: wiiu: platform support
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add platform support for the Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v2->v3: Use of_platform_default_populate instead of a custom match table.
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/setup.c | 60 ++++++++++++++++++++++++++++
2 files changed, 61 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index fa16c60261e6..abcb7a1beebf 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
+obj-$(CONFIG_WIIU) += setup.o espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/setup.c b/arch/powerpc/platforms/wiiu/setup.c
new file mode 100644
index 000000000000..e3f07ce65cad
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/setup.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U board-specific support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+#define DRV_MODULE_NAME "wiiu"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "espresso-pic.h"
+#include "latte-pic.h"
+#include "udbg_latteipc.h"
+
+static int __init wiiu_probe(void)
+{
+ if (!of_machine_is_compatible("nintendo,wiiu"))
+ return 0;
+
+ latteipc_udbg_init();
+
+ return 1;
+}
+
+static void __noreturn wiiu_halt(void)
+{
+ for (;;)
+ cpu_relax();
+}
+
+static void __init wiiu_init_irq(void)
+{
+ espresso_pic_init();
+ latte_pic_init();
+}
+
+static int __init wiiu_device_probe(void)
+{
+ if (!machine_is(wiiu))
+ return 0;
+
+ of_platform_default_populate(NULL, NULL, NULL);
+ return 0;
+}
+device_initcall(wiiu_device_probe);
+
+define_machine(wiiu) {
+ .name = "wiiu",
+ .probe = wiiu_probe,
+ .halt = wiiu_halt,
+ .progress = udbg_progress,
+ .calibrate_decr = generic_calibrate_decr,
+ .init_IRQ = wiiu_init_irq,
+ .get_irq = espresso_pic_get_irq,
+};
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 11/12] powerpc: wiiu: don't enforce flat memory
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
pgtable_32.c:mapin_ram loops over each valid memory range, which means
non-contiguous memory just works.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/mm/init_32.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 693a3a7a9463..6cdb561c05c5 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -124,10 +124,10 @@ void __init MMU_init(void)
* lowmem_end_addr is initialized below.
*/
if (memblock.memory.cnt > 1) {
-#ifndef CONFIG_WII
+#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
memblock_enforce_memory_limit(memblock.memory.regions[0].size);
pr_warn("Only using first contiguous memory region\n");
-#else
+#elif defined(CONFIG_WII)
wii_memory_fixups();
#endif
}
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
pgtable_32.c:mapin_ram loops over each valid memory range, which means
non-contiguous memory just works.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/mm/init_32.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 693a3a7a9463..6cdb561c05c5 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -124,10 +124,10 @@ void __init MMU_init(void)
* lowmem_end_addr is initialized below.
*/
if (memblock.memory.cnt > 1) {
-#ifndef CONFIG_WII
+#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
memblock_enforce_memory_limit(memblock.memory.regions[0].size);
pr_warn("Only using first contiguous memory region\n");
-#else
+#elif defined(CONFIG_WII)
wii_memory_fixups();
#endif
}
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 12/12] powerpc: wiiu: add minimal default config
2022-06-28 13:31 ` Ash Logan
@ 2022-06-28 13:31 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Adds a bare-minimum config to get a kernel compiled. Will need some more
interesting options once a storage device to boot from is added.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/configs/wiiu_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/powerpc/configs/wiiu_defconfig
diff --git a/arch/powerpc/configs/wiiu_defconfig b/arch/powerpc/configs/wiiu_defconfig
new file mode 100644
index 000000000000..a761ebcdd9f2
--- /dev/null
+++ b/arch/powerpc/configs/wiiu_defconfig
@@ -0,0 +1,7 @@
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_WIIU=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_HIGHMEM=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_PPC_EARLY_DEBUG=y
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v3 12/12] powerpc: wiiu: add minimal default config
@ 2022-06-28 13:31 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-06-28 13:31 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Adds a bare-minimum config to get a kernel compiled. Will need some more
interesting options once a storage device to boot from is added.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/configs/wiiu_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/powerpc/configs/wiiu_defconfig
diff --git a/arch/powerpc/configs/wiiu_defconfig b/arch/powerpc/configs/wiiu_defconfig
new file mode 100644
index 000000000000..a761ebcdd9f2
--- /dev/null
+++ b/arch/powerpc/configs/wiiu_defconfig
@@ -0,0 +1,7 @@
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_WIIU=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_HIGHMEM=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_PPC_EARLY_DEBUG=y
--
2.36.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* Re: [PATCH v3 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-06-28 13:31 ` Ash Logan
@ 2022-06-29 9:52 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 170+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-29 9:52 UTC (permalink / raw)
To: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy,
robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
On 28/06/2022 15:31, Ash Logan wrote:
> Adds schema for the various Wii U devicetree nodes used.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> .../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
> 8 files changed, 300 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> new file mode 100644
> index 000000000000..5824b07928f5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> @@ -0,0 +1,28 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U bindings
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U video game console binding.
> +
> +properties:
> + $nodename:
> + const: "/"
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U video game console
> + items:
> + - const: nintendo,wiiu
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> new file mode 100644
> index 000000000000..878a81595f5f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U "Espresso" interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
> +
> +properties:
> + compatible:
> + oneOf:
No need for oneOf, just const.
> + - description: Nintendo Wii U "Espresso" interrupt controller
No need for description.
> + items:
> + - const: nintendo,espresso-pic
> + '#interrupt-cells':
> + # Interrupt numbers 0-32 in one cell
> + const: 1
Blank line between each property.
> + interrupt-controller: true
> + reg:
> + items:
> + - description: Core registers
Just maxItems:1. Description is not helpful.
Missing required properties.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + espresso_pic: pic@c000078 {
Generic node name, so "interrupt-controller"
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
compatible and reg by convention go first in list of properties. This
applies everywhere, also to your DTS.
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> new file mode 100644
> index 000000000000..e54d49015f36
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte "GPU7" graphics processor
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
> + Nintendo Wii U.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte "GPU7" graphics processor
> + items:
> + - const: nintendo,latte-gpu7
> + reg:
> + items:
> + - description: GpuF0MMReg registers
> + interrupts:
> + items:
> + - description: Main interrupt, connected via Espresso PIC
Same comments as your interrupt controller patch. I guess these comments
apply everywhere here.
Missing required properties.
> +
> +# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
> +additionalProperties: true
No, it must be false. It's okay to extend the binding later.
> +
> +examples:
> + - |
> + gpu7@c200000 {
Generic node name, so "gpu".
> + compatible = "nintendo,latte-gpu7";
Wrong indentation. Use four spaces for DTS example.
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> new file mode 100644
> index 000000000000..7b9de4effcb0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte AHCI controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte AHCI controller
> + items:
> + - const: nintendo,latte-ahci
> + reg:
> + items:
> + - description: |
> + HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
> + registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
Here description can stay, so no need for maxItems.
> + interrupts:
> + items:
> + - description: Main HBA interrupt
> + - description: Vendor debugging interrupt
> +
This should also reference ahci schema (I think it is ready).
> +additionalProperties: false
> +
> +examples:
> + - |
> + sata: ahci@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x408>;
Fix indentation.
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38>, <28>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> new file mode 100644
> index 000000000000..ed0b4c28ce48
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte DSP
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U digital signal processor, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte DSP
> + items:
> + - const: nintendo,latte-dsp
> + reg:
> + items:
> + - description: DSP registers
> +
> +# Once more is known about this device more properties will likely be added
> +additionalProperties: true
Again, no. All other comments also apply.
> +
> +examples:
> + - |
> + latte_dsp: dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> new file mode 100644
> index 000000000000..a2df71fb9964
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte interrupt controller
> + items:
> + - const: nintendo,latte-pic
> + '#interrupt-cells':
> + # Interrupt numbers 0-64 in one cell.
> + const: 1
> + interrupt-controller: true
> + reg:
> + items:
> + - description: Core registers
> + interrupts:
> + items:
> + - description: Cascade interrupt for Espresso PIC
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + latte_pic: pic@d800440 {
interrupt-controller.
All other comments apply.
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,latte-pic";
> + reg = <0x0d800440 0x30>;
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> new file mode 100644
> index 000000000000..4b9b0820edc1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte SD Host controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte SDHCI
> + items:
> + - const: nintendo,latte-sdhci
> + - const: sdhci
> + reg:
> + items:
> + - description: Core registers
> + interrupts:
> + items:
> + - description: SDHCI interrupt
You need to reference mmc-controller bindings in allOf.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sdcard_0: sdhci@d070000 {
Node name: mmc
The bindings look poor, several easy to fix mistakes. I suggest to open
example-schema.yaml and start from there.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2022-06-29 9:52 ` Krzysztof Kozlowski
0 siblings, 0 replies; 170+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-29 9:52 UTC (permalink / raw)
To: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy,
robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
On 28/06/2022 15:31, Ash Logan wrote:
> Adds schema for the various Wii U devicetree nodes used.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> .../bindings/powerpc/nintendo/wiiu.yaml | 28 +++++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++++++++++
> 8 files changed, 300 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> new file mode 100644
> index 000000000000..5824b07928f5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> @@ -0,0 +1,28 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U bindings
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U video game console binding.
> +
> +properties:
> + $nodename:
> + const: "/"
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U video game console
> + items:
> + - const: nintendo,wiiu
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> new file mode 100644
> index 000000000000..878a81595f5f
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U "Espresso" interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
> +
> +properties:
> + compatible:
> + oneOf:
No need for oneOf, just const.
> + - description: Nintendo Wii U "Espresso" interrupt controller
No need for description.
> + items:
> + - const: nintendo,espresso-pic
> + '#interrupt-cells':
> + # Interrupt numbers 0-32 in one cell
> + const: 1
Blank line between each property.
> + interrupt-controller: true
> + reg:
> + items:
> + - description: Core registers
Just maxItems:1. Description is not helpful.
Missing required properties.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + espresso_pic: pic@c000078 {
Generic node name, so "interrupt-controller"
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
compatible and reg by convention go first in list of properties. This
applies everywhere, also to your DTS.
> + };
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> new file mode 100644
> index 000000000000..e54d49015f36
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> @@ -0,0 +1,41 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte "GPU7" graphics processor
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
> + Nintendo Wii U.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte "GPU7" graphics processor
> + items:
> + - const: nintendo,latte-gpu7
> + reg:
> + items:
> + - description: GpuF0MMReg registers
> + interrupts:
> + items:
> + - description: Main interrupt, connected via Espresso PIC
Same comments as your interrupt controller patch. I guess these comments
apply everywhere here.
Missing required properties.
> +
> +# This will likely get bound to the Radeon driver one day, which will neccesitate extra properties
> +additionalProperties: true
No, it must be false. It's okay to extend the binding later.
> +
> +examples:
> + - |
> + gpu7@c200000 {
Generic node name, so "gpu".
> + compatible = "nintendo,latte-gpu7";
Wrong indentation. Use four spaces for DTS example.
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> new file mode 100644
> index 000000000000..7b9de4effcb0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> @@ -0,0 +1,43 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte AHCI controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte AHCI controller
> + items:
> + - const: nintendo,latte-ahci
> + reg:
> + items:
> + - description: |
> + HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
> + registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
Here description can stay, so no need for maxItems.
> + interrupts:
> + items:
> + - description: Main HBA interrupt
> + - description: Vendor debugging interrupt
> +
This should also reference ahci schema (I think it is ready).
> +additionalProperties: false
> +
> +examples:
> + - |
> + sata: ahci@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x408>;
Fix indentation.
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38>, <28>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> new file mode 100644
> index 000000000000..ed0b4c28ce48
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte DSP
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U digital signal processor, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte DSP
> + items:
> + - const: nintendo,latte-dsp
> + reg:
> + items:
> + - description: DSP registers
> +
> +# Once more is known about this device more properties will likely be added
> +additionalProperties: true
Again, no. All other comments also apply.
> +
> +examples:
> + - |
> + latte_dsp: dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> new file mode 100644
> index 000000000000..a2df71fb9964
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte interrupt controller
> + items:
> + - const: nintendo,latte-pic
> + '#interrupt-cells':
> + # Interrupt numbers 0-64 in one cell.
> + const: 1
> + interrupt-controller: true
> + reg:
> + items:
> + - description: Core registers
> + interrupts:
> + items:
> + - description: Cascade interrupt for Espresso PIC
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + latte_pic: pic@d800440 {
interrupt-controller.
All other comments apply.
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,latte-pic";
> + reg = <0x0d800440 0x30>;
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> new file mode 100644
> index 000000000000..4b9b0820edc1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> @@ -0,0 +1,40 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte SD Host controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
> +
> +properties:
> + compatible:
> + oneOf:
> + - description: Nintendo Wii U Latte SDHCI
> + items:
> + - const: nintendo,latte-sdhci
> + - const: sdhci
> + reg:
> + items:
> + - description: Core registers
> + interrupts:
> + items:
> + - description: SDHCI interrupt
You need to reference mmc-controller bindings in allOf.
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sdcard_0: sdhci@d070000 {
Node name: mmc
The bindings look poor, several easy to fix mistakes. I suggest to open
example-schema.yaml and start from there.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 02/12] powerpc: wiiu: device tree
2022-06-28 13:31 ` Ash Logan
@ 2022-06-29 9:58 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 170+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-29 9:58 UTC (permalink / raw)
To: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy,
robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
On 28/06/2022 15:31, Ash Logan wrote:
> Add a device tree source file for the Nintendo Wii U video game console.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
> Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
> Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> ---
> v1->v2: Style and formatting changes suggested by Rob Herring.
> License remains GPL-2.0 as the other powerpc dtses are the same, happy
> to change if there is a different preferred default.
> v2->v3: Re-added address-cells accidentally removed in v2.
> Marked latte as a simple-bus, since it is.
Thank you for your patch. There is something to discuss/improve.
>
> arch/powerpc/boot/dts/wiiu.dts | 326 +++++++++++++++++++++++++++++++++
> 1 file changed, 326 insertions(+)
> create mode 100644 arch/powerpc/boot/dts/wiiu.dts
>
> diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
> new file mode 100644
> index 000000000000..44a5a1469095
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/wiiu.dts
> @@ -0,0 +1,326 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Nintendo Wii U Device Tree Source
> + *
> + * Copyright (C) 2022 The linux-wiiu Team
> + */
> +
> +/dts-v1/;
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "nintendo,wiiu";
It's not compatible, but user-visible string, e.g. "Nintendo Wii U"
> + compatible = "nintendo,wiiu";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen {
> + bootargs = "root=/dev/sda1 rootwait";
This does not belong to shared DTS. No bootargs.
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
> + 0x08000000 0x00300000 /* MEM0 - 3MiB */
> + 0x10000000 0x80000000>; /* MEM2 - 2GiB */
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* TODO: Add SMP */
> + PowerPC,espresso@0 {
Node name should be generic, so "cpu". Unless something needs the
specific node name?
> + device_type = "cpu";
> + reg = <0>;
> + clock-frequency = <1243125000>; /* 1.243125GHz */
> + bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
> + timebase-frequency = <62156250>; /* 1/4 of the bus clock */
> + i-cache-size = <32768>; /* 32K icache */
> + i-cache-line-size = <32>;
> + i-cache-block-size = <32>;
> + i-cache-sets = <128>;
> + d-cache-size = <32768>; /* 32K dcache */
> + d-cache-line-size = <32>;
> + d-cache-block-size = <32>;
> + d-cache-sets = <128>;
> + next-level-cache = <&L2_0>;
> + L2_0:l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + cache-unified;
> + cache-size = <0x80000>; /* 512KB L2 */
> + cache-line-size = <64>;
> + cache-block-size = <32>;
> + cache-sets = <2048>;
> + };
> + };
> + };
> +
> + latte {
Generic node names.
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "nintendo,latte", "simple-bus";
> + ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
> + 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
> + 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
> +
> + latte_gpu: gpu@c200000 {
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +
> + espresso_pic: pic@c000078 {
interrupt-controller
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + };
> +
> + latte_dsp: dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +
> + ehci_0: usb@d040000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d040000 0x100>;
> + interrupts = <4>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_0_0: usb@d050000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d050000 0x100>;
> + interrupts = <5>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ohci_0_1: usb@d060000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d060000 0x100>;
> + interrupts = <6>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ehci_1: usb@d120000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d120000 0x100>;
> + interrupts = <16>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_1_0: usb@d130000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d130000 0x100>;
> + interrupts = <35>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ehci_2: usb@d140000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d140000 0x100>;
> + interrupts = <36>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_2_0: usb@d150000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d150000 0x100>;
> + interrupts = <37>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + sdcard_0: sdhci@d070000 {
mmc
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + wifi_0: sdhci@d080000 {
mmc
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d080000 0x200>;
> + interrupts = <8>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + legacy_ipc: ipc@d800000 {
> + compatible = "nintendo,latte-ipc", "nintendo,hollywood-ipc";
> + reg = <0x0d800000 0x10>;
> + interrupts = <30 31>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + latte_otp: otp@d8001ec {
> + compatible = "nintendo,latte-otp";
> + reg = <0x0d8001ec 0x8>;
> + };
> +
> + sata: ahci@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x808>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38 28>;
> + };
> +
> + latte_pic: pic@d800440 {
interrupt-controller
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,latte-pic";
> + reg = <0x0d800440 0x30>;
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +
> + gpio: gpio@d8000c0 {
> + #gpio-cells = <2>;
> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
> +
> + reg = <0x0d8000c0 0x40>;
> + gpio-controller;
> + /* TODO: There are actually 31 AHBALL GPIOs */
> + ngpios = <24>;
> +
> + gpio-line-names =
> + "POWER", "DWIFI", "FAN", "DC_DC",
> + "", "Esp10WorkAround", "", "",
> + "PADPD", "", "EEP_CS", "EEP_CLK",
> + "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
> + "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
> + "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <10>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + gpio2: gpio@d800520 {
> + #gpio-cells = <2>;
> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
> +
> + reg = <0x0d800520 0x40>;
> + gpio-controller;
> + ngpios = <7>;
> +
> + gpio-line-names =
> + "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
> + "AVE_INT", "", "AVE_RESET";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <10>;
> + interrupt-parent = <&latte_pic>;
> + };
> + };
> +
> + spi_gpio: spi-gpio {
> + compatible = "spi-gpio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
> + gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
> + gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
> + gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
> + num-chipselects = <1>;
> +
> + eeprom@0 {
> + compatible = "atmel,at93c66";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + spi-cs-high;
> + /* TODO: wiiubrew says this is 16-bit, but I only get the correct
> + * values in 8-bit...
> + */
> + data-size = <8>;
> + read-only;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
> + rng_seed: rng@12 { reg = <0x012 8>; };
> + ppc_pvr: pvr@20 { reg = <0x020 4>; };
> + seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
> + seeprom_ver: sver@2a { reg = <0x02A 2>; };
> + otp_ver: over@2c { reg = <0x02C 2>; };
> + otp_rev: orev@2e { reg = <0x02E 2>; };
> + otp_ver_str: over-str@30 { reg = <0x030 8>; };
> +
> + bc_crc: bc-crc@38 { reg = <0x038 4>; };
> + bc_sz: bc-sz@3c { reg = <0x03C 2>; };
> + bc_ver: bc-ver@3e { reg = <0x03E 2>; };
> + bc_boardtype: boardtype@42 { reg = <0x042 2>; };
> + bc_boardrev: boardrev@44 { reg = <0x044 2>; };
> + bc_bootsource: bootsource@46 { reg = <0x046 2>; };
> + bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
> + bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
> + bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
> + bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
> + bc_video1080p: video1080p@50 { reg = <0x050 2>; };
> + bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
> + bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
> + bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
> + bc_satadevice: satadevice@58 { reg = <0x058 2>; };
> + bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
> + bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
> +
> + drive_key: drvkey@80 { reg = <0x080 16>; };
> + factory_key: fackey@90 { reg = <0x090 16>; };
> + shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
> + usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
> + drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
> + usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
> + shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
> +
> + sysprod_version: sp_ver@140 { reg = <0x140 4>; };
> + sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
> + sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
> + sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
> + sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
> + sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
> + sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
> + sysprod_code: sp_code@158 { reg = <0x158 8>; };
> + sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
> + sysprod_model: sp_model@170 { reg = <0x170 16>; };
> +
> + prod_year: pyear@188 { reg = <0x188 2>; };
> + prod_date: pdate@18a { reg = <0x18A 2>; };
> + prod_time: ptime@18c { reg = <0x18C 2>; };
> +
> + boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
> + };
> + };
> +
> + /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
> + gpio-keys-polled {
gpio-keys
> + poll-interval = <50>;
> + compatible = "gpio-keys-polled";
> +
> + power {
key-power
(will be enforced by schema)
> + label = "Power Button";
> + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
> + linux,code = <KEY_POWER>;
> + };
> + };
> +};
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 02/12] powerpc: wiiu: device tree
@ 2022-06-29 9:58 ` Krzysztof Kozlowski
0 siblings, 0 replies; 170+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-29 9:58 UTC (permalink / raw)
To: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy,
robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
On 28/06/2022 15:31, Ash Logan wrote:
> Add a device tree source file for the Nintendo Wii U video game console.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
> Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
> Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> ---
> v1->v2: Style and formatting changes suggested by Rob Herring.
> License remains GPL-2.0 as the other powerpc dtses are the same, happy
> to change if there is a different preferred default.
> v2->v3: Re-added address-cells accidentally removed in v2.
> Marked latte as a simple-bus, since it is.
Thank you for your patch. There is something to discuss/improve.
>
> arch/powerpc/boot/dts/wiiu.dts | 326 +++++++++++++++++++++++++++++++++
> 1 file changed, 326 insertions(+)
> create mode 100644 arch/powerpc/boot/dts/wiiu.dts
>
> diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
> new file mode 100644
> index 000000000000..44a5a1469095
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/wiiu.dts
> @@ -0,0 +1,326 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Nintendo Wii U Device Tree Source
> + *
> + * Copyright (C) 2022 The linux-wiiu Team
> + */
> +
> +/dts-v1/;
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "nintendo,wiiu";
It's not compatible, but user-visible string, e.g. "Nintendo Wii U"
> + compatible = "nintendo,wiiu";
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + chosen {
> + bootargs = "root=/dev/sda1 rootwait";
This does not belong to shared DTS. No bootargs.
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
> + 0x08000000 0x00300000 /* MEM0 - 3MiB */
> + 0x10000000 0x80000000>; /* MEM2 - 2GiB */
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + /* TODO: Add SMP */
> + PowerPC,espresso@0 {
Node name should be generic, so "cpu". Unless something needs the
specific node name?
> + device_type = "cpu";
> + reg = <0>;
> + clock-frequency = <1243125000>; /* 1.243125GHz */
> + bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
> + timebase-frequency = <62156250>; /* 1/4 of the bus clock */
> + i-cache-size = <32768>; /* 32K icache */
> + i-cache-line-size = <32>;
> + i-cache-block-size = <32>;
> + i-cache-sets = <128>;
> + d-cache-size = <32768>; /* 32K dcache */
> + d-cache-line-size = <32>;
> + d-cache-block-size = <32>;
> + d-cache-sets = <128>;
> + next-level-cache = <&L2_0>;
> + L2_0:l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + cache-unified;
> + cache-size = <0x80000>; /* 512KB L2 */
> + cache-line-size = <64>;
> + cache-block-size = <32>;
> + cache-sets = <2048>;
> + };
> + };
> + };
> +
> + latte {
Generic node names.
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "nintendo,latte", "simple-bus";
> + ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
> + 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
> + 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
> +
> + latte_gpu: gpu@c200000 {
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +
> + espresso_pic: pic@c000078 {
interrupt-controller
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + };
> +
> + latte_dsp: dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +
> + ehci_0: usb@d040000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d040000 0x100>;
> + interrupts = <4>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_0_0: usb@d050000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d050000 0x100>;
> + interrupts = <5>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ohci_0_1: usb@d060000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d060000 0x100>;
> + interrupts = <6>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ehci_1: usb@d120000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d120000 0x100>;
> + interrupts = <16>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_1_0: usb@d130000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d130000 0x100>;
> + interrupts = <35>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + ehci_2: usb@d140000 {
> + compatible = "nintendo,latte-usb-ehci", "usb-ehci";
> + reg = <0x0d140000 0x100>;
> + interrupts = <36>;
> + interrupt-parent = <&latte_pic>;
> + big-endian-regs;
> + };
> +
> + ohci_2_0: usb@d150000 {
> + compatible = "nintendo,latte-usb-ohci";
> + reg = <0x0d150000 0x100>;
> + interrupts = <37>;
> + interrupt-parent = <&latte_pic>;
> +
> + big-endian-regs;
> + };
> +
> + sdcard_0: sdhci@d070000 {
mmc
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + wifi_0: sdhci@d080000 {
mmc
> + compatible = "nintendo,latte-sdhci","sdhci";
> + reg = <0x0d080000 0x200>;
> + interrupts = <8>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + legacy_ipc: ipc@d800000 {
> + compatible = "nintendo,latte-ipc", "nintendo,hollywood-ipc";
> + reg = <0x0d800000 0x10>;
> + interrupts = <30 31>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + latte_otp: otp@d8001ec {
> + compatible = "nintendo,latte-otp";
> + reg = <0x0d8001ec 0x8>;
> + };
> +
> + sata: ahci@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x808>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38 28>;
> + };
> +
> + latte_pic: pic@d800440 {
interrupt-controller
> + #interrupt-cells = <1>;
> + interrupt-controller;
> +
> + compatible = "nintendo,latte-pic";
> + reg = <0x0d800440 0x30>;
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +
> + gpio: gpio@d8000c0 {
> + #gpio-cells = <2>;
> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
> +
> + reg = <0x0d8000c0 0x40>;
> + gpio-controller;
> + /* TODO: There are actually 31 AHBALL GPIOs */
> + ngpios = <24>;
> +
> + gpio-line-names =
> + "POWER", "DWIFI", "FAN", "DC_DC",
> + "", "Esp10WorkAround", "", "",
> + "PADPD", "", "EEP_CS", "EEP_CLK",
> + "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
> + "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
> + "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <10>;
> + interrupt-parent = <&latte_pic>;
> + };
> +
> + gpio2: gpio@d800520 {
> + #gpio-cells = <2>;
> + compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
> +
> + reg = <0x0d800520 0x40>;
> + gpio-controller;
> + ngpios = <7>;
> +
> + gpio-line-names =
> + "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
> + "AVE_INT", "", "AVE_RESET";
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <10>;
> + interrupt-parent = <&latte_pic>;
> + };
> + };
> +
> + spi_gpio: spi-gpio {
> + compatible = "spi-gpio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
> + gpio-sck = <&gpio 11 GPIO_ACTIVE_HIGH>;
> + gpio-mosi = <&gpio 12 GPIO_ACTIVE_HIGH>;
> + gpio-miso = <&gpio 13 GPIO_ACTIVE_HIGH>;
> + num-chipselects = <1>;
> +
> + eeprom@0 {
> + compatible = "atmel,at93c66";
> + reg = <0>;
> + spi-max-frequency = <1000000>;
> + spi-cs-high;
> + /* TODO: wiiubrew says this is 16-bit, but I only get the correct
> + * values in 8-bit...
> + */
> + data-size = <8>;
> + read-only;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
> + rng_seed: rng@12 { reg = <0x012 8>; };
> + ppc_pvr: pvr@20 { reg = <0x020 4>; };
> + seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
> + seeprom_ver: sver@2a { reg = <0x02A 2>; };
> + otp_ver: over@2c { reg = <0x02C 2>; };
> + otp_rev: orev@2e { reg = <0x02E 2>; };
> + otp_ver_str: over-str@30 { reg = <0x030 8>; };
> +
> + bc_crc: bc-crc@38 { reg = <0x038 4>; };
> + bc_sz: bc-sz@3c { reg = <0x03C 2>; };
> + bc_ver: bc-ver@3e { reg = <0x03E 2>; };
> + bc_boardtype: boardtype@42 { reg = <0x042 2>; };
> + bc_boardrev: boardrev@44 { reg = <0x044 2>; };
> + bc_bootsource: bootsource@46 { reg = <0x046 2>; };
> + bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
> + bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
> + bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
> + bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
> + bc_video1080p: video1080p@50 { reg = <0x050 2>; };
> + bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
> + bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
> + bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
> + bc_satadevice: satadevice@58 { reg = <0x058 2>; };
> + bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
> + bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
> +
> + drive_key: drvkey@80 { reg = <0x080 16>; };
> + factory_key: fackey@90 { reg = <0x090 16>; };
> + shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
> + usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
> + drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
> + usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
> + shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
> +
> + sysprod_version: sp_ver@140 { reg = <0x140 4>; };
> + sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
> + sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
> + sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
> + sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
> + sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
> + sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
> + sysprod_code: sp_code@158 { reg = <0x158 8>; };
> + sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
> + sysprod_model: sp_model@170 { reg = <0x170 16>; };
> +
> + prod_year: pyear@188 { reg = <0x188 2>; };
> + prod_date: pdate@18a { reg = <0x18A 2>; };
> + prod_time: ptime@18c { reg = <0x18C 2>; };
> +
> + boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
> + };
> + };
> +
> + /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
> + gpio-keys-polled {
gpio-keys
> + poll-interval = <50>;
> + compatible = "gpio-keys-polled";
> +
> + power {
key-power
(will be enforced by schema)
> + label = "Power Button";
> + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
> + linux,code = <KEY_POWER>;
> + };
> + };
> +};
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 02/12] powerpc: wiiu: device tree
2022-06-29 9:58 ` Krzysztof Kozlowski
@ 2022-06-29 16:13 ` Segher Boessenkool
-1 siblings, 0 replies; 170+ messages in thread
From: Segher Boessenkool @ 2022-06-29 16:13 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, robh+dt,
paulus, Ash Logan, krzysztof.kozlowski+dt, j.ne, linuxppc-dev,
joel
On Wed, Jun 29, 2022 at 11:58:18AM +0200, Krzysztof Kozlowski wrote:
> On 28/06/2022 15:31, Ash Logan wrote:
> > + model = "nintendo,wiiu";
>
> It's not compatible, but user-visible string, e.g. "Nintendo Wii U"
The "model" property in OF is documented as:
---
“model” S
Standard property name to define a manufacturer’s model number.
prop-encoded-array:
Text string, encoded with encode-string.
A manufacturer-dependent string that generally specifies the model name
and number (including revision level) for this device. The format of the
text string is arbitrary, although in conventional usage the string
begins with the name of the device’s manufacturer as with the “name”
property.
Although there is no standard interpretation for the value of the
“model” property, a specific device driver might use it to learn, for
instance, the revision level of its particular device.
See also: property, model.
Used as: " XYZCO,1416-02" encode-string " model" property
---
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + /* TODO: Add SMP */
> > + PowerPC,espresso@0 {
>
> Node name should be generic, so "cpu". Unless something needs the
> specific node name?
This is how most other PowerPC firmwares do it. The PowerPC processor
binding is older than the generic naming practice, so CPU nodes have
device_type "cpu" instead. This is a required property btw, with that
value. (There is no requirement on the names of the CPU nodes).
There is no added value in generic naming for CPU nodes anyway, since
you just find them as the children of the "/cpus" node :-)
Segher
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 02/12] powerpc: wiiu: device tree
@ 2022-06-29 16:13 ` Segher Boessenkool
0 siblings, 0 replies; 170+ messages in thread
From: Segher Boessenkool @ 2022-06-29 16:13 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy,
robh+dt, benh, devicetree, linkmauve, linux-kernel, rw-r-r-0644,
joel, linuxppc-dev, j.ne
On Wed, Jun 29, 2022 at 11:58:18AM +0200, Krzysztof Kozlowski wrote:
> On 28/06/2022 15:31, Ash Logan wrote:
> > + model = "nintendo,wiiu";
>
> It's not compatible, but user-visible string, e.g. "Nintendo Wii U"
The "model" property in OF is documented as:
---
“model” S
Standard property name to define a manufacturer’s model number.
prop-encoded-array:
Text string, encoded with encode-string.
A manufacturer-dependent string that generally specifies the model name
and number (including revision level) for this device. The format of the
text string is arbitrary, although in conventional usage the string
begins with the name of the device’s manufacturer as with the “name”
property.
Although there is no standard interpretation for the value of the
“model” property, a specific device driver might use it to learn, for
instance, the revision level of its particular device.
See also: property, model.
Used as: " XYZCO,1416-02" encode-string " model" property
---
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + /* TODO: Add SMP */
> > + PowerPC,espresso@0 {
>
> Node name should be generic, so "cpu". Unless something needs the
> specific node name?
This is how most other PowerPC firmwares do it. The PowerPC processor
binding is older than the generic naming practice, so CPU nodes have
device_type "cpu" instead. This is a required property btw, with that
value. (There is no requirement on the names of the CPU nodes).
There is no added value in generic naming for CPU nodes anyway, since
you just find them as the children of the "/cpus" node :-)
Segher
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 02/12] powerpc: wiiu: device tree
2022-06-29 16:13 ` Segher Boessenkool
@ 2022-06-29 18:13 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 170+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-29 18:13 UTC (permalink / raw)
To: Segher Boessenkool
Cc: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy,
robh+dt, benh, devicetree, linkmauve, linux-kernel, rw-r-r-0644,
joel, linuxppc-dev, j.ne
On 29/06/2022 18:13, Segher Boessenkool wrote:
> On Wed, Jun 29, 2022 at 11:58:18AM +0200, Krzysztof Kozlowski wrote:
>> On 28/06/2022 15:31, Ash Logan wrote:
>>> + model = "nintendo,wiiu";
>>
>> It's not compatible, but user-visible string, e.g. "Nintendo Wii U"
>
> The "model" property in OF is documented as:
>
> ---
> “model” S
> Standard property name to define a manufacturer’s model number.
>
> prop-encoded-array:
> Text string, encoded with encode-string.
> A manufacturer-dependent string that generally specifies the model name
> and number (including revision level) for this device. The format of the
> text string is arbitrary, although in conventional usage the string
> begins with the name of the device’s manufacturer as with the “name”
> property.
> Although there is no standard interpretation for the value of the
> “model” property, a specific device driver might use it to learn, for
> instance, the revision level of its particular device.
>
> See also: property, model.
>
> Used as: " XYZCO,1416-02" encode-string " model" property
Hm, surprising to duplicate the compatible, but OK.
> ---
>
>>> + cpus {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + /* TODO: Add SMP */
>>> + PowerPC,espresso@0 {
>>
>> Node name should be generic, so "cpu". Unless something needs the
>> specific node name?
>
> This is how most other PowerPC firmwares do it. The PowerPC processor
> binding is older than the generic naming practice, so CPU nodes have
> device_type "cpu" instead.
ePAPR 1.0 from 2008 explicitly asks for generic node names. So 4 years
before Nintento Wii U. Maybe earlier ePAPR-s were also asking for this,
no clue, don't have them.
> This is a required property btw, with that
> value. (There is no requirement on the names of the CPU nodes).
That's fine, I am not talking about property.
> There is no added value in generic naming for CPU nodes anyway, since
> you just find them as the children of the "/cpus" node :-)
There is because you might have there caches. It also makes code easier
to read.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 02/12] powerpc: wiiu: device tree
@ 2022-06-29 18:13 ` Krzysztof Kozlowski
0 siblings, 0 replies; 170+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-29 18:13 UTC (permalink / raw)
To: Segher Boessenkool
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, robh+dt,
paulus, Ash Logan, krzysztof.kozlowski+dt, j.ne, linuxppc-dev,
joel
On 29/06/2022 18:13, Segher Boessenkool wrote:
> On Wed, Jun 29, 2022 at 11:58:18AM +0200, Krzysztof Kozlowski wrote:
>> On 28/06/2022 15:31, Ash Logan wrote:
>>> + model = "nintendo,wiiu";
>>
>> It's not compatible, but user-visible string, e.g. "Nintendo Wii U"
>
> The "model" property in OF is documented as:
>
> ---
> “model” S
> Standard property name to define a manufacturer’s model number.
>
> prop-encoded-array:
> Text string, encoded with encode-string.
> A manufacturer-dependent string that generally specifies the model name
> and number (including revision level) for this device. The format of the
> text string is arbitrary, although in conventional usage the string
> begins with the name of the device’s manufacturer as with the “name”
> property.
> Although there is no standard interpretation for the value of the
> “model” property, a specific device driver might use it to learn, for
> instance, the revision level of its particular device.
>
> See also: property, model.
>
> Used as: " XYZCO,1416-02" encode-string " model" property
Hm, surprising to duplicate the compatible, but OK.
> ---
>
>>> + cpus {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + /* TODO: Add SMP */
>>> + PowerPC,espresso@0 {
>>
>> Node name should be generic, so "cpu". Unless something needs the
>> specific node name?
>
> This is how most other PowerPC firmwares do it. The PowerPC processor
> binding is older than the generic naming practice, so CPU nodes have
> device_type "cpu" instead.
ePAPR 1.0 from 2008 explicitly asks for generic node names. So 4 years
before Nintento Wii U. Maybe earlier ePAPR-s were also asking for this,
no clue, don't have them.
> This is a required property btw, with that
> value. (There is no requirement on the names of the CPU nodes).
That's fine, I am not talking about property.
> There is no added value in generic naming for CPU nodes anyway, since
> you just find them as the children of the "/cpus" node :-)
There is because you might have there caches. It also makes code easier
to read.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 02/12] powerpc: wiiu: device tree
2022-06-29 18:13 ` Krzysztof Kozlowski
@ 2022-06-29 20:28 ` Segher Boessenkool
-1 siblings, 0 replies; 170+ messages in thread
From: Segher Boessenkool @ 2022-06-29 20:28 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, robh+dt,
paulus, Ash Logan, krzysztof.kozlowski+dt, j.ne, linuxppc-dev,
joel
On Wed, Jun 29, 2022 at 08:13:13PM +0200, Krzysztof Kozlowski wrote:
> On 29/06/2022 18:13, Segher Boessenkool wrote:
> > On Wed, Jun 29, 2022 at 11:58:18AM +0200, Krzysztof Kozlowski wrote:
> >>> + /* TODO: Add SMP */
> >>> + PowerPC,espresso@0 {
> >>
> >> Node name should be generic, so "cpu". Unless something needs the
> >> specific node name?
> >
> > This is how most other PowerPC firmwares do it. The PowerPC processor
> > binding is older than the generic naming practice, so CPU nodes have
> > device_type "cpu" instead.
>
> ePAPR 1.0 from 2008 explicitly asks for generic node names. So 4 years
> before Nintento Wii U. Maybe earlier ePAPR-s were also asking for this,
> no clue, don't have them.
The majority of PowerPC 750 systems long predate that. Many *current*
systems implement the PowerPC Processor Binding, too (not the epapr
thing, which is incompatible with the older standards!)
> > There is no added value in generic naming for CPU nodes anyway, since
> > you just find them as the children of the "/cpus" node :-)
>
> There is because you might have there caches. It also makes code easier
> to read.
In the processor binding the cache nodes were subnodes of cpu nodes or
other cache nodes. But in some server products you can have cache that
is enabled while the corresponding core is disabled; and also, not all
cache belongs to only one higher level anyway. This was modelled pretty
uncleanly, yup (cleaner would have been to have a /caches node as well
as /cpus, for example).
But on 750 you just have "l2-cache" subnodes, and all nodes in /cpus are
CPUs :-)
Segher
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 02/12] powerpc: wiiu: device tree
@ 2022-06-29 20:28 ` Segher Boessenkool
0 siblings, 0 replies; 170+ messages in thread
From: Segher Boessenkool @ 2022-06-29 20:28 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy,
robh+dt, benh, devicetree, linkmauve, linux-kernel, rw-r-r-0644,
joel, linuxppc-dev, j.ne
On Wed, Jun 29, 2022 at 08:13:13PM +0200, Krzysztof Kozlowski wrote:
> On 29/06/2022 18:13, Segher Boessenkool wrote:
> > On Wed, Jun 29, 2022 at 11:58:18AM +0200, Krzysztof Kozlowski wrote:
> >>> + /* TODO: Add SMP */
> >>> + PowerPC,espresso@0 {
> >>
> >> Node name should be generic, so "cpu". Unless something needs the
> >> specific node name?
> >
> > This is how most other PowerPC firmwares do it. The PowerPC processor
> > binding is older than the generic naming practice, so CPU nodes have
> > device_type "cpu" instead.
>
> ePAPR 1.0 from 2008 explicitly asks for generic node names. So 4 years
> before Nintento Wii U. Maybe earlier ePAPR-s were also asking for this,
> no clue, don't have them.
The majority of PowerPC 750 systems long predate that. Many *current*
systems implement the PowerPC Processor Binding, too (not the epapr
thing, which is incompatible with the older standards!)
> > There is no added value in generic naming for CPU nodes anyway, since
> > you just find them as the children of the "/cpus" node :-)
>
> There is because you might have there caches. It also makes code easier
> to read.
In the processor binding the cache nodes were subnodes of cpu nodes or
other cache nodes. But in some server products you can have cache that
is enabled while the corresponding core is disabled; and also, not all
cache belongs to only one higher level anyway. This was modelled pretty
uncleanly, yup (cleaner would have been to have a /caches node as well
as /cpus, for example).
But on 750 you just have "l2-cache" subnodes, and all nodes in /cpus are
CPUs :-)
Segher
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-06-09 22:24 ` Pali Rohár
@ 2022-08-08 18:40 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-08-08 18:40 UTC (permalink / raw)
To: linux-mm
Cc: Ash Logan, paulus, mpe, christophe.leroy, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne
On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> > + linux-mm
> >
> > Do you know what are requirements for kernel to support non-contiguous
> > memory support and what is needed to enable it for 32-bit powerpc?
>
> Any hints?
PING?
> > Currently powerpc arch code does not support "memblock.memory.cnt > 1"
> > except for WII which seems like a hack... See below.
> >
> > On Friday 20 May 2022 20:44:04 Ash Logan wrote:
> > > On 20/5/22 18:04, Pali Rohár wrote:
> > > > On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> > > >> On 14/5/22 08:43, Pali Rohár wrote:
> > > >>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> > > >>>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> > > >>>> non-contiguous memory just works.
> > > >>>
> > > >>> Hello! Does it mean that non-contiguous memory works for any 32-bit
> > > >>> powerpc platform, and not only for wiiu? If yes, should not be
> > > >>> non-contiguous memory support enabled for all 32-bit ppc boards then?
> > > >>
> > > >> Hi! Sorry for my delayed response. As best I can tell, it does indeed
> > > >> Just Work, but I have only been able to test on wiiu which is missing a
> > > >> lot of features other boards have (like PCI) - so it's possible there's
> > > >> still an assumption elsewhere in the kernel that I haven't hit.
> > > >>
> > > >> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
> > > >> out there where it's even possible to have non-contiguous memory.
> > > >
> > > > What is the reason that those two boards are the **only**? Is there some
> > > > specific requirement from bootloader or hardware to "enable"
> > > > non-contiguous memory support?
> > >
> > > Not that I know of, I was just saying that I was only aware of those two
> > > boards where the memory map isn't contiguous, and that is the only place
> > > where it has been tested. Evidently you know of another board!
> > >
> > > > I'm interested in enabling non-contiguous memory support for P2020-based
> > > > board as it has gaps in its 32-bit memory layout and which could be used
> > > > for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
> > >
> > > If it's like the Wii or Wii U (some memory at 0, a gap for MMIO or
> > > whatever, then more memory at a higher address) then you should try a
> > > patch along these lines, because barring the unknowns I mentioned before
> > > it should work. At least as far as I'm aware ;)
> > >
> > > >>>> Signed-off-by: Ash Logan <ash@heyquark.com>
> > > >>>> ---
> > > >>>> arch/powerpc/mm/init_32.c | 4 ++--
> > > >>>> 1 file changed, 2 insertions(+), 2 deletions(-)
> > > >>>>
> > > >>>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> > > >>>> index 3d690be48e84..59a84629d9a0 100644
> > > >>>> --- a/arch/powerpc/mm/init_32.c
> > > >>>> +++ b/arch/powerpc/mm/init_32.c
> > > >>>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> > > >>>> * lowmem_end_addr is initialized below.
> > > >>>> */
> > > >>>> if (memblock.memory.cnt > 1) {
> > > >>>> -#ifndef CONFIG_WII
> > > >>>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> > > >>>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> > > >>>> pr_warn("Only using first contiguous memory region\n");
> > > >>>> -#else
> > > >>>> +#elif defined(CONFIG_WII)
> > > >>>> wii_memory_fixups();
> > > >>>> #endif
> > > >>>> }
> > > >>>> --
> > > >>>> 2.35.1
> > > >>>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-08-08 18:40 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-08-08 18:40 UTC (permalink / raw)
To: linux-mm; +Cc: linux-kernel, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> > + linux-mm
> >
> > Do you know what are requirements for kernel to support non-contiguous
> > memory support and what is needed to enable it for 32-bit powerpc?
>
> Any hints?
PING?
> > Currently powerpc arch code does not support "memblock.memory.cnt > 1"
> > except for WII which seems like a hack... See below.
> >
> > On Friday 20 May 2022 20:44:04 Ash Logan wrote:
> > > On 20/5/22 18:04, Pali Rohár wrote:
> > > > On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> > > >> On 14/5/22 08:43, Pali Rohár wrote:
> > > >>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> > > >>>> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> > > >>>> non-contiguous memory just works.
> > > >>>
> > > >>> Hello! Does it mean that non-contiguous memory works for any 32-bit
> > > >>> powerpc platform, and not only for wiiu? If yes, should not be
> > > >>> non-contiguous memory support enabled for all 32-bit ppc boards then?
> > > >>
> > > >> Hi! Sorry for my delayed response. As best I can tell, it does indeed
> > > >> Just Work, but I have only been able to test on wiiu which is missing a
> > > >> lot of features other boards have (like PCI) - so it's possible there's
> > > >> still an assumption elsewhere in the kernel that I haven't hit.
> > > >>
> > > >> As best I can tell, the Wii and Wii U are the only 32-bit powerpc boards
> > > >> out there where it's even possible to have non-contiguous memory.
> > > >
> > > > What is the reason that those two boards are the **only**? Is there some
> > > > specific requirement from bootloader or hardware to "enable"
> > > > non-contiguous memory support?
> > >
> > > Not that I know of, I was just saying that I was only aware of those two
> > > boards where the memory map isn't contiguous, and that is the only place
> > > where it has been tested. Evidently you know of another board!
> > >
> > > > I'm interested in enabling non-contiguous memory support for P2020-based
> > > > board as it has gaps in its 32-bit memory layout and which could be used
> > > > for RAM mapping when 4GB DDR3 module is plugged in (default is 2GB).
> > >
> > > If it's like the Wii or Wii U (some memory at 0, a gap for MMIO or
> > > whatever, then more memory at a higher address) then you should try a
> > > patch along these lines, because barring the unknowns I mentioned before
> > > it should work. At least as far as I'm aware ;)
> > >
> > > >>>> Signed-off-by: Ash Logan <ash@heyquark.com>
> > > >>>> ---
> > > >>>> arch/powerpc/mm/init_32.c | 4 ++--
> > > >>>> 1 file changed, 2 insertions(+), 2 deletions(-)
> > > >>>>
> > > >>>> diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
> > > >>>> index 3d690be48e84..59a84629d9a0 100644
> > > >>>> --- a/arch/powerpc/mm/init_32.c
> > > >>>> +++ b/arch/powerpc/mm/init_32.c
> > > >>>> @@ -125,10 +125,10 @@ void __init MMU_init(void)
> > > >>>> * lowmem_end_addr is initialized below.
> > > >>>> */
> > > >>>> if (memblock.memory.cnt > 1) {
> > > >>>> -#ifndef CONFIG_WII
> > > >>>> +#if !defined(CONFIG_WII) && !defined(CONFIG_WIIU)
> > > >>>> memblock_enforce_memory_limit(memblock.memory.regions[0].size);
> > > >>>> pr_warn("Only using first contiguous memory region\n");
> > > >>>> -#else
> > > >>>> +#elif defined(CONFIG_WII)
> > > >>>> wii_memory_fixups();
> > > >>>> #endif
> > > >>>> }
> > > >>>> --
> > > >>>> 2.35.1
> > > >>>>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-08-08 18:40 ` Pali Rohár
@ 2022-09-08 15:25 ` Christophe Leroy
-1 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-08 15:25 UTC (permalink / raw)
To: Pali Rohár
Cc: Ash Logan, paulus, mpe, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne, linux-mm
Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
>>> + linux-mm
>>>
>>> Do you know what are requirements for kernel to support non-contiguous
>>> memory support and what is needed to enable it for 32-bit powerpc?
>>
>> Any hints?
>
> PING?
>
The tree following patches landed in powerpc/next branch, so they should
soon be visible in linux-next too:
fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
gigantic pages")
b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-09-08 15:25 ` Christophe Leroy
0 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-08 15:25 UTC (permalink / raw)
To: Pali Rohár
Cc: linux-kernel, linux-mm, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
>>> + linux-mm
>>>
>>> Do you know what are requirements for kernel to support non-contiguous
>>> memory support and what is needed to enable it for 32-bit powerpc?
>>
>> Any hints?
>
> PING?
>
The tree following patches landed in powerpc/next branch, so they should
soon be visible in linux-next too:
fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
gigantic pages")
b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
2022-09-08 15:25 ` Christophe Leroy
@ 2022-09-08 15:35 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-09-08 15:35 UTC (permalink / raw)
To: Christophe Leroy
Cc: Ash Logan, paulus, mpe, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne, linux-mm
On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> > On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> >> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> >>> + linux-mm
> >>>
> >>> Do you know what are requirements for kernel to support non-contiguous
> >>> memory support and what is needed to enable it for 32-bit powerpc?
> >>
> >> Any hints?
> >
> > PING?
> >
>
> The tree following patches landed in powerpc/next branch, so they should
> soon be visible in linux-next too:
>
> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
> gigantic pages")
> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
Ou, nice! I will try to test it if it allows me to access more than 2GB
of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH 11/12] powerpc: wiiu: don't enforce flat memory
@ 2022-09-08 15:35 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-09-08 15:35 UTC (permalink / raw)
To: Christophe Leroy
Cc: linux-kernel, linux-mm, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> > On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> >> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> >>> + linux-mm
> >>>
> >>> Do you know what are requirements for kernel to support non-contiguous
> >>> memory support and what is needed to enable it for 32-bit powerpc?
> >>
> >> Any hints?
> >
> > PING?
> >
>
> The tree following patches landed in powerpc/next branch, so they should
> soon be visible in linux-next too:
>
> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
> gigantic pages")
> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
Ou, nice! I will try to test it if it allows me to access more than 2GB
of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Fragmented physical memory on powerpc/32
2022-09-08 15:35 ` Pali Rohár
@ 2022-09-08 20:17 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-09-08 20:17 UTC (permalink / raw)
To: Christophe Leroy
Cc: Ash Logan, paulus, mpe, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne, linux-mm
On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
> > Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> > > On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> > >> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> > >>> + linux-mm
> > >>>
> > >>> Do you know what are requirements for kernel to support non-contiguous
> > >>> memory support and what is needed to enable it for 32-bit powerpc?
> > >>
> > >> Any hints?
> > >
> > > PING?
> > >
> >
> > The tree following patches landed in powerpc/next branch, so they should
> > soon be visible in linux-next too:
> >
> > fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
> > gigantic pages")
> > b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
> > 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
>
> Ou, nice! I will try to test it if it allows me to access more than 2GB
> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
Hello! Ok, I have tried it from powerpc/next branch, but seems it does
not work. I'm getting just early kernel crash.
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] (thread shift is 0)
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0xbe500000
[ 0.000000] dcache_bsize = 0x20
[ 0.000000] icache_bsize = 0x20
[ 0.000000] cpu_features = 0x0000000010010108
[ 0.000000] possible = 0x0000000010010108
[ 0.000000] always = 0x0000000010010108
[ 0.000000] cpu_user_features = 0x84e08000 0x08000000
[ 0.000000] mmu_features = 0x00020010
[ 0.000000] -----------------------------------------------------
mpc85xx_rdb_setup_arch()
[ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
[ 0.000000] MPC85xx RDB board from Freescale Semiconductor
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 182 locations
[ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
[ 0.000000] Memory hole size: 1042MB
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
[ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
[ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
[ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
[ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
[ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
[ 0.000000] Faulting instruction address: 0xc01c8348
[ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
[ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
[ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
[ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
[ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
[ 0.000000] DEAR: 0007df58 ESR: 00000000
[ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
[ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
[ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
[ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
[ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
[ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
[ 0.000000] Call Trace:
[ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
[ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
[ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
[ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
[ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
[ 0.000000] Instruction dump:
[ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
[ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
[ 0.000000] ---[ end trace 0000000000000000 ]---
[ 0.000000]
[ 0.000000] Kernel panic - not syncing: Fatal exception
[ 0.000000] Rebooting in 1 seconds..
[ 0.000000] System Halted, OK to turn off power
4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
address range. And on ranges:
0x0000_0000 - 0x7fff_ffff
0xc020_0000 - 0xeeff_ffff
0xf000_0000 - 0xff6f_ffff
there is no peripheral device, they are free for DRAM. Between these
physical ranges are mapped peripheral devices (PCIe and NOR).
Any idea if I'm doing something wrong or there can be a bug in memory code?
Quite suspicious is that "Initmem setup node 0" prints one range where
are also peripherals, not just DRAM. Crash is on address 0xc01c8348
which belongs to PCIe.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Fragmented physical memory on powerpc/32
@ 2022-09-08 20:17 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-09-08 20:17 UTC (permalink / raw)
To: Christophe Leroy
Cc: linux-kernel, linux-mm, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
> > Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> > > On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> > >> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> > >>> + linux-mm
> > >>>
> > >>> Do you know what are requirements for kernel to support non-contiguous
> > >>> memory support and what is needed to enable it for 32-bit powerpc?
> > >>
> > >> Any hints?
> > >
> > > PING?
> > >
> >
> > The tree following patches landed in powerpc/next branch, so they should
> > soon be visible in linux-next too:
> >
> > fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
> > gigantic pages")
> > b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
> > 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
>
> Ou, nice! I will try to test it if it allows me to access more than 2GB
> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
Hello! Ok, I have tried it from powerpc/next branch, but seems it does
not work. I'm getting just early kernel crash.
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] (thread shift is 0)
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0xbe500000
[ 0.000000] dcache_bsize = 0x20
[ 0.000000] icache_bsize = 0x20
[ 0.000000] cpu_features = 0x0000000010010108
[ 0.000000] possible = 0x0000000010010108
[ 0.000000] always = 0x0000000010010108
[ 0.000000] cpu_user_features = 0x84e08000 0x08000000
[ 0.000000] mmu_features = 0x00020010
[ 0.000000] -----------------------------------------------------
mpc85xx_rdb_setup_arch()
[ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
[ 0.000000] MPC85xx RDB board from Freescale Semiconductor
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 182 locations
[ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
[ 0.000000] Memory hole size: 1042MB
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
[ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
[ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
[ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
[ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
[ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
[ 0.000000] Faulting instruction address: 0xc01c8348
[ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
[ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
[ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
[ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
[ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
[ 0.000000] DEAR: 0007df58 ESR: 00000000
[ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
[ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
[ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
[ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
[ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
[ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
[ 0.000000] Call Trace:
[ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
[ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
[ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
[ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
[ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
[ 0.000000] Instruction dump:
[ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
[ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
[ 0.000000] ---[ end trace 0000000000000000 ]---
[ 0.000000]
[ 0.000000] Kernel panic - not syncing: Fatal exception
[ 0.000000] Rebooting in 1 seconds..
[ 0.000000] System Halted, OK to turn off power
4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
address range. And on ranges:
0x0000_0000 - 0x7fff_ffff
0xc020_0000 - 0xeeff_ffff
0xf000_0000 - 0xff6f_ffff
there is no peripheral device, they are free for DRAM. Between these
physical ranges are mapped peripheral devices (PCIe and NOR).
Any idea if I'm doing something wrong or there can be a bug in memory code?
Quite suspicious is that "Initmem setup node 0" prints one range where
are also peripherals, not just DRAM. Crash is on address 0xc01c8348
which belongs to PCIe.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-08 20:17 ` Pali Rohár
@ 2022-09-10 9:39 ` Christophe Leroy
-1 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-10 9:39 UTC (permalink / raw)
To: Pali Rohár, Mike Rapoport
Cc: Ash Logan, paulus, mpe, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne, linux-mm
+ Adding Mike who might help if the problem is around memblock.
Le 08/09/2022 à 22:17, Pali Rohár a écrit :
> On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
>> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
>>> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
>>>> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
>>>>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
>>>>>> + linux-mm
>>>>>>
>>>>>> Do you know what are requirements for kernel to support non-contiguous
>>>>>> memory support and what is needed to enable it for 32-bit powerpc?
>>>>>
>>>>> Any hints?
>>>>
>>>> PING?
>>>>
>>>
>>> The tree following patches landed in powerpc/next branch, so they should
>>> soon be visible in linux-next too:
>>>
>>> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
>>> gigantic pages")
>>> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
>>> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
>>
>> Ou, nice! I will try to test it if it allows me to access more than 2GB
>> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
>
> Hello! Ok, I have tried it from powerpc/next branch, but seems it does
> not work. I'm getting just early kernel crash.
>
> [ 0.000000] CPU maps initialized for 1 thread per core
> [ 0.000000] (thread shift is 0)
> [ 0.000000] -----------------------------------------------------
> [ 0.000000] phys_mem_size = 0xbe500000
> [ 0.000000] dcache_bsize = 0x20
> [ 0.000000] icache_bsize = 0x20
> [ 0.000000] cpu_features = 0x0000000010010108
> [ 0.000000] possible = 0x0000000010010108
> [ 0.000000] always = 0x0000000010010108
> [ 0.000000] cpu_user_features = 0x84e08000 0x08000000
> [ 0.000000] mmu_features = 0x00020010
> [ 0.000000] -----------------------------------------------------
> mpc85xx_rdb_setup_arch()
> [ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
> [ 0.000000] MPC85xx RDB board from Freescale Semiconductor
> [ 0.000000] barrier-nospec: using isync; sync as speculation barrier
> [ 0.000000] barrier-nospec: patched 182 locations
> [ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
> [ 0.000000] Memory hole size: 1042MB
> [ 0.000000] Zone ranges:
> [ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
> [ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
> [ 0.000000] Movable zone start for each node
> [ 0.000000] Early memory node ranges
> [ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
> [ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
> [ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
> [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
> [ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
> [ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
> [ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
> [ 0.000000] pcpu-alloc: [0] 0 [0] 1
> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
> [ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
> [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
> [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
> [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
> [ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
> [ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
> [ 0.000000] Faulting instruction address: 0xc01c8348
> [ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
> [ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
> [ 0.000000] Modules linked in:
> [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
> [ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
> [ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
> [ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
> [ 0.000000] DEAR: 0007df58 ESR: 00000000
> [ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
> [ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
> [ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
> [ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
> [ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
> [ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
> [ 0.000000] Call Trace:
> [ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
> [ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
> [ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
> [ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
> [ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
> [ 0.000000] Instruction dump:
> [ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
> [ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
> [ 0.000000] ---[ end trace 0000000000000000 ]---
> [ 0.000000]
> [ 0.000000] Kernel panic - not syncing: Fatal exception
> [ 0.000000] Rebooting in 1 seconds..
> [ 0.000000] System Halted, OK to turn off power
>
> 4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
> address range. And on ranges:
> 0x0000_0000 - 0x7fff_ffff
> 0xc020_0000 - 0xeeff_ffff
> 0xf000_0000 - 0xff6f_ffff
> there is no peripheral device, they are free for DRAM. Between these
> physical ranges are mapped peripheral devices (PCIe and NOR).
>
> Any idea if I'm doing something wrong or there can be a bug in memory code?
>
> Quite suspicious is that "Initmem setup node 0" prints one range where
> are also peripherals, not just DRAM. Crash is on address 0xc01c8348
> which belongs to PCIe.
>
Yes I also find that "Initmem setup node 0" suspicious.
However the crash address 0xc01c8348 is valid kernel address. That's a
virtual address, not a physical address, so that's not PCIe. That's
kernel linear mapping, so that's likely physical address 0x001c8348
offseted by PAGE_OFFSET which is 0xc0000000.
Do you have a way to reproduce this problem under QEMU ?
Thanks
Christophe
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-10 9:39 ` Christophe Leroy
0 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-10 9:39 UTC (permalink / raw)
To: Pali Rohár, Mike Rapoport
Cc: linux-kernel, linux-mm, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
+ Adding Mike who might help if the problem is around memblock.
Le 08/09/2022 à 22:17, Pali Rohár a écrit :
> On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
>> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
>>> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
>>>> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
>>>>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
>>>>>> + linux-mm
>>>>>>
>>>>>> Do you know what are requirements for kernel to support non-contiguous
>>>>>> memory support and what is needed to enable it for 32-bit powerpc?
>>>>>
>>>>> Any hints?
>>>>
>>>> PING?
>>>>
>>>
>>> The tree following patches landed in powerpc/next branch, so they should
>>> soon be visible in linux-next too:
>>>
>>> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
>>> gigantic pages")
>>> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
>>> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
>>
>> Ou, nice! I will try to test it if it allows me to access more than 2GB
>> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
>
> Hello! Ok, I have tried it from powerpc/next branch, but seems it does
> not work. I'm getting just early kernel crash.
>
> [ 0.000000] CPU maps initialized for 1 thread per core
> [ 0.000000] (thread shift is 0)
> [ 0.000000] -----------------------------------------------------
> [ 0.000000] phys_mem_size = 0xbe500000
> [ 0.000000] dcache_bsize = 0x20
> [ 0.000000] icache_bsize = 0x20
> [ 0.000000] cpu_features = 0x0000000010010108
> [ 0.000000] possible = 0x0000000010010108
> [ 0.000000] always = 0x0000000010010108
> [ 0.000000] cpu_user_features = 0x84e08000 0x08000000
> [ 0.000000] mmu_features = 0x00020010
> [ 0.000000] -----------------------------------------------------
> mpc85xx_rdb_setup_arch()
> [ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
> [ 0.000000] MPC85xx RDB board from Freescale Semiconductor
> [ 0.000000] barrier-nospec: using isync; sync as speculation barrier
> [ 0.000000] barrier-nospec: patched 182 locations
> [ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
> [ 0.000000] Memory hole size: 1042MB
> [ 0.000000] Zone ranges:
> [ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
> [ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
> [ 0.000000] Movable zone start for each node
> [ 0.000000] Early memory node ranges
> [ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
> [ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
> [ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
> [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
> [ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
> [ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
> [ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
> [ 0.000000] pcpu-alloc: [0] 0 [0] 1
> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
> [ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
> [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
> [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
> [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
> [ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
> [ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
> [ 0.000000] Faulting instruction address: 0xc01c8348
> [ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
> [ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
> [ 0.000000] Modules linked in:
> [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
> [ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
> [ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
> [ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
> [ 0.000000] DEAR: 0007df58 ESR: 00000000
> [ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
> [ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
> [ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
> [ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
> [ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
> [ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
> [ 0.000000] Call Trace:
> [ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
> [ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
> [ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
> [ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
> [ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
> [ 0.000000] Instruction dump:
> [ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
> [ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
> [ 0.000000] ---[ end trace 0000000000000000 ]---
> [ 0.000000]
> [ 0.000000] Kernel panic - not syncing: Fatal exception
> [ 0.000000] Rebooting in 1 seconds..
> [ 0.000000] System Halted, OK to turn off power
>
> 4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
> address range. And on ranges:
> 0x0000_0000 - 0x7fff_ffff
> 0xc020_0000 - 0xeeff_ffff
> 0xf000_0000 - 0xff6f_ffff
> there is no peripheral device, they are free for DRAM. Between these
> physical ranges are mapped peripheral devices (PCIe and NOR).
>
> Any idea if I'm doing something wrong or there can be a bug in memory code?
>
> Quite suspicious is that "Initmem setup node 0" prints one range where
> are also peripherals, not just DRAM. Crash is on address 0xc01c8348
> which belongs to PCIe.
>
Yes I also find that "Initmem setup node 0" suspicious.
However the crash address 0xc01c8348 is valid kernel address. That's a
virtual address, not a physical address, so that's not PCIe. That's
kernel linear mapping, so that's likely physical address 0x001c8348
offseted by PAGE_OFFSET which is 0xc0000000.
Do you have a way to reproduce this problem under QEMU ?
Thanks
Christophe
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-10 9:39 ` Christophe Leroy
@ 2022-09-12 14:48 ` Mike Rapoport
-1 siblings, 0 replies; 170+ messages in thread
From: Mike Rapoport @ 2022-09-12 14:48 UTC (permalink / raw)
To: Christophe Leroy
Cc: Pali Rohár, Ash Logan, paulus, mpe, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne, linux-mm
On Sat, Sep 10, 2022 at 09:39:20AM +0000, Christophe Leroy wrote:
> + Adding Mike who might help if the problem is around memblock.
>
> Le 08/09/2022 à 22:17, Pali Rohár a écrit :
> > On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
> >> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
> >>> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> >>>> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> >>>>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> >>>>>> + linux-mm
> >>>>>>
> >>>>>> Do you know what are requirements for kernel to support non-contiguous
> >>>>>> memory support and what is needed to enable it for 32-bit powerpc?
> >>>>>
> >>>>> Any hints?
> >>>>
> >>>> PING?
> >>>>
> >>>
> >>> The tree following patches landed in powerpc/next branch, so they should
> >>> soon be visible in linux-next too:
> >>>
> >>> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
> >>> gigantic pages")
> >>> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
> >>> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
> >>
> >> Ou, nice! I will try to test it if it allows me to access more than 2GB
> >> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
> >
> > Hello! Ok, I have tried it from powerpc/next branch, but seems it does
> > not work. I'm getting just early kernel crash.
> >
> > [ 0.000000] CPU maps initialized for 1 thread per core
> > [ 0.000000] (thread shift is 0)
> > [ 0.000000] -----------------------------------------------------
> > [ 0.000000] phys_mem_size = 0xbe500000
> > [ 0.000000] dcache_bsize = 0x20
> > [ 0.000000] icache_bsize = 0x20
> > [ 0.000000] cpu_features = 0x0000000010010108
> > [ 0.000000] possible = 0x0000000010010108
> > [ 0.000000] always = 0x0000000010010108
> > [ 0.000000] cpu_user_features = 0x84e08000 0x08000000
> > [ 0.000000] mmu_features = 0x00020010
> > [ 0.000000] -----------------------------------------------------
> > mpc85xx_rdb_setup_arch()
> > [ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
> > [ 0.000000] MPC85xx RDB board from Freescale Semiconductor
> > [ 0.000000] barrier-nospec: using isync; sync as speculation barrier
> > [ 0.000000] barrier-nospec: patched 182 locations
> > [ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
> > [ 0.000000] Memory hole size: 1042MB
> > [ 0.000000] Zone ranges:
> > [ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
> > [ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
> > [ 0.000000] Movable zone start for each node
> > [ 0.000000] Early memory node ranges
> > [ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
> > [ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
> > [ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
> > [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
> > [ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
> > [ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
> > [ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
> > [ 0.000000] pcpu-alloc: [0] 0 [0] 1
> > [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
> > [ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
> > [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
> > [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
> > [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
> > [ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
> > [ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
> > [ 0.000000] Faulting instruction address: 0xc01c8348
> > [ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
> > [ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
> > [ 0.000000] Modules linked in:
> > [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
> > [ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
> > [ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
> > [ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
> > [ 0.000000] DEAR: 0007df58 ESR: 00000000
> > [ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
> > [ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
> > [ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
> > [ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
> > [ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
> > [ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
> > [ 0.000000] Call Trace:
> > [ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
> > [ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
> > [ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
> > [ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
> > [ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
> > [ 0.000000] Instruction dump:
> > [ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
> > [ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
> > [ 0.000000] ---[ end trace 0000000000000000 ]---
> > [ 0.000000]
> > [ 0.000000] Kernel panic - not syncing: Fatal exception
> > [ 0.000000] Rebooting in 1 seconds..
> > [ 0.000000] System Halted, OK to turn off power
> >
> > 4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
> > address range. And on ranges:
> > 0x0000_0000 - 0x7fff_ffff
> > 0xc020_0000 - 0xeeff_ffff
> > 0xf000_0000 - 0xff6f_ffff
> > there is no peripheral device, they are free for DRAM. Between these
> > physical ranges are mapped peripheral devices (PCIe and NOR).
> >
> > Any idea if I'm doing something wrong or there can be a bug in memory code?
> >
> > Quite suspicious is that "Initmem setup node 0" prints one range where
> > are also peripherals, not just DRAM. Crash is on address 0xc01c8348
> > which belongs to PCIe.
> >
>
> Yes I also find that "Initmem setup node 0" suspicious.
>
> However the crash address 0xc01c8348 is valid kernel address. That's a
> virtual address, not a physical address, so that's not PCIe. That's
> kernel linear mapping, so that's likely physical address 0x001c8348
> offseted by PAGE_OFFSET which is 0xc0000000.
If I read the dump correctly, 0xc01c8348 is the PC of the instruction that
crashed and the access was to 0x0007df58 which seem to well inside
0x0000_0000 - 0x7fff_ffff range.
And the "Early memory node ranges" look consistent with the memory layout
above.
My guess would be that something went wrong in the linear map setup, but it
won't hurt running with "memblock=debug" added to the kernel command line
to see if there is anything suspicious there.
> Do you have a way to reproduce this problem under QEMU ?
>
> Thanks
> Christophe
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-12 14:48 ` Mike Rapoport
0 siblings, 0 replies; 170+ messages in thread
From: Mike Rapoport @ 2022-09-12 14:48 UTC (permalink / raw)
To: Christophe Leroy
Cc: linuxppc-dev, linux-kernel, linux-mm, robh+dt, paulus, Ash Logan,
Pali Rohár, j.ne
On Sat, Sep 10, 2022 at 09:39:20AM +0000, Christophe Leroy wrote:
> + Adding Mike who might help if the problem is around memblock.
>
> Le 08/09/2022 à 22:17, Pali Rohár a écrit :
> > On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
> >> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
> >>> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> >>>> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> >>>>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> >>>>>> + linux-mm
> >>>>>>
> >>>>>> Do you know what are requirements for kernel to support non-contiguous
> >>>>>> memory support and what is needed to enable it for 32-bit powerpc?
> >>>>>
> >>>>> Any hints?
> >>>>
> >>>> PING?
> >>>>
> >>>
> >>> The tree following patches landed in powerpc/next branch, so they should
> >>> soon be visible in linux-next too:
> >>>
> >>> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
> >>> gigantic pages")
> >>> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
> >>> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
> >>
> >> Ou, nice! I will try to test it if it allows me to access more than 2GB
> >> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
> >
> > Hello! Ok, I have tried it from powerpc/next branch, but seems it does
> > not work. I'm getting just early kernel crash.
> >
> > [ 0.000000] CPU maps initialized for 1 thread per core
> > [ 0.000000] (thread shift is 0)
> > [ 0.000000] -----------------------------------------------------
> > [ 0.000000] phys_mem_size = 0xbe500000
> > [ 0.000000] dcache_bsize = 0x20
> > [ 0.000000] icache_bsize = 0x20
> > [ 0.000000] cpu_features = 0x0000000010010108
> > [ 0.000000] possible = 0x0000000010010108
> > [ 0.000000] always = 0x0000000010010108
> > [ 0.000000] cpu_user_features = 0x84e08000 0x08000000
> > [ 0.000000] mmu_features = 0x00020010
> > [ 0.000000] -----------------------------------------------------
> > mpc85xx_rdb_setup_arch()
> > [ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
> > [ 0.000000] MPC85xx RDB board from Freescale Semiconductor
> > [ 0.000000] barrier-nospec: using isync; sync as speculation barrier
> > [ 0.000000] barrier-nospec: patched 182 locations
> > [ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
> > [ 0.000000] Memory hole size: 1042MB
> > [ 0.000000] Zone ranges:
> > [ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
> > [ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
> > [ 0.000000] Movable zone start for each node
> > [ 0.000000] Early memory node ranges
> > [ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
> > [ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
> > [ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
> > [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
> > [ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
> > [ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
> > [ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
> > [ 0.000000] pcpu-alloc: [0] 0 [0] 1
> > [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
> > [ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
> > [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
> > [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
> > [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
> > [ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
> > [ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
> > [ 0.000000] Faulting instruction address: 0xc01c8348
> > [ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
> > [ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
> > [ 0.000000] Modules linked in:
> > [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
> > [ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
> > [ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
> > [ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
> > [ 0.000000] DEAR: 0007df58 ESR: 00000000
> > [ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
> > [ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
> > [ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
> > [ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
> > [ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
> > [ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
> > [ 0.000000] Call Trace:
> > [ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
> > [ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
> > [ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
> > [ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
> > [ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
> > [ 0.000000] Instruction dump:
> > [ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
> > [ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
> > [ 0.000000] ---[ end trace 0000000000000000 ]---
> > [ 0.000000]
> > [ 0.000000] Kernel panic - not syncing: Fatal exception
> > [ 0.000000] Rebooting in 1 seconds..
> > [ 0.000000] System Halted, OK to turn off power
> >
> > 4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
> > address range. And on ranges:
> > 0x0000_0000 - 0x7fff_ffff
> > 0xc020_0000 - 0xeeff_ffff
> > 0xf000_0000 - 0xff6f_ffff
> > there is no peripheral device, they are free for DRAM. Between these
> > physical ranges are mapped peripheral devices (PCIe and NOR).
> >
> > Any idea if I'm doing something wrong or there can be a bug in memory code?
> >
> > Quite suspicious is that "Initmem setup node 0" prints one range where
> > are also peripherals, not just DRAM. Crash is on address 0xc01c8348
> > which belongs to PCIe.
> >
>
> Yes I also find that "Initmem setup node 0" suspicious.
>
> However the crash address 0xc01c8348 is valid kernel address. That's a
> virtual address, not a physical address, so that's not PCIe. That's
> kernel linear mapping, so that's likely physical address 0x001c8348
> offseted by PAGE_OFFSET which is 0xc0000000.
If I read the dump correctly, 0xc01c8348 is the PC of the instruction that
crashed and the access was to 0x0007df58 which seem to well inside
0x0000_0000 - 0x7fff_ffff range.
And the "Early memory node ranges" look consistent with the memory layout
above.
My guess would be that something went wrong in the linear map setup, but it
won't hurt running with "memblock=debug" added to the kernel command line
to see if there is anything suspicious there.
> Do you have a way to reproduce this problem under QEMU ?
>
> Thanks
> Christophe
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-12 14:48 ` Mike Rapoport
@ 2022-09-12 21:16 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-09-12 21:16 UTC (permalink / raw)
To: Mike Rapoport
Cc: Christophe Leroy, Ash Logan, paulus, mpe, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne, linux-mm
On Monday 12 September 2022 15:48:05 Mike Rapoport wrote:
> On Sat, Sep 10, 2022 at 09:39:20AM +0000, Christophe Leroy wrote:
> > + Adding Mike who might help if the problem is around memblock.
> >
> > Le 08/09/2022 à 22:17, Pali Rohár a écrit :
> > > On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
> > >> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
> > >>> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> > >>>> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> > >>>>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> > >>>>>> + linux-mm
> > >>>>>>
> > >>>>>> Do you know what are requirements for kernel to support non-contiguous
> > >>>>>> memory support and what is needed to enable it for 32-bit powerpc?
> > >>>>>
> > >>>>> Any hints?
> > >>>>
> > >>>> PING?
> > >>>>
> > >>>
> > >>> The tree following patches landed in powerpc/next branch, so they should
> > >>> soon be visible in linux-next too:
> > >>>
> > >>> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
> > >>> gigantic pages")
> > >>> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
> > >>> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
> > >>
> > >> Ou, nice! I will try to test it if it allows me to access more than 2GB
> > >> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
> > >
> > > Hello! Ok, I have tried it from powerpc/next branch, but seems it does
> > > not work. I'm getting just early kernel crash.
> > >
> > > [ 0.000000] CPU maps initialized for 1 thread per core
> > > [ 0.000000] (thread shift is 0)
> > > [ 0.000000] -----------------------------------------------------
> > > [ 0.000000] phys_mem_size = 0xbe500000
> > > [ 0.000000] dcache_bsize = 0x20
> > > [ 0.000000] icache_bsize = 0x20
> > > [ 0.000000] cpu_features = 0x0000000010010108
> > > [ 0.000000] possible = 0x0000000010010108
> > > [ 0.000000] always = 0x0000000010010108
> > > [ 0.000000] cpu_user_features = 0x84e08000 0x08000000
> > > [ 0.000000] mmu_features = 0x00020010
> > > [ 0.000000] -----------------------------------------------------
> > > mpc85xx_rdb_setup_arch()
> > > [ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
> > > [ 0.000000] MPC85xx RDB board from Freescale Semiconductor
> > > [ 0.000000] barrier-nospec: using isync; sync as speculation barrier
> > > [ 0.000000] barrier-nospec: patched 182 locations
> > > [ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
> > > [ 0.000000] Memory hole size: 1042MB
> > > [ 0.000000] Zone ranges:
> > > [ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
> > > [ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
> > > [ 0.000000] Movable zone start for each node
> > > [ 0.000000] Early memory node ranges
> > > [ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
> > > [ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
> > > [ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
> > > [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
> > > [ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
> > > [ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
> > > [ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
> > > [ 0.000000] pcpu-alloc: [0] 0 [0] 1
> > > [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
> > > [ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
> > > [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
> > > [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
> > > [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
> > > [ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
> > > [ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
> > > [ 0.000000] Faulting instruction address: 0xc01c8348
> > > [ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
> > > [ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
> > > [ 0.000000] Modules linked in:
> > > [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
> > > [ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
> > > [ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
> > > [ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
> > > [ 0.000000] DEAR: 0007df58 ESR: 00000000
> > > [ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
> > > [ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
> > > [ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
> > > [ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
> > > [ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
> > > [ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
> > > [ 0.000000] Call Trace:
> > > [ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
> > > [ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
> > > [ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
> > > [ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
> > > [ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
> > > [ 0.000000] Instruction dump:
> > > [ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
> > > [ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
> > > [ 0.000000] ---[ end trace 0000000000000000 ]---
> > > [ 0.000000]
> > > [ 0.000000] Kernel panic - not syncing: Fatal exception
> > > [ 0.000000] Rebooting in 1 seconds..
> > > [ 0.000000] System Halted, OK to turn off power
> > >
> > > 4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
> > > address range. And on ranges:
> > > 0x0000_0000 - 0x7fff_ffff
> > > 0xc020_0000 - 0xeeff_ffff
> > > 0xf000_0000 - 0xff6f_ffff
> > > there is no peripheral device, they are free for DRAM. Between these
> > > physical ranges are mapped peripheral devices (PCIe and NOR).
> > >
> > > Any idea if I'm doing something wrong or there can be a bug in memory code?
> > >
> > > Quite suspicious is that "Initmem setup node 0" prints one range where
> > > are also peripherals, not just DRAM. Crash is on address 0xc01c8348
> > > which belongs to PCIe.
> > >
> >
> > Yes I also find that "Initmem setup node 0" suspicious.
> >
> > However the crash address 0xc01c8348 is valid kernel address. That's a
> > virtual address, not a physical address, so that's not PCIe. That's
> > kernel linear mapping, so that's likely physical address 0x001c8348
> > offseted by PAGE_OFFSET which is 0xc0000000.
>
> If I read the dump correctly, 0xc01c8348 is the PC of the instruction that
> crashed and the access was to 0x0007df58 which seem to well inside
> 0x0000_0000 - 0x7fff_ffff range.
I have tried to read and write memory at address 0x0007df58 in U-Boot
and it works fine without any crash.
I repeated that boot and it always failed with same errors at same
address. I have also tried to use different 4GB DDR module (just in case
if it is non-functional) but it failed on the same error on the same
address.
> And the "Early memory node ranges" look consistent with the memory layout
> above.
>
> My guess would be that something went wrong in the linear map setup, but it
> won't hurt running with "memblock=debug" added to the kernel command line
> to see if there is anything suspicious there.
Here is boot log on serial console with memblock=debug command line:
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x4 nid=-1 from=0x00000000 max_addr=0x00000000 smp_setup_cpu_maps+0x40/0x2b4
[ 0.000000] memblock_reserve: [0x2fff5d74-0x2fff5d7b] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] (thread shift is 0)
[ 0.000000] memblock_phys_free: [0x2fff5d74-0x2fff5d7b] setup_arch+0x1bc/0x318
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0xbe500000
[ 0.000000] dcache_bsize = 0x20
[ 0.000000] icache_bsize = 0x20
[ 0.000000] cpu_features = 0x0000000010010108
[ 0.000000] possible = 0x0000000010010108
[ 0.000000] always = 0x0000000010010108
[ 0.000000] cpu_user_features = 0x84e08000 0x08000000
[ 0.000000] mmu_features = 0x00020010
[ 0.000000] -----------------------------------------------------
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff2000-0x2fff3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff0000-0x2fff1fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffee000-0x2ffeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffec000-0x2ffedfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffea000-0x2ffebfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe8000-0x2ffe9fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe6000-0x2ffe7fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe4000-0x2ffe5fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe2000-0x2ffe3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe0000-0x2ffe1fff] memblock_alloc_range_nid+0xe8/0x1b0
mpc85xx_rdb_setup_arch()
[ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2fff4000-0x2fff4fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MPC85xx RDB board from Freescale Semiconductor
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 182 locations
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2ffdf000-0x2ffdffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
[ 0.000000] Memory hole size: 1042MB
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
[ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
[ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
[ 0.000000] memblock_alloc_try_nid_raw: 37675008 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 free_area_init+0x890/0xc94
[ 0.000000] memblock_reserve: [0x2dbf1000-0x2ffdefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5d00-0x2fff5d5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 416 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5b60-0x2fff5cff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x38/0x154
[ 0.000000] memblock_reserve: [0x2fff5b40-0x2fff5b5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 1024 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x7c/0x154
[ 0.000000] memblock_reserve: [0x2fff5740-0x2fff5b3f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0xc4/0x154
[ 0.000000] memblock_reserve: [0x2fff5720-0x2fff573f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] memblock_alloc_try_nid: 116 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x194/0x6d0
[ 0.000000] memblock_reserve: [0x2fff56a0-0x2fff5713] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 116 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x1c0/0x6d0
[ 0.000000] memblock_reserve: [0x2fff5620-0x2fff5693] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x314/0x7b4
[ 0.000000] memblock_reserve: [0x2dbf0000-0x2dbf0fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x4d4/0x7b4
[ 0.000000] memblock_reserve: [0x2dbef000-0x2dbeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 90112 bytes align=0x1000 nid=-1 from=0x3fffffff max_addr=0x00000000 pcpu_embed_first_chunk+0x564/0x7b4
[ 0.000000] memblock_reserve: [0x2dbd9000-0x2dbeefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbe4000-0x2dbe3fff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeefff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x37c/0x924
[ 0.000000] memblock_reserve: [0x2fff5d60-0x2fff5d63] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3a4/0x924
[ 0.000000] memblock_reserve: [0x2fff5600-0x2fff5603] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3cc/0x924
[ 0.000000] memblock_reserve: [0x2fff55e0-0x2fff55e7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3f4/0x924
[ 0.000000] memblock_reserve: [0x2fff55c0-0x2fff55c7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] memblock_alloc_try_nid: 136 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x7fc/0x924
[ 0.000000] memblock_reserve: [0x2fff5520-0x2fff55a7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff54c0-0x2fff551f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 384 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5340-0x2fff54bf] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 388 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2fff51a0-0x2fff5323] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5140-0x2fff519f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff50e0-0x2fff513f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 768 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd8d00-0x2dbd8fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 772 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd89e0-0x2dbd8ce3] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 192 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5020-0x2fff50df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbf0000-0x2dbf0fff] pcpu_embed_first_chunk+0x744/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeffff] pcpu_embed_first_chunk+0x754/0x7b4
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
[ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200 memblock=debug
[ 0.000000] memblock_alloc_try_nid: 524288 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db589e0-0x2dbd89df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] memblock_alloc_try_nid: 262144 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db189e0-0x2db589df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
[ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
[ 0.000000] Faulting instruction address: 0xc01c8348
[ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
[ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
[ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
[ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
[ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
[ 0.000000] DEAR: 0007df58 ESR: 00000000
[ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
[ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
[ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
[ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
[ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
[ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
[ 0.000000] Call Trace:
[ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
[ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
[ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
[ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
[ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
[ 0.000000] Instruction dump:
[ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
[ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
[ 0.000000] ---[ end trace 0000000000000000 ]---
[ 0.000000]
[ 0.000000] Kernel panic - not syncing: Fatal exception
[ 0.000000] Rebooting in 1 seconds..
[ 0.000000] System Halted, OK to turn off power
Do you need something more for debug?
> > Do you have a way to reproduce this problem under QEMU ?
Well, I really do not know how to run it in QEMU. IIRC QEMU does not
have support for P2020 processor. Is there any guidance?
> > Thanks
> > Christophe
>
> --
> Sincerely yours,
> Mike.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-12 21:16 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-09-12 21:16 UTC (permalink / raw)
To: Mike Rapoport
Cc: linux-kernel, linux-mm, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
On Monday 12 September 2022 15:48:05 Mike Rapoport wrote:
> On Sat, Sep 10, 2022 at 09:39:20AM +0000, Christophe Leroy wrote:
> > + Adding Mike who might help if the problem is around memblock.
> >
> > Le 08/09/2022 à 22:17, Pali Rohár a écrit :
> > > On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
> > >> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
> > >>> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
> > >>>> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> > >>>>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> > >>>>>> + linux-mm
> > >>>>>>
> > >>>>>> Do you know what are requirements for kernel to support non-contiguous
> > >>>>>> memory support and what is needed to enable it for 32-bit powerpc?
> > >>>>>
> > >>>>> Any hints?
> > >>>>
> > >>>> PING?
> > >>>>
> > >>>
> > >>> The tree following patches landed in powerpc/next branch, so they should
> > >>> soon be visible in linux-next too:
> > >>>
> > >>> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
> > >>> gigantic pages")
> > >>> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
> > >>> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
> > >>
> > >> Ou, nice! I will try to test it if it allows me to access more than 2GB
> > >> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
> > >
> > > Hello! Ok, I have tried it from powerpc/next branch, but seems it does
> > > not work. I'm getting just early kernel crash.
> > >
> > > [ 0.000000] CPU maps initialized for 1 thread per core
> > > [ 0.000000] (thread shift is 0)
> > > [ 0.000000] -----------------------------------------------------
> > > [ 0.000000] phys_mem_size = 0xbe500000
> > > [ 0.000000] dcache_bsize = 0x20
> > > [ 0.000000] icache_bsize = 0x20
> > > [ 0.000000] cpu_features = 0x0000000010010108
> > > [ 0.000000] possible = 0x0000000010010108
> > > [ 0.000000] always = 0x0000000010010108
> > > [ 0.000000] cpu_user_features = 0x84e08000 0x08000000
> > > [ 0.000000] mmu_features = 0x00020010
> > > [ 0.000000] -----------------------------------------------------
> > > mpc85xx_rdb_setup_arch()
> > > [ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
> > > [ 0.000000] MPC85xx RDB board from Freescale Semiconductor
> > > [ 0.000000] barrier-nospec: using isync; sync as speculation barrier
> > > [ 0.000000] barrier-nospec: patched 182 locations
> > > [ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
> > > [ 0.000000] Memory hole size: 1042MB
> > > [ 0.000000] Zone ranges:
> > > [ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
> > > [ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
> > > [ 0.000000] Movable zone start for each node
> > > [ 0.000000] Early memory node ranges
> > > [ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
> > > [ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
> > > [ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
> > > [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
> > > [ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
> > > [ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
> > > [ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
> > > [ 0.000000] pcpu-alloc: [0] 0 [0] 1
> > > [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
> > > [ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
> > > [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
> > > [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
> > > [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
> > > [ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
> > > [ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
> > > [ 0.000000] Faulting instruction address: 0xc01c8348
> > > [ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
> > > [ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
> > > [ 0.000000] Modules linked in:
> > > [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
> > > [ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
> > > [ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
> > > [ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
> > > [ 0.000000] DEAR: 0007df58 ESR: 00000000
> > > [ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
> > > [ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
> > > [ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
> > > [ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
> > > [ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
> > > [ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
> > > [ 0.000000] Call Trace:
> > > [ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
> > > [ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
> > > [ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
> > > [ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
> > > [ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
> > > [ 0.000000] Instruction dump:
> > > [ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
> > > [ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
> > > [ 0.000000] ---[ end trace 0000000000000000 ]---
> > > [ 0.000000]
> > > [ 0.000000] Kernel panic - not syncing: Fatal exception
> > > [ 0.000000] Rebooting in 1 seconds..
> > > [ 0.000000] System Halted, OK to turn off power
> > >
> > > 4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
> > > address range. And on ranges:
> > > 0x0000_0000 - 0x7fff_ffff
> > > 0xc020_0000 - 0xeeff_ffff
> > > 0xf000_0000 - 0xff6f_ffff
> > > there is no peripheral device, they are free for DRAM. Between these
> > > physical ranges are mapped peripheral devices (PCIe and NOR).
> > >
> > > Any idea if I'm doing something wrong or there can be a bug in memory code?
> > >
> > > Quite suspicious is that "Initmem setup node 0" prints one range where
> > > are also peripherals, not just DRAM. Crash is on address 0xc01c8348
> > > which belongs to PCIe.
> > >
> >
> > Yes I also find that "Initmem setup node 0" suspicious.
> >
> > However the crash address 0xc01c8348 is valid kernel address. That's a
> > virtual address, not a physical address, so that's not PCIe. That's
> > kernel linear mapping, so that's likely physical address 0x001c8348
> > offseted by PAGE_OFFSET which is 0xc0000000.
>
> If I read the dump correctly, 0xc01c8348 is the PC of the instruction that
> crashed and the access was to 0x0007df58 which seem to well inside
> 0x0000_0000 - 0x7fff_ffff range.
I have tried to read and write memory at address 0x0007df58 in U-Boot
and it works fine without any crash.
I repeated that boot and it always failed with same errors at same
address. I have also tried to use different 4GB DDR module (just in case
if it is non-functional) but it failed on the same error on the same
address.
> And the "Early memory node ranges" look consistent with the memory layout
> above.
>
> My guess would be that something went wrong in the linear map setup, but it
> won't hurt running with "memblock=debug" added to the kernel command line
> to see if there is anything suspicious there.
Here is boot log on serial console with memblock=debug command line:
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x4 nid=-1 from=0x00000000 max_addr=0x00000000 smp_setup_cpu_maps+0x40/0x2b4
[ 0.000000] memblock_reserve: [0x2fff5d74-0x2fff5d7b] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] (thread shift is 0)
[ 0.000000] memblock_phys_free: [0x2fff5d74-0x2fff5d7b] setup_arch+0x1bc/0x318
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0xbe500000
[ 0.000000] dcache_bsize = 0x20
[ 0.000000] icache_bsize = 0x20
[ 0.000000] cpu_features = 0x0000000010010108
[ 0.000000] possible = 0x0000000010010108
[ 0.000000] always = 0x0000000010010108
[ 0.000000] cpu_user_features = 0x84e08000 0x08000000
[ 0.000000] mmu_features = 0x00020010
[ 0.000000] -----------------------------------------------------
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff2000-0x2fff3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff0000-0x2fff1fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffee000-0x2ffeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffec000-0x2ffedfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffea000-0x2ffebfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe8000-0x2ffe9fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe6000-0x2ffe7fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe4000-0x2ffe5fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe2000-0x2ffe3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe0000-0x2ffe1fff] memblock_alloc_range_nid+0xe8/0x1b0
mpc85xx_rdb_setup_arch()
[ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2fff4000-0x2fff4fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MPC85xx RDB board from Freescale Semiconductor
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 182 locations
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2ffdf000-0x2ffdffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
[ 0.000000] Memory hole size: 1042MB
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
[ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
[ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
[ 0.000000] memblock_alloc_try_nid_raw: 37675008 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 free_area_init+0x890/0xc94
[ 0.000000] memblock_reserve: [0x2dbf1000-0x2ffdefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5d00-0x2fff5d5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 416 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5b60-0x2fff5cff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x38/0x154
[ 0.000000] memblock_reserve: [0x2fff5b40-0x2fff5b5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 1024 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x7c/0x154
[ 0.000000] memblock_reserve: [0x2fff5740-0x2fff5b3f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0xc4/0x154
[ 0.000000] memblock_reserve: [0x2fff5720-0x2fff573f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] memblock_alloc_try_nid: 116 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x194/0x6d0
[ 0.000000] memblock_reserve: [0x2fff56a0-0x2fff5713] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 116 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x1c0/0x6d0
[ 0.000000] memblock_reserve: [0x2fff5620-0x2fff5693] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x314/0x7b4
[ 0.000000] memblock_reserve: [0x2dbf0000-0x2dbf0fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x4d4/0x7b4
[ 0.000000] memblock_reserve: [0x2dbef000-0x2dbeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 90112 bytes align=0x1000 nid=-1 from=0x3fffffff max_addr=0x00000000 pcpu_embed_first_chunk+0x564/0x7b4
[ 0.000000] memblock_reserve: [0x2dbd9000-0x2dbeefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbe4000-0x2dbe3fff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeefff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x37c/0x924
[ 0.000000] memblock_reserve: [0x2fff5d60-0x2fff5d63] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3a4/0x924
[ 0.000000] memblock_reserve: [0x2fff5600-0x2fff5603] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3cc/0x924
[ 0.000000] memblock_reserve: [0x2fff55e0-0x2fff55e7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3f4/0x924
[ 0.000000] memblock_reserve: [0x2fff55c0-0x2fff55c7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] memblock_alloc_try_nid: 136 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x7fc/0x924
[ 0.000000] memblock_reserve: [0x2fff5520-0x2fff55a7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff54c0-0x2fff551f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 384 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5340-0x2fff54bf] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 388 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2fff51a0-0x2fff5323] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5140-0x2fff519f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff50e0-0x2fff513f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 768 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd8d00-0x2dbd8fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 772 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd89e0-0x2dbd8ce3] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 192 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5020-0x2fff50df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbf0000-0x2dbf0fff] pcpu_embed_first_chunk+0x744/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeffff] pcpu_embed_first_chunk+0x754/0x7b4
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
[ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200 memblock=debug
[ 0.000000] memblock_alloc_try_nid: 524288 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db589e0-0x2dbd89df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] memblock_alloc_try_nid: 262144 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db189e0-0x2db589df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
[ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
[ 0.000000] Faulting instruction address: 0xc01c8348
[ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
[ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
[ 0.000000] Modules linked in:
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
[ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
[ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
[ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
[ 0.000000] DEAR: 0007df58 ESR: 00000000
[ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
[ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
[ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
[ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
[ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
[ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
[ 0.000000] Call Trace:
[ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
[ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
[ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
[ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
[ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
[ 0.000000] Instruction dump:
[ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
[ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
[ 0.000000] ---[ end trace 0000000000000000 ]---
[ 0.000000]
[ 0.000000] Kernel panic - not syncing: Fatal exception
[ 0.000000] Rebooting in 1 seconds..
[ 0.000000] System Halted, OK to turn off power
Do you need something more for debug?
> > Do you have a way to reproduce this problem under QEMU ?
Well, I really do not know how to run it in QEMU. IIRC QEMU does not
have support for P2020 processor. Is there any guidance?
> > Thanks
> > Christophe
>
> --
> Sincerely yours,
> Mike.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-12 21:16 ` Pali Rohár
@ 2022-09-13 6:11 ` Christophe Leroy
-1 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-13 6:11 UTC (permalink / raw)
To: Pali Rohár, Mike Rapoport
Cc: Ash Logan, paulus, mpe, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne, linux-mm
Le 12/09/2022 à 23:16, Pali Rohár a écrit :
> On Monday 12 September 2022 15:48:05 Mike Rapoport wrote:
>> On Sat, Sep 10, 2022 at 09:39:20AM +0000, Christophe Leroy wrote:
>>> + Adding Mike who might help if the problem is around memblock.
>>>
>>> Le 08/09/2022 à 22:17, Pali Rohár a écrit :
>>>> On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
>>>>> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
>>>>>> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
>>>>>>> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
>>>>>>>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
>>>>>>>>> + linux-mm
>>>>>>>>>
>>>>>>>>> Do you know what are requirements for kernel to support non-contiguous
>>>>>>>>> memory support and what is needed to enable it for 32-bit powerpc?
>>>>>>>>
>>>>>>>> Any hints?
>>>>>>>
>>>>>>> PING?
>>>>>>>
>>>>>>
>>>>>> The tree following patches landed in powerpc/next branch, so they should
>>>>>> soon be visible in linux-next too:
>>>>>>
>>>>>> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
>>>>>> gigantic pages")
>>>>>> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
>>>>>> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
>>>>>
>>>>> Ou, nice! I will try to test it if it allows me to access more than 2GB
>>>>> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
>>>>
>>>> Hello! Ok, I have tried it from powerpc/next branch, but seems it does
>>>> not work. I'm getting just early kernel crash.
>>>>
>>>> [ 0.000000] CPU maps initialized for 1 thread per core
>>>> [ 0.000000] (thread shift is 0)
>>>> [ 0.000000] -----------------------------------------------------
>>>> [ 0.000000] phys_mem_size = 0xbe500000
>>>> [ 0.000000] dcache_bsize = 0x20
>>>> [ 0.000000] icache_bsize = 0x20
>>>> [ 0.000000] cpu_features = 0x0000000010010108
>>>> [ 0.000000] possible = 0x0000000010010108
>>>> [ 0.000000] always = 0x0000000010010108
>>>> [ 0.000000] cpu_user_features = 0x84e08000 0x08000000
>>>> [ 0.000000] mmu_features = 0x00020010
>>>> [ 0.000000] -----------------------------------------------------
>>>> mpc85xx_rdb_setup_arch()
>>>> [ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
>>>> [ 0.000000] MPC85xx RDB board from Freescale Semiconductor
>>>> [ 0.000000] barrier-nospec: using isync; sync as speculation barrier
>>>> [ 0.000000] barrier-nospec: patched 182 locations
>>>> [ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
>>>> [ 0.000000] Memory hole size: 1042MB
>>>> [ 0.000000] Zone ranges:
>>>> [ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
>>>> [ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
>>>> [ 0.000000] Movable zone start for each node
>>>> [ 0.000000] Early memory node ranges
>>>> [ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
>>>> [ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
>>>> [ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
>>>> [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
>>>> [ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
>>>> [ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
>>>> [ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
>>>> [ 0.000000] pcpu-alloc: [0] 0 [0] 1
>>>> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
>>>> [ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
>>>> [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
>>>> [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
>>>> [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
>>>> [ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
>>>> [ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
>>>> [ 0.000000] Faulting instruction address: 0xc01c8348
>>>> [ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
>>>> [ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
>>>> [ 0.000000] Modules linked in:
>>>> [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
>>>> [ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
>>>> [ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
>>>> [ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
>>>> [ 0.000000] DEAR: 0007df58 ESR: 00000000
>>>> [ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
>>>> [ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
>>>> [ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
>>>> [ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
>>>> [ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
>>>> [ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
>>>> [ 0.000000] Call Trace:
>>>> [ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
>>>> [ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
>>>> [ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
>>>> [ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
>>>> [ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
>>>> [ 0.000000] Instruction dump:
>>>> [ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
>>>> [ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
>>>> [ 0.000000] ---[ end trace 0000000000000000 ]---
>>>> [ 0.000000]
>>>> [ 0.000000] Kernel panic - not syncing: Fatal exception
>>>> [ 0.000000] Rebooting in 1 seconds..
>>>> [ 0.000000] System Halted, OK to turn off power
>>>>
>>>> 4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
>>>> address range. And on ranges:
>>>> 0x0000_0000 - 0x7fff_ffff
>>>> 0xc020_0000 - 0xeeff_ffff
>>>> 0xf000_0000 - 0xff6f_ffff
>>>> there is no peripheral device, they are free for DRAM. Between these
>>>> physical ranges are mapped peripheral devices (PCIe and NOR).
>>>>
>>>> Any idea if I'm doing something wrong or there can be a bug in memory code?
>>>>
>>>> Quite suspicious is that "Initmem setup node 0" prints one range where
>>>> are also peripherals, not just DRAM. Crash is on address 0xc01c8348
>>>> which belongs to PCIe.
>>>>
>>>
>>> Yes I also find that "Initmem setup node 0" suspicious.
>>>
>>> However the crash address 0xc01c8348 is valid kernel address. That's a
>>> virtual address, not a physical address, so that's not PCIe. That's
>>> kernel linear mapping, so that's likely physical address 0x001c8348
>>> offseted by PAGE_OFFSET which is 0xc0000000.
>>
>> If I read the dump correctly, 0xc01c8348 is the PC of the instruction that
>> crashed and the access was to 0x0007df58 which seem to well inside
>> 0x0000_0000 - 0x7fff_ffff range.
>
> I have tried to read and write memory at address 0x0007df58 in U-Boot
> and it works fine without any crash.
You are mixing physical and virtual addresses.
With Uboot, you checked the Physical address. That corresponds to
address 0xc007df58 in Linux.
The Oops happens at virtual address 0x7df58 which is definitely invalid
as it is below 0xc0000000.
>
> I repeated that boot and it always failed with same errors at same
> address. I have also tried to use different 4GB DDR module (just in case
> if it is non-functional) but it failed on the same error on the same
> address.
>
>> And the "Early memory node ranges" look consistent with the memory layout
>> above.
>>
>> My guess would be that something went wrong in the linear map setup, but it
>> won't hurt running with "memblock=debug" added to the kernel command line
>> to see if there is anything suspicious there.
>
> Here is boot log on serial console with memblock=debug command line:
>
...
>
> Do you need something more for debug?
Can you send me the 'vmlinux' used to generate the above Oops so that I
can see exactly where we are in function mem_init().
And could you also try without CONFIG_HIGHMEM just in case.
>
>>> Do you have a way to reproduce this problem under QEMU ?
>
> Well, I really do not know how to run it in QEMU. IIRC QEMU does not
> have support for P2020 processor. Is there any guidance?
>
I don't know. I guess there might be the same problem with any e500. But
as far as I can see, the 8544 emulation on QEMU has a limit of 3GB and
provides memory as a single block.
Christophe
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-13 6:11 ` Christophe Leroy
0 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-13 6:11 UTC (permalink / raw)
To: Pali Rohár, Mike Rapoport
Cc: linux-kernel, linux-mm, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
Le 12/09/2022 à 23:16, Pali Rohár a écrit :
> On Monday 12 September 2022 15:48:05 Mike Rapoport wrote:
>> On Sat, Sep 10, 2022 at 09:39:20AM +0000, Christophe Leroy wrote:
>>> + Adding Mike who might help if the problem is around memblock.
>>>
>>> Le 08/09/2022 à 22:17, Pali Rohár a écrit :
>>>> On Thursday 08 September 2022 17:35:11 Pali Rohár wrote:
>>>>> On Thursday 08 September 2022 15:25:14 Christophe Leroy wrote:
>>>>>> Le 08/08/2022 à 20:40, Pali Rohár a écrit :
>>>>>>> On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
>>>>>>>> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
>>>>>>>>> + linux-mm
>>>>>>>>>
>>>>>>>>> Do you know what are requirements for kernel to support non-contiguous
>>>>>>>>> memory support and what is needed to enable it for 32-bit powerpc?
>>>>>>>>
>>>>>>>> Any hints?
>>>>>>>
>>>>>>> PING?
>>>>>>>
>>>>>>
>>>>>> The tree following patches landed in powerpc/next branch, so they should
>>>>>> soon be visible in linux-next too:
>>>>>>
>>>>>> fc06755e2562 ("powerpc/32: Drop a stale comment about reservation of
>>>>>> gigantic pages")
>>>>>> b0e0d68b1c52 ("powerpc/32: Allow fragmented physical memory")
>>>>>> 0115953dcebe ("powerpc/32: Remove wii_memory_fixups()")
>>>>>
>>>>> Ou, nice! I will try to test it if it allows me to access more than 2GB
>>>>> of RAM from 4GB DDR3 module with 32-bit addressing mode on P2020 CPU.
>>>>
>>>> Hello! Ok, I have tried it from powerpc/next branch, but seems it does
>>>> not work. I'm getting just early kernel crash.
>>>>
>>>> [ 0.000000] CPU maps initialized for 1 thread per core
>>>> [ 0.000000] (thread shift is 0)
>>>> [ 0.000000] -----------------------------------------------------
>>>> [ 0.000000] phys_mem_size = 0xbe500000
>>>> [ 0.000000] dcache_bsize = 0x20
>>>> [ 0.000000] icache_bsize = 0x20
>>>> [ 0.000000] cpu_features = 0x0000000010010108
>>>> [ 0.000000] possible = 0x0000000010010108
>>>> [ 0.000000] always = 0x0000000010010108
>>>> [ 0.000000] cpu_user_features = 0x84e08000 0x08000000
>>>> [ 0.000000] mmu_features = 0x00020010
>>>> [ 0.000000] -----------------------------------------------------
>>>> mpc85xx_rdb_setup_arch()
>>>> [ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
>>>> [ 0.000000] MPC85xx RDB board from Freescale Semiconductor
>>>> [ 0.000000] barrier-nospec: using isync; sync as speculation barrier
>>>> [ 0.000000] barrier-nospec: patched 182 locations
>>>> [ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
>>>> [ 0.000000] Memory hole size: 1042MB
>>>> [ 0.000000] Zone ranges:
>>>> [ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
>>>> [ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
>>>> [ 0.000000] Movable zone start for each node
>>>> [ 0.000000] Early memory node ranges
>>>> [ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
>>>> [ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
>>>> [ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
>>>> [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
>>>> [ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
>>>> [ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
>>>> [ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
>>>> [ 0.000000] pcpu-alloc: [0] 0 [0] 1
>>>> [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
>>>> [ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs,2048 rootflags=chk_data_crc rw console=ttyS0,115200
>>>> [ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
>>>> [ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
>>>> [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
>>>> [ 0.000000] Kernel attempted to read user page (7df58) - exploit attempt? (uid: 0)
>>>> [ 0.000000] BUG: Unable to handle kernel data access on read at 0x0007df58
>>>> [ 0.000000] Faulting instruction address: 0xc01c8348
>>>> [ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
>>>> [ 0.000000] BE PAGE_SIZE=4K SMP NR_CPUS=2 P2020RDB-PC
>>>> [ 0.000000] Modules linked in:
>>>> [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 6.0.0-rc2-0caacb197b677410bdac81bc34f05235+ #121
>>>> [ 0.000000] NIP: c01c8348 LR: c01cb2bc CTR: 0000000a
>>>> [ 0.000000] REGS: c10d7e20 TRAP: 0300 Not tainted (6.0.0-rc2-0caacb197b677410bdac81bc34f05235+)
>>>> [ 0.000000] MSR: 00021000 <CE,ME> CR: 48044224 XER: 00000000
>>>> [ 0.000000] DEAR: 0007df58 ESR: 00000000
>>>> [ 0.000000] GPR00: c01cb294 c10d7f10 c1045340 00000001 00000004 c112bcc0 00000015 eedf1000
>>>> [ 0.000000] GPR08: 00000003 0007df58 00000000 f0000000 28044228 00000200 00000000 00000000
>>>> [ 0.000000] GPR16: 00000000 00000000 00000000 0275cb7a c0000000 00000001 0000075f 00000000
>>>> [ 0.000000] GPR24: c1031004 00000000 00000000 00000001 c10f0000 eedf1000 00080000 00080000
>>>> [ 0.000000] NIP [c01c8348] free_unref_page_prepare.part.93+0x48/0x60
>>>> [ 0.000000] LR [c01cb2bc] free_unref_page+0x84/0x4b8
>>>> [ 0.000000] Call Trace:
>>>> [ 0.000000] [c10d7f10] [eedf1000] 0xeedf1000 (unreliable)
>>>> [ 0.000000] [c10d7f20] [c01cb294] free_unref_page+0x5c/0x4b8
>>>> [ 0.000000] [c10d7f70] [c1007644] mem_init+0xd0/0x194
>>>> [ 0.000000] [c10d7fa0] [c1000e4c] start_kernel+0x4c0/0x6d0
>>>> [ 0.000000] [c10d7ff0] [c00003e0] set_ivor+0x13c/0x178
>>>> [ 0.000000] Instruction dump:
>>>> [ 0.000000] 552817be 5509103a 7d294214 55293830 7d4a4a14 812a003c 814a0038 5529002a
>>>> [ 0.000000] 7c892050 5484c23a 5489eafa 548406fe <7d2a482e> 7d242430 5484077e 90870010
>>>> [ 0.000000] ---[ end trace 0000000000000000 ]---
>>>> [ 0.000000]
>>>> [ 0.000000] Kernel panic - not syncing: Fatal exception
>>>> [ 0.000000] Rebooting in 1 seconds..
>>>> [ 0.000000] System Halted, OK to turn off power
>>>>
>>>> 4GB DDR3 SODIMM module is set via Freescale LBC to the whole 4 GB
>>>> address range. And on ranges:
>>>> 0x0000_0000 - 0x7fff_ffff
>>>> 0xc020_0000 - 0xeeff_ffff
>>>> 0xf000_0000 - 0xff6f_ffff
>>>> there is no peripheral device, they are free for DRAM. Between these
>>>> physical ranges are mapped peripheral devices (PCIe and NOR).
>>>>
>>>> Any idea if I'm doing something wrong or there can be a bug in memory code?
>>>>
>>>> Quite suspicious is that "Initmem setup node 0" prints one range where
>>>> are also peripherals, not just DRAM. Crash is on address 0xc01c8348
>>>> which belongs to PCIe.
>>>>
>>>
>>> Yes I also find that "Initmem setup node 0" suspicious.
>>>
>>> However the crash address 0xc01c8348 is valid kernel address. That's a
>>> virtual address, not a physical address, so that's not PCIe. That's
>>> kernel linear mapping, so that's likely physical address 0x001c8348
>>> offseted by PAGE_OFFSET which is 0xc0000000.
>>
>> If I read the dump correctly, 0xc01c8348 is the PC of the instruction that
>> crashed and the access was to 0x0007df58 which seem to well inside
>> 0x0000_0000 - 0x7fff_ffff range.
>
> I have tried to read and write memory at address 0x0007df58 in U-Boot
> and it works fine without any crash.
You are mixing physical and virtual addresses.
With Uboot, you checked the Physical address. That corresponds to
address 0xc007df58 in Linux.
The Oops happens at virtual address 0x7df58 which is definitely invalid
as it is below 0xc0000000.
>
> I repeated that boot and it always failed with same errors at same
> address. I have also tried to use different 4GB DDR module (just in case
> if it is non-functional) but it failed on the same error on the same
> address.
>
>> And the "Early memory node ranges" look consistent with the memory layout
>> above.
>>
>> My guess would be that something went wrong in the linear map setup, but it
>> won't hurt running with "memblock=debug" added to the kernel command line
>> to see if there is anything suspicious there.
>
> Here is boot log on serial console with memblock=debug command line:
>
...
>
> Do you need something more for debug?
Can you send me the 'vmlinux' used to generate the above Oops so that I
can see exactly where we are in function mem_init().
And could you also try without CONFIG_HIGHMEM just in case.
>
>>> Do you have a way to reproduce this problem under QEMU ?
>
> Well, I really do not know how to run it in QEMU. IIRC QEMU does not
> have support for P2020 processor. Is there any guidance?
>
I don't know. I guess there might be the same problem with any e500. But
as far as I can see, the 8544 emulation on QEMU has a limit of 3GB and
provides memory as a single block.
Christophe
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-13 6:11 ` Christophe Leroy
@ 2022-09-13 12:36 ` Christophe Leroy
-1 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-13 12:36 UTC (permalink / raw)
To: Pali Rohár, Mike Rapoport
Cc: Ash Logan, paulus, mpe, robh+dt, benh, linuxppc-dev,
linux-kernel, j.ne, linux-mm
Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
>
>
> Le 12/09/2022 à 23:16, Pali Rohár a écrit :
>>>
>>> My guess would be that something went wrong in the linear map setup,
>>> but it
>>> won't hurt running with "memblock=debug" added to the kernel command
>>> line
>>> to see if there is anything suspicious there.
>>
>> Here is boot log on serial console with memblock=debug command line:
>>
> ...
>>
>> Do you need something more for debug?
>
> Can you send me the 'vmlinux' used to generate the above Oops so that I
> can see exactly where we are in function mem_init().
>
> And could you also try without CONFIG_HIGHMEM just in case.
>
I looked at the vmlinux you sent me, the problem is in the loop for
highmem in mem_init(). It crashes in the call to free_highmem_page()
#ifdef CONFIG_HIGHMEM
{
unsigned long pfn, highmem_mapnr;
highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
struct page *page = pfn_to_page(pfn);
if (!memblock_is_reserved(paddr))
free_highmem_page(page);
}
}
#endif /* CONFIG_HIGHMEM */
As far as I can see in the memblock debug lines, the holes don't seem to
be marked as reserved by memblock. So it is above valid ? Other
architectures seem to do differently.
Can you try by replacing !memblock_is_reserved(paddr) by
memblock_is_memory(paddr) ?
Thanks
Christophe
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-13 12:36 ` Christophe Leroy
0 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-13 12:36 UTC (permalink / raw)
To: Pali Rohár, Mike Rapoport
Cc: linux-kernel, linux-mm, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
>
>
> Le 12/09/2022 à 23:16, Pali Rohár a écrit :
>>>
>>> My guess would be that something went wrong in the linear map setup,
>>> but it
>>> won't hurt running with "memblock=debug" added to the kernel command
>>> line
>>> to see if there is anything suspicious there.
>>
>> Here is boot log on serial console with memblock=debug command line:
>>
> ...
>>
>> Do you need something more for debug?
>
> Can you send me the 'vmlinux' used to generate the above Oops so that I
> can see exactly where we are in function mem_init().
>
> And could you also try without CONFIG_HIGHMEM just in case.
>
I looked at the vmlinux you sent me, the problem is in the loop for
highmem in mem_init(). It crashes in the call to free_highmem_page()
#ifdef CONFIG_HIGHMEM
{
unsigned long pfn, highmem_mapnr;
highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
struct page *page = pfn_to_page(pfn);
if (!memblock_is_reserved(paddr))
free_highmem_page(page);
}
}
#endif /* CONFIG_HIGHMEM */
As far as I can see in the memblock debug lines, the holes don't seem to
be marked as reserved by memblock. So it is above valid ? Other
architectures seem to do differently.
Can you try by replacing !memblock_is_reserved(paddr) by
memblock_is_memory(paddr) ?
Thanks
Christophe
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-13 12:36 ` Christophe Leroy
@ 2022-09-14 9:32 ` Mike Rapoport
-1 siblings, 0 replies; 170+ messages in thread
From: Mike Rapoport @ 2022-09-14 9:32 UTC (permalink / raw)
To: Christophe Leroy
Cc: Pali Rohár, Ash Logan, paulus, mpe, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne, linux-mm
On Tue, Sep 13, 2022 at 02:36:13PM +0200, Christophe Leroy wrote:
>
>
> Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
> >
> >
> > Le 12/09/2022 à 23:16, Pali Rohár a écrit :
> > > >
> > > > My guess would be that something went wrong in the linear map
> > > > setup, but it
> > > > won't hurt running with "memblock=debug" added to the kernel
> > > > command line
> > > > to see if there is anything suspicious there.
> > >
> > > Here is boot log on serial console with memblock=debug command line:
> > >
> > ...
> > >
> > > Do you need something more for debug?
> >
> > Can you send me the 'vmlinux' used to generate the above Oops so that I
> > can see exactly where we are in function mem_init().
> >
> > And could you also try without CONFIG_HIGHMEM just in case.
> >
>
> I looked at the vmlinux you sent me, the problem is in the loop for highmem
> in mem_init(). It crashes in the call to free_highmem_page()
>
> #ifdef CONFIG_HIGHMEM
> {
> unsigned long pfn, highmem_mapnr;
>
> highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
> for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
> phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
> struct page *page = pfn_to_page(pfn);
> if (!memblock_is_reserved(paddr))
> free_highmem_page(page);
> }
> }
> #endif /* CONFIG_HIGHMEM */
>
>
> As far as I can see in the memblock debug lines, the holes don't seem to be
> marked as reserved by memblock. So it is above valid ? Other architectures
> seem to do differently.
>
> Can you try by replacing !memblock_is_reserved(paddr) by
> memblock_is_memory(paddr) ?
The holes should not be marked as reserved, we just need to loop over the
memory ranges rather than over pfns. Then the holes will be taken into
account.
I believe arm and xtensa got this right:
(from arch/arm/mm/init.c)
static void __init free_highpages(void)
{
#ifdef CONFIG_HIGHMEM
unsigned long max_low = max_low_pfn;
phys_addr_t range_start, range_end;
u64 i;
/* set highmem page free */
for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,
&range_start, &range_end, NULL) {
unsigned long start = PFN_UP(range_start);
unsigned long end = PFN_DOWN(range_end);
/* Ignore complete lowmem entries */
if (end <= max_low)
continue;
/* Truncate partial highmem entries */
if (start < max_low)
start = max_low;
for (; start < end; start++)
free_highmem_page(pfn_to_page(start));
}
#endif
}
> Thanks
> Christophe
>
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-14 9:32 ` Mike Rapoport
0 siblings, 0 replies; 170+ messages in thread
From: Mike Rapoport @ 2022-09-14 9:32 UTC (permalink / raw)
To: Christophe Leroy
Cc: linuxppc-dev, linux-kernel, linux-mm, robh+dt, paulus, Ash Logan,
Pali Rohár, j.ne
On Tue, Sep 13, 2022 at 02:36:13PM +0200, Christophe Leroy wrote:
>
>
> Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
> >
> >
> > Le 12/09/2022 à 23:16, Pali Rohár a écrit :
> > > >
> > > > My guess would be that something went wrong in the linear map
> > > > setup, but it
> > > > won't hurt running with "memblock=debug" added to the kernel
> > > > command line
> > > > to see if there is anything suspicious there.
> > >
> > > Here is boot log on serial console with memblock=debug command line:
> > >
> > ...
> > >
> > > Do you need something more for debug?
> >
> > Can you send me the 'vmlinux' used to generate the above Oops so that I
> > can see exactly where we are in function mem_init().
> >
> > And could you also try without CONFIG_HIGHMEM just in case.
> >
>
> I looked at the vmlinux you sent me, the problem is in the loop for highmem
> in mem_init(). It crashes in the call to free_highmem_page()
>
> #ifdef CONFIG_HIGHMEM
> {
> unsigned long pfn, highmem_mapnr;
>
> highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
> for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
> phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
> struct page *page = pfn_to_page(pfn);
> if (!memblock_is_reserved(paddr))
> free_highmem_page(page);
> }
> }
> #endif /* CONFIG_HIGHMEM */
>
>
> As far as I can see in the memblock debug lines, the holes don't seem to be
> marked as reserved by memblock. So it is above valid ? Other architectures
> seem to do differently.
>
> Can you try by replacing !memblock_is_reserved(paddr) by
> memblock_is_memory(paddr) ?
The holes should not be marked as reserved, we just need to loop over the
memory ranges rather than over pfns. Then the holes will be taken into
account.
I believe arm and xtensa got this right:
(from arch/arm/mm/init.c)
static void __init free_highpages(void)
{
#ifdef CONFIG_HIGHMEM
unsigned long max_low = max_low_pfn;
phys_addr_t range_start, range_end;
u64 i;
/* set highmem page free */
for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,
&range_start, &range_end, NULL) {
unsigned long start = PFN_UP(range_start);
unsigned long end = PFN_DOWN(range_end);
/* Ignore complete lowmem entries */
if (end <= max_low)
continue;
/* Truncate partial highmem entries */
if (start < max_low)
start = max_low;
for (; start < end; start++)
free_highmem_page(pfn_to_page(start));
}
#endif
}
> Thanks
> Christophe
>
--
Sincerely yours,
Mike.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-14 9:32 ` Mike Rapoport
@ 2022-09-14 9:43 ` Christophe Leroy
-1 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-14 9:43 UTC (permalink / raw)
To: Mike Rapoport
Cc: Pali Rohár, Ash Logan, paulus, mpe, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne, linux-mm
Le 14/09/2022 à 11:32, Mike Rapoport a écrit :
> On Tue, Sep 13, 2022 at 02:36:13PM +0200, Christophe Leroy wrote:
>>
>>
>> Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
>>>
>>>
>>> Le 12/09/2022 à 23:16, Pali Rohár a écrit :
>>>>>
>>>>> My guess would be that something went wrong in the linear map
>>>>> setup, but it
>>>>> won't hurt running with "memblock=debug" added to the kernel
>>>>> command line
>>>>> to see if there is anything suspicious there.
>>>>
>>>> Here is boot log on serial console with memblock=debug command line:
>>>>
>>> ...
>>>>
>>>> Do you need something more for debug?
>>>
>>> Can you send me the 'vmlinux' used to generate the above Oops so that I
>>> can see exactly where we are in function mem_init().
>>>
>>> And could you also try without CONFIG_HIGHMEM just in case.
>>>
>>
>> I looked at the vmlinux you sent me, the problem is in the loop for highmem
>> in mem_init(). It crashes in the call to free_highmem_page()
>>
>> #ifdef CONFIG_HIGHMEM
>> {
>> unsigned long pfn, highmem_mapnr;
>>
>> highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
>> for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
>> phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
>> struct page *page = pfn_to_page(pfn);
>> if (!memblock_is_reserved(paddr))
>> free_highmem_page(page);
>> }
>> }
>> #endif /* CONFIG_HIGHMEM */
>>
>>
>> As far as I can see in the memblock debug lines, the holes don't seem to be
>> marked as reserved by memblock. So it is above valid ? Other architectures
>> seem to do differently.
>>
>> Can you try by replacing !memblock_is_reserved(paddr) by
>> memblock_is_memory(paddr) ?
>
> The holes should not be marked as reserved, we just need to loop over the
> memory ranges rather than over pfns. Then the holes will be taken into
> account.
>
> I believe arm and xtensa got this right:
>
> (from arch/arm/mm/init.c)
>
> static void __init free_highpages(void)
> {
> #ifdef CONFIG_HIGHMEM
> unsigned long max_low = max_low_pfn;
> phys_addr_t range_start, range_end;
> u64 i;
>
> /* set highmem page free */
> for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,
> &range_start, &range_end, NULL) {
> unsigned long start = PFN_UP(range_start);
> unsigned long end = PFN_DOWN(range_end);
>
> /* Ignore complete lowmem entries */
> if (end <= max_low)
> continue;
>
> /* Truncate partial highmem entries */
> if (start < max_low)
> start = max_low;
>
> for (; start < end; start++)
> free_highmem_page(pfn_to_page(start));
> }
> #endif
> }
>
And what about the way MIPS does it ?
static inline void __init mem_init_free_highmem(void)
{
#ifdef CONFIG_HIGHMEM
unsigned long tmp;
if (cpu_has_dc_aliases)
return;
for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
struct page *page = pfn_to_page(tmp);
if (!memblock_is_memory(PFN_PHYS(tmp)))
SetPageReserved(page);
else
free_highmem_page(page);
}
#endif
}
Christophe
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-14 9:43 ` Christophe Leroy
0 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-09-14 9:43 UTC (permalink / raw)
To: Mike Rapoport
Cc: linuxppc-dev, linux-kernel, linux-mm, robh+dt, paulus, Ash Logan,
Pali Rohár, j.ne
Le 14/09/2022 à 11:32, Mike Rapoport a écrit :
> On Tue, Sep 13, 2022 at 02:36:13PM +0200, Christophe Leroy wrote:
>>
>>
>> Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
>>>
>>>
>>> Le 12/09/2022 à 23:16, Pali Rohár a écrit :
>>>>>
>>>>> My guess would be that something went wrong in the linear map
>>>>> setup, but it
>>>>> won't hurt running with "memblock=debug" added to the kernel
>>>>> command line
>>>>> to see if there is anything suspicious there.
>>>>
>>>> Here is boot log on serial console with memblock=debug command line:
>>>>
>>> ...
>>>>
>>>> Do you need something more for debug?
>>>
>>> Can you send me the 'vmlinux' used to generate the above Oops so that I
>>> can see exactly where we are in function mem_init().
>>>
>>> And could you also try without CONFIG_HIGHMEM just in case.
>>>
>>
>> I looked at the vmlinux you sent me, the problem is in the loop for highmem
>> in mem_init(). It crashes in the call to free_highmem_page()
>>
>> #ifdef CONFIG_HIGHMEM
>> {
>> unsigned long pfn, highmem_mapnr;
>>
>> highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
>> for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
>> phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
>> struct page *page = pfn_to_page(pfn);
>> if (!memblock_is_reserved(paddr))
>> free_highmem_page(page);
>> }
>> }
>> #endif /* CONFIG_HIGHMEM */
>>
>>
>> As far as I can see in the memblock debug lines, the holes don't seem to be
>> marked as reserved by memblock. So it is above valid ? Other architectures
>> seem to do differently.
>>
>> Can you try by replacing !memblock_is_reserved(paddr) by
>> memblock_is_memory(paddr) ?
>
> The holes should not be marked as reserved, we just need to loop over the
> memory ranges rather than over pfns. Then the holes will be taken into
> account.
>
> I believe arm and xtensa got this right:
>
> (from arch/arm/mm/init.c)
>
> static void __init free_highpages(void)
> {
> #ifdef CONFIG_HIGHMEM
> unsigned long max_low = max_low_pfn;
> phys_addr_t range_start, range_end;
> u64 i;
>
> /* set highmem page free */
> for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,
> &range_start, &range_end, NULL) {
> unsigned long start = PFN_UP(range_start);
> unsigned long end = PFN_DOWN(range_end);
>
> /* Ignore complete lowmem entries */
> if (end <= max_low)
> continue;
>
> /* Truncate partial highmem entries */
> if (start < max_low)
> start = max_low;
>
> for (; start < end; start++)
> free_highmem_page(pfn_to_page(start));
> }
> #endif
> }
>
And what about the way MIPS does it ?
static inline void __init mem_init_free_highmem(void)
{
#ifdef CONFIG_HIGHMEM
unsigned long tmp;
if (cpu_has_dc_aliases)
return;
for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
struct page *page = pfn_to_page(tmp);
if (!memblock_is_memory(PFN_PHYS(tmp)))
SetPageReserved(page);
else
free_highmem_page(page);
}
#endif
}
Christophe
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-14 9:43 ` Christophe Leroy
@ 2022-09-14 15:55 ` Mike Rapoport
-1 siblings, 0 replies; 170+ messages in thread
From: Mike Rapoport @ 2022-09-14 15:55 UTC (permalink / raw)
To: Christophe Leroy
Cc: Pali Rohár, Ash Logan, paulus, mpe, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne, linux-mm
On September 14, 2022 10:43:52 AM GMT+01:00, Christophe Leroy <christophe.leroy@csgroup.eu> wrote:
>
>
>Le 14/09/2022 à 11:32, Mike Rapoport a écrit :
>> On Tue, Sep 13, 2022 at 02:36:13PM +0200, Christophe Leroy wrote:
>>>
>>>
>>> Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
>>>>
>>>>
>>>> Le 12/09/2022 à 23:16, Pali Rohár a écrit :
>>>>>>
>>>>>> My guess would be that something went wrong in the linear map
>>>>>> setup, but it
>>>>>> won't hurt running with "memblock=debug" added to the kernel
>>>>>> command line
>>>>>> to see if there is anything suspicious there.
>>>>>
>>>>> Here is boot log on serial console with memblock=debug command line:
>>>>>
>>>> ...
>>>>>
>>>>> Do you need something more for debug?
>>>>
>>>> Can you send me the 'vmlinux' used to generate the above Oops so that I
>>>> can see exactly where we are in function mem_init().
>>>>
>>>> And could you also try without CONFIG_HIGHMEM just in case.
>>>>
>>>
>>> I looked at the vmlinux you sent me, the problem is in the loop for highmem
>>> in mem_init(). It crashes in the call to free_highmem_page()
>>>
>>> #ifdef CONFIG_HIGHMEM
>>> {
>>> unsigned long pfn, highmem_mapnr;
>>>
>>> highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
>>> for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
>>> phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
>>> struct page *page = pfn_to_page(pfn);
>>> if (!memblock_is_reserved(paddr))
>>> free_highmem_page(page);
>>> }
>>> }
>>> #endif /* CONFIG_HIGHMEM */
>>>
>>>
>>> As far as I can see in the memblock debug lines, the holes don't seem to be
>>> marked as reserved by memblock. So it is above valid ? Other architectures
>>> seem to do differently.
>>>
>>> Can you try by replacing !memblock_is_reserved(paddr) by
>>> memblock_is_memory(paddr) ?
>>
>> The holes should not be marked as reserved, we just need to loop over the
>> memory ranges rather than over pfns. Then the holes will be taken into
>> account.
>>
>> I believe arm and xtensa got this right:
>>
>> (from arch/arm/mm/init.c)
>>
>> static void __init free_highpages(void)
>> {
>> #ifdef CONFIG_HIGHMEM
>> unsigned long max_low = max_low_pfn;
>> phys_addr_t range_start, range_end;
>> u64 i;
>>
>> /* set highmem page free */
>> for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,
>> &range_start, &range_end, NULL) {
>> unsigned long start = PFN_UP(range_start);
>> unsigned long end = PFN_DOWN(range_end);
>>
>> /* Ignore complete lowmem entries */
>> if (end <= max_low)
>> continue;
>>
>> /* Truncate partial highmem entries */
>> if (start < max_low)
>> start = max_low;
>>
>> for (; start < end; start++)
>> free_highmem_page(pfn_to_page(start));
>> }
>> #endif
>> }
>>
>
>
>And what about the way MIPS does it ?
>
>static inline void __init mem_init_free_highmem(void)
>{
>#ifdef CONFIG_HIGHMEM
> unsigned long tmp;
>
> if (cpu_has_dc_aliases)
> return;
>
> for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
> struct page *page = pfn_to_page(tmp);
>
> if (!memblock_is_memory(PFN_PHYS(tmp)))
> SetPageReserved(page);
> else
> free_highmem_page(page);
> }
>#endif
>}
This iterates over all PFNs in the highmem range and skips those in holes.
for_each_free_mem_range() skips the holes altogether.
Largely, I think we need to move, say, arm's version to mm/ and use it everywhere, except, perhaps, x86.
>Christophe
--
Sincerely yours,
Mike
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-14 15:55 ` Mike Rapoport
0 siblings, 0 replies; 170+ messages in thread
From: Mike Rapoport @ 2022-09-14 15:55 UTC (permalink / raw)
To: Christophe Leroy
Cc: linuxppc-dev, linux-kernel, linux-mm, robh+dt, paulus, Ash Logan,
Pali Rohár, j.ne
On September 14, 2022 10:43:52 AM GMT+01:00, Christophe Leroy <christophe.leroy@csgroup.eu> wrote:
>
>
>Le 14/09/2022 à 11:32, Mike Rapoport a écrit :
>> On Tue, Sep 13, 2022 at 02:36:13PM +0200, Christophe Leroy wrote:
>>>
>>>
>>> Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
>>>>
>>>>
>>>> Le 12/09/2022 à 23:16, Pali Rohár a écrit :
>>>>>>
>>>>>> My guess would be that something went wrong in the linear map
>>>>>> setup, but it
>>>>>> won't hurt running with "memblock=debug" added to the kernel
>>>>>> command line
>>>>>> to see if there is anything suspicious there.
>>>>>
>>>>> Here is boot log on serial console with memblock=debug command line:
>>>>>
>>>> ...
>>>>>
>>>>> Do you need something more for debug?
>>>>
>>>> Can you send me the 'vmlinux' used to generate the above Oops so that I
>>>> can see exactly where we are in function mem_init().
>>>>
>>>> And could you also try without CONFIG_HIGHMEM just in case.
>>>>
>>>
>>> I looked at the vmlinux you sent me, the problem is in the loop for highmem
>>> in mem_init(). It crashes in the call to free_highmem_page()
>>>
>>> #ifdef CONFIG_HIGHMEM
>>> {
>>> unsigned long pfn, highmem_mapnr;
>>>
>>> highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
>>> for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
>>> phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
>>> struct page *page = pfn_to_page(pfn);
>>> if (!memblock_is_reserved(paddr))
>>> free_highmem_page(page);
>>> }
>>> }
>>> #endif /* CONFIG_HIGHMEM */
>>>
>>>
>>> As far as I can see in the memblock debug lines, the holes don't seem to be
>>> marked as reserved by memblock. So it is above valid ? Other architectures
>>> seem to do differently.
>>>
>>> Can you try by replacing !memblock_is_reserved(paddr) by
>>> memblock_is_memory(paddr) ?
>>
>> The holes should not be marked as reserved, we just need to loop over the
>> memory ranges rather than over pfns. Then the holes will be taken into
>> account.
>>
>> I believe arm and xtensa got this right:
>>
>> (from arch/arm/mm/init.c)
>>
>> static void __init free_highpages(void)
>> {
>> #ifdef CONFIG_HIGHMEM
>> unsigned long max_low = max_low_pfn;
>> phys_addr_t range_start, range_end;
>> u64 i;
>>
>> /* set highmem page free */
>> for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,
>> &range_start, &range_end, NULL) {
>> unsigned long start = PFN_UP(range_start);
>> unsigned long end = PFN_DOWN(range_end);
>>
>> /* Ignore complete lowmem entries */
>> if (end <= max_low)
>> continue;
>>
>> /* Truncate partial highmem entries */
>> if (start < max_low)
>> start = max_low;
>>
>> for (; start < end; start++)
>> free_highmem_page(pfn_to_page(start));
>> }
>> #endif
>> }
>>
>
>
>And what about the way MIPS does it ?
>
>static inline void __init mem_init_free_highmem(void)
>{
>#ifdef CONFIG_HIGHMEM
> unsigned long tmp;
>
> if (cpu_has_dc_aliases)
> return;
>
> for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
> struct page *page = pfn_to_page(tmp);
>
> if (!memblock_is_memory(PFN_PHYS(tmp)))
> SetPageReserved(page);
> else
> free_highmem_page(page);
> }
>#endif
>}
This iterates over all PFNs in the highmem range and skips those in holes.
for_each_free_mem_range() skips the holes altogether.
Largely, I think we need to move, say, arm's version to mm/ and use it everywhere, except, perhaps, x86.
>Christophe
--
Sincerely yours,
Mike
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
2022-09-14 15:55 ` Mike Rapoport
@ 2022-09-14 19:56 ` Pali Rohár
-1 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-09-14 19:56 UTC (permalink / raw)
To: Mike Rapoport
Cc: Christophe Leroy, Ash Logan, paulus, mpe, robh+dt, benh,
linuxppc-dev, linux-kernel, j.ne, linux-mm
On Wednesday 14 September 2022 16:55:04 Mike Rapoport wrote:
> On September 14, 2022 10:43:52 AM GMT+01:00, Christophe Leroy <christophe.leroy@csgroup.eu> wrote:
> >
> >
> >Le 14/09/2022 à 11:32, Mike Rapoport a écrit :
> >> On Tue, Sep 13, 2022 at 02:36:13PM +0200, Christophe Leroy wrote:
> >>>
> >>>
> >>> Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
> >>>>
> >>>>
> >>>> Le 12/09/2022 à 23:16, Pali Rohár a écrit :
> >>>>>>
> >>>>>> My guess would be that something went wrong in the linear map
> >>>>>> setup, but it
> >>>>>> won't hurt running with "memblock=debug" added to the kernel
> >>>>>> command line
> >>>>>> to see if there is anything suspicious there.
> >>>>>
> >>>>> Here is boot log on serial console with memblock=debug command line:
> >>>>>
> >>>> ...
> >>>>>
> >>>>> Do you need something more for debug?
> >>>>
> >>>> Can you send me the 'vmlinux' used to generate the above Oops so that I
> >>>> can see exactly where we are in function mem_init().
> >>>>
> >>>> And could you also try without CONFIG_HIGHMEM just in case.
Hello! I disabled CONFIG_HIGHMEM and there is no crash anymore. But
kernel see only 761160 kB of RAM, which is less than 3GB. I guess this
is expected.
> >>>>
> >>>
> >>> I looked at the vmlinux you sent me, the problem is in the loop for highmem
> >>> in mem_init(). It crashes in the call to free_highmem_page()
> >>>
> >>> #ifdef CONFIG_HIGHMEM
> >>> {
> >>> unsigned long pfn, highmem_mapnr;
> >>>
> >>> highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
> >>> for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
> >>> phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
> >>> struct page *page = pfn_to_page(pfn);
> >>> if (!memblock_is_reserved(paddr))
> >>> free_highmem_page(page);
> >>> }
> >>> }
> >>> #endif /* CONFIG_HIGHMEM */
> >>>
> >>>
> >>> As far as I can see in the memblock debug lines, the holes don't seem to be
> >>> marked as reserved by memblock. So it is above valid ? Other architectures
> >>> seem to do differently.
> >>>
> >>> Can you try by replacing !memblock_is_reserved(paddr) by
> >>> memblock_is_memory(paddr) ?
I enabled CONFIG_HIGHMEM again, applied this change and kernel does not
crash too anymore. And it sees 3062896 kB of memory (in 'free' output).
So seems that this change fixed it.
I tried simple C program for allocating memory via malloc() and it
successfully allocated 2800 MB. If it tried to request/allocate more
then kernel started OOM killer which killed that program gracefully.
No kernel or HW crash.
Here is bootlog:
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x4 nid=-1 from=0x00000000 max_addr=0x00000000 smp_setup_cpu_maps+0x40/0x2b4
[ 0.000000] memblock_reserve: [0x2fff5d74-0x2fff5d7b] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] (thread shift is 0)
[ 0.000000] memblock_phys_free: [0x2fff5d74-0x2fff5d7b] setup_arch+0x1bc/0x318
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0xbe500000
[ 0.000000] dcache_bsize = 0x20
[ 0.000000] icache_bsize = 0x20
[ 0.000000] cpu_features = 0x0000000010010108
[ 0.000000] possible = 0x0000000010010108
[ 0.000000] always = 0x0000000010010108
[ 0.000000] cpu_user_features = 0x84e08000 0x08000000
[ 0.000000] mmu_features = 0x00020010
[ 0.000000] -----------------------------------------------------
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff2000-0x2fff3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff0000-0x2fff1fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffee000-0x2ffeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffec000-0x2ffedfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffea000-0x2ffebfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe8000-0x2ffe9fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe6000-0x2ffe7fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe4000-0x2ffe5fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe2000-0x2ffe3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe0000-0x2ffe1fff] memblock_alloc_range_nid+0xe8/0x1b0
mpc85xx_rdb_setup_arch()
[ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2fff4000-0x2fff4fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MPC85xx RDB board from Freescale Semiconductor
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 182 locations
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2ffdf000-0x2ffdffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
[ 0.000000] Memory hole size: 1042MB
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
[ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
[ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
[ 0.000000] memblock_alloc_try_nid_raw: 37675008 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 free_area_init+0x890/0xc94
[ 0.000000] memblock_reserve: [0x2dbf1000-0x2ffdefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5d00-0x2fff5d5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 416 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5b60-0x2fff5cff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x38/0x154
[ 0.000000] memblock_reserve: [0x2fff5b40-0x2fff5b5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 1024 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x7c/0x154
[ 0.000000] memblock_reserve: [0x2fff5740-0x2fff5b3f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0xc4/0x154
[ 0.000000] memblock_reserve: [0x2fff5720-0x2fff573f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] memblock_alloc_try_nid: 111 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x194/0x6d0
[ 0.000000] memblock_reserve: [0x2fff56a0-0x2fff570e] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 111 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x1c0/0x6d0
[ 0.000000] memblock_reserve: [0x2fff5620-0x2fff568e] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x314/0x7b4
[ 0.000000] memblock_reserve: [0x2dbf0000-0x2dbf0fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x4d4/0x7b4
[ 0.000000] memblock_reserve: [0x2dbef000-0x2dbeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 90112 bytes align=0x1000 nid=-1 from=0x3fffffff max_addr=0x00000000 pcpu_embed_first_chunk+0x564/0x7b4
[ 0.000000] memblock_reserve: [0x2dbd9000-0x2dbeefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbe4000-0x2dbe3fff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeefff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x37c/0x924
[ 0.000000] memblock_reserve: [0x2fff5d60-0x2fff5d63] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3a4/0x924
[ 0.000000] memblock_reserve: [0x2fff5600-0x2fff5603] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3cc/0x924
[ 0.000000] memblock_reserve: [0x2fff55e0-0x2fff55e7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3f4/0x924
[ 0.000000] memblock_reserve: [0x2fff55c0-0x2fff55c7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] memblock_alloc_try_nid: 136 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x7fc/0x924
[ 0.000000] memblock_reserve: [0x2fff5520-0x2fff55a7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff54c0-0x2fff551f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 384 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5340-0x2fff54bf] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 388 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2fff51a0-0x2fff5323] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5140-0x2fff519f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff50e0-0x2fff513f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 768 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd8d00-0x2dbd8fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 772 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd89e0-0x2dbd8ce3] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 192 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5020-0x2fff50df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbf0000-0x2dbf0fff] pcpu_embed_first_chunk+0x744/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeffff] pcpu_embed_first_chunk+0x754/0x7b4
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
[ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs rootflags=chk_data_crc rw console=ttyS0,115200 memblock=debug
[ 0.000000] memblock_alloc_try_nid: 524288 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db589e0-0x2dbd89df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] memblock_alloc_try_nid: 262144 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db189e0-0x2db589df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Kernel virtual memory layout:
[ 0.000000] * 0xffbbf000..0xfffff000 : fixmap
[ 0.000000] * 0xff400000..0xff800000 : highmem PTEs
[ 0.000000] * 0xff3fe000..0xff400000 : early ioremap
[ 0.000000] * 0xf1000000..0xff3fe000 : vmalloc & ioremap
[ 0.000000] Memory: 3062620K/3118080K available (10732K kernel code, 712K rwdata, 2044K rodata, 276K init, 287K bss, 55460K reserved, 0K cma-reserved, 2331648K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
> >>
> >> The holes should not be marked as reserved, we just need to loop over the
> >> memory ranges rather than over pfns. Then the holes will be taken into
> >> account.
> >>
> >> I believe arm and xtensa got this right:
> >>
> >> (from arch/arm/mm/init.c)
> >>
> >> static void __init free_highpages(void)
> >> {
> >> #ifdef CONFIG_HIGHMEM
> >> unsigned long max_low = max_low_pfn;
> >> phys_addr_t range_start, range_end;
> >> u64 i;
> >>
> >> /* set highmem page free */
> >> for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,
> >> &range_start, &range_end, NULL) {
> >> unsigned long start = PFN_UP(range_start);
> >> unsigned long end = PFN_DOWN(range_end);
> >>
> >> /* Ignore complete lowmem entries */
> >> if (end <= max_low)
> >> continue;
> >>
> >> /* Truncate partial highmem entries */
> >> if (start < max_low)
> >> start = max_low;
> >>
> >> for (; start < end; start++)
> >> free_highmem_page(pfn_to_page(start));
> >> }
> >> #endif
> >> }
> >>
> >
> >
> >And what about the way MIPS does it ?
> >
> >static inline void __init mem_init_free_highmem(void)
> >{
> >#ifdef CONFIG_HIGHMEM
> > unsigned long tmp;
> >
> > if (cpu_has_dc_aliases)
> > return;
> >
> > for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
> > struct page *page = pfn_to_page(tmp);
> >
> > if (!memblock_is_memory(PFN_PHYS(tmp)))
> > SetPageReserved(page);
> > else
> > free_highmem_page(page);
> > }
> >#endif
> >}
>
> This iterates over all PFNs in the highmem range and skips those in holes.
> for_each_free_mem_range() skips the holes altogether.
>
> Largely, I think we need to move, say, arm's version to mm/ and use it everywhere, except, perhaps, x86.
I tried to replace quoted powerpc CONFIG_HIGHMEM code by above arm code
and it worked fine too! No kernel crash anymore. But 'free' see only
3062888 kB of total memory. Which is less then with the first
workaround.
Here is bootlog:
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x4 nid=-1 from=0x00000000 max_addr=0x00000000 smp_setup_cpu_maps+0x40/0x2b4
[ 0.000000] memblock_reserve: [0x2fff5d74-0x2fff5d7b] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] (thread shift is 0)
[ 0.000000] memblock_phys_free: [0x2fff5d74-0x2fff5d7b] setup_arch+0x1bc/0x318
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0xbe500000
[ 0.000000] dcache_bsize = 0x20
[ 0.000000] icache_bsize = 0x20
[ 0.000000] cpu_features = 0x0000000010010108
[ 0.000000] possible = 0x0000000010010108
[ 0.000000] always = 0x0000000010010108
[ 0.000000] cpu_user_features = 0x84e08000 0x08000000
[ 0.000000] mmu_features = 0x00020010
[ 0.000000] -----------------------------------------------------
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff2000-0x2fff3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff0000-0x2fff1fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffee000-0x2ffeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffec000-0x2ffedfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffea000-0x2ffebfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe8000-0x2ffe9fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe6000-0x2ffe7fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe4000-0x2ffe5fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe2000-0x2ffe3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe0000-0x2ffe1fff] memblock_alloc_range_nid+0xe8/0x1b0
mpc85xx_rdb_setup_arch()
[ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2fff4000-0x2fff4fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MPC85xx RDB board from Freescale Semiconductor
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 182 locations
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2ffdf000-0x2ffdffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
[ 0.000000] Memory hole size: 1042MB
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
[ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
[ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
[ 0.000000] memblock_alloc_try_nid_raw: 37675008 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 free_area_init+0x890/0xc94
[ 0.000000] memblock_reserve: [0x2dbf1000-0x2ffdefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5d00-0x2fff5d5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 416 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5b60-0x2fff5cff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x38/0x154
[ 0.000000] memblock_reserve: [0x2fff5b40-0x2fff5b5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 1024 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x7c/0x154
[ 0.000000] memblock_reserve: [0x2fff5740-0x2fff5b3f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0xc4/0x154
[ 0.000000] memblock_reserve: [0x2fff5720-0x2fff573f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] memblock_alloc_try_nid: 111 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x194/0x6d0
[ 0.000000] memblock_reserve: [0x2fff56a0-0x2fff570e] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 111 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x1c0/0x6d0
[ 0.000000] memblock_reserve: [0x2fff5620-0x2fff568e] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x314/0x7b4
[ 0.000000] memblock_reserve: [0x2dbf0000-0x2dbf0fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x4d4/0x7b4
[ 0.000000] memblock_reserve: [0x2dbef000-0x2dbeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 90112 bytes align=0x1000 nid=-1 from=0x3fffffff max_addr=0x00000000 pcpu_embed_first_chunk+0x564/0x7b4
[ 0.000000] memblock_reserve: [0x2dbd9000-0x2dbeefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbe4000-0x2dbe3fff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeefff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x37c/0x924
[ 0.000000] memblock_reserve: [0x2fff5d60-0x2fff5d63] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3a4/0x924
[ 0.000000] memblock_reserve: [0x2fff5600-0x2fff5603] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3cc/0x924
[ 0.000000] memblock_reserve: [0x2fff55e0-0x2fff55e7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3f4/0x924
[ 0.000000] memblock_reserve: [0x2fff55c0-0x2fff55c7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] memblock_alloc_try_nid: 136 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x7fc/0x924
[ 0.000000] memblock_reserve: [0x2fff5520-0x2fff55a7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff54c0-0x2fff551f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 384 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5340-0x2fff54bf] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 388 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2fff51a0-0x2fff5323] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5140-0x2fff519f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff50e0-0x2fff513f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 768 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd8d00-0x2dbd8fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 772 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd89e0-0x2dbd8ce3] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 192 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5020-0x2fff50df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbf0000-0x2dbf0fff] pcpu_embed_first_chunk+0x744/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeffff] pcpu_embed_first_chunk+0x754/0x7b4
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
[ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs rootflags=chk_data_crc rw console=ttyS0,115200 memblock=debug
[ 0.000000] memblock_alloc_try_nid: 524288 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db589e0-0x2dbd89df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] memblock_alloc_try_nid: 262144 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db189e0-0x2db589df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Kernel virtual memory layout:
[ 0.000000] * 0xffbbf000..0xfffff000 : fixmap
[ 0.000000] * 0xff400000..0xff800000 : highmem PTEs
[ 0.000000] * 0xff3fe000..0xff400000 : early ioremap
[ 0.000000] * 0xf1000000..0xff3fe000 : vmalloc & ioremap
[ 0.000000] Memory: 3062612K/3118080K available (10732K kernel code, 712K rwdata, 2044K rodata, 276K init, 287K bss, 55468K reserved, 0K cma-reserved, 2331640K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
> >Christophe
> --
> Sincerely yours,
> Mike
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: Fragmented physical memory on powerpc/32
@ 2022-09-14 19:56 ` Pali Rohár
0 siblings, 0 replies; 170+ messages in thread
From: Pali Rohár @ 2022-09-14 19:56 UTC (permalink / raw)
To: Mike Rapoport
Cc: linux-kernel, linux-mm, robh+dt, paulus, Ash Logan, linuxppc-dev, j.ne
On Wednesday 14 September 2022 16:55:04 Mike Rapoport wrote:
> On September 14, 2022 10:43:52 AM GMT+01:00, Christophe Leroy <christophe.leroy@csgroup.eu> wrote:
> >
> >
> >Le 14/09/2022 à 11:32, Mike Rapoport a écrit :
> >> On Tue, Sep 13, 2022 at 02:36:13PM +0200, Christophe Leroy wrote:
> >>>
> >>>
> >>> Le 13/09/2022 à 08:11, Christophe Leroy a écrit :
> >>>>
> >>>>
> >>>> Le 12/09/2022 à 23:16, Pali Rohár a écrit :
> >>>>>>
> >>>>>> My guess would be that something went wrong in the linear map
> >>>>>> setup, but it
> >>>>>> won't hurt running with "memblock=debug" added to the kernel
> >>>>>> command line
> >>>>>> to see if there is anything suspicious there.
> >>>>>
> >>>>> Here is boot log on serial console with memblock=debug command line:
> >>>>>
> >>>> ...
> >>>>>
> >>>>> Do you need something more for debug?
> >>>>
> >>>> Can you send me the 'vmlinux' used to generate the above Oops so that I
> >>>> can see exactly where we are in function mem_init().
> >>>>
> >>>> And could you also try without CONFIG_HIGHMEM just in case.
Hello! I disabled CONFIG_HIGHMEM and there is no crash anymore. But
kernel see only 761160 kB of RAM, which is less than 3GB. I guess this
is expected.
> >>>>
> >>>
> >>> I looked at the vmlinux you sent me, the problem is in the loop for highmem
> >>> in mem_init(). It crashes in the call to free_highmem_page()
> >>>
> >>> #ifdef CONFIG_HIGHMEM
> >>> {
> >>> unsigned long pfn, highmem_mapnr;
> >>>
> >>> highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
> >>> for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
> >>> phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
> >>> struct page *page = pfn_to_page(pfn);
> >>> if (!memblock_is_reserved(paddr))
> >>> free_highmem_page(page);
> >>> }
> >>> }
> >>> #endif /* CONFIG_HIGHMEM */
> >>>
> >>>
> >>> As far as I can see in the memblock debug lines, the holes don't seem to be
> >>> marked as reserved by memblock. So it is above valid ? Other architectures
> >>> seem to do differently.
> >>>
> >>> Can you try by replacing !memblock_is_reserved(paddr) by
> >>> memblock_is_memory(paddr) ?
I enabled CONFIG_HIGHMEM again, applied this change and kernel does not
crash too anymore. And it sees 3062896 kB of memory (in 'free' output).
So seems that this change fixed it.
I tried simple C program for allocating memory via malloc() and it
successfully allocated 2800 MB. If it tried to request/allocate more
then kernel started OOM killer which killed that program gracefully.
No kernel or HW crash.
Here is bootlog:
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x4 nid=-1 from=0x00000000 max_addr=0x00000000 smp_setup_cpu_maps+0x40/0x2b4
[ 0.000000] memblock_reserve: [0x2fff5d74-0x2fff5d7b] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] (thread shift is 0)
[ 0.000000] memblock_phys_free: [0x2fff5d74-0x2fff5d7b] setup_arch+0x1bc/0x318
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0xbe500000
[ 0.000000] dcache_bsize = 0x20
[ 0.000000] icache_bsize = 0x20
[ 0.000000] cpu_features = 0x0000000010010108
[ 0.000000] possible = 0x0000000010010108
[ 0.000000] always = 0x0000000010010108
[ 0.000000] cpu_user_features = 0x84e08000 0x08000000
[ 0.000000] mmu_features = 0x00020010
[ 0.000000] -----------------------------------------------------
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff2000-0x2fff3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff0000-0x2fff1fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffee000-0x2ffeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffec000-0x2ffedfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffea000-0x2ffebfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe8000-0x2ffe9fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe6000-0x2ffe7fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe4000-0x2ffe5fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe2000-0x2ffe3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe0000-0x2ffe1fff] memblock_alloc_range_nid+0xe8/0x1b0
mpc85xx_rdb_setup_arch()
[ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2fff4000-0x2fff4fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MPC85xx RDB board from Freescale Semiconductor
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 182 locations
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2ffdf000-0x2ffdffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
[ 0.000000] Memory hole size: 1042MB
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
[ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
[ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
[ 0.000000] memblock_alloc_try_nid_raw: 37675008 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 free_area_init+0x890/0xc94
[ 0.000000] memblock_reserve: [0x2dbf1000-0x2ffdefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5d00-0x2fff5d5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 416 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5b60-0x2fff5cff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x38/0x154
[ 0.000000] memblock_reserve: [0x2fff5b40-0x2fff5b5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 1024 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x7c/0x154
[ 0.000000] memblock_reserve: [0x2fff5740-0x2fff5b3f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0xc4/0x154
[ 0.000000] memblock_reserve: [0x2fff5720-0x2fff573f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] memblock_alloc_try_nid: 111 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x194/0x6d0
[ 0.000000] memblock_reserve: [0x2fff56a0-0x2fff570e] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 111 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x1c0/0x6d0
[ 0.000000] memblock_reserve: [0x2fff5620-0x2fff568e] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x314/0x7b4
[ 0.000000] memblock_reserve: [0x2dbf0000-0x2dbf0fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x4d4/0x7b4
[ 0.000000] memblock_reserve: [0x2dbef000-0x2dbeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 90112 bytes align=0x1000 nid=-1 from=0x3fffffff max_addr=0x00000000 pcpu_embed_first_chunk+0x564/0x7b4
[ 0.000000] memblock_reserve: [0x2dbd9000-0x2dbeefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbe4000-0x2dbe3fff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeefff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x37c/0x924
[ 0.000000] memblock_reserve: [0x2fff5d60-0x2fff5d63] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3a4/0x924
[ 0.000000] memblock_reserve: [0x2fff5600-0x2fff5603] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3cc/0x924
[ 0.000000] memblock_reserve: [0x2fff55e0-0x2fff55e7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3f4/0x924
[ 0.000000] memblock_reserve: [0x2fff55c0-0x2fff55c7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] memblock_alloc_try_nid: 136 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x7fc/0x924
[ 0.000000] memblock_reserve: [0x2fff5520-0x2fff55a7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff54c0-0x2fff551f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 384 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5340-0x2fff54bf] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 388 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2fff51a0-0x2fff5323] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5140-0x2fff519f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff50e0-0x2fff513f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 768 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd8d00-0x2dbd8fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 772 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd89e0-0x2dbd8ce3] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 192 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5020-0x2fff50df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbf0000-0x2dbf0fff] pcpu_embed_first_chunk+0x744/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeffff] pcpu_embed_first_chunk+0x754/0x7b4
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
[ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs rootflags=chk_data_crc rw console=ttyS0,115200 memblock=debug
[ 0.000000] memblock_alloc_try_nid: 524288 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db589e0-0x2dbd89df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] memblock_alloc_try_nid: 262144 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db189e0-0x2db589df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Kernel virtual memory layout:
[ 0.000000] * 0xffbbf000..0xfffff000 : fixmap
[ 0.000000] * 0xff400000..0xff800000 : highmem PTEs
[ 0.000000] * 0xff3fe000..0xff400000 : early ioremap
[ 0.000000] * 0xf1000000..0xff3fe000 : vmalloc & ioremap
[ 0.000000] Memory: 3062620K/3118080K available (10732K kernel code, 712K rwdata, 2044K rodata, 276K init, 287K bss, 55460K reserved, 0K cma-reserved, 2331648K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
> >>
> >> The holes should not be marked as reserved, we just need to loop over the
> >> memory ranges rather than over pfns. Then the holes will be taken into
> >> account.
> >>
> >> I believe arm and xtensa got this right:
> >>
> >> (from arch/arm/mm/init.c)
> >>
> >> static void __init free_highpages(void)
> >> {
> >> #ifdef CONFIG_HIGHMEM
> >> unsigned long max_low = max_low_pfn;
> >> phys_addr_t range_start, range_end;
> >> u64 i;
> >>
> >> /* set highmem page free */
> >> for_each_free_mem_range(i, NUMA_NO_NODE, MEMBLOCK_NONE,
> >> &range_start, &range_end, NULL) {
> >> unsigned long start = PFN_UP(range_start);
> >> unsigned long end = PFN_DOWN(range_end);
> >>
> >> /* Ignore complete lowmem entries */
> >> if (end <= max_low)
> >> continue;
> >>
> >> /* Truncate partial highmem entries */
> >> if (start < max_low)
> >> start = max_low;
> >>
> >> for (; start < end; start++)
> >> free_highmem_page(pfn_to_page(start));
> >> }
> >> #endif
> >> }
> >>
> >
> >
> >And what about the way MIPS does it ?
> >
> >static inline void __init mem_init_free_highmem(void)
> >{
> >#ifdef CONFIG_HIGHMEM
> > unsigned long tmp;
> >
> > if (cpu_has_dc_aliases)
> > return;
> >
> > for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
> > struct page *page = pfn_to_page(tmp);
> >
> > if (!memblock_is_memory(PFN_PHYS(tmp)))
> > SetPageReserved(page);
> > else
> > free_highmem_page(page);
> > }
> >#endif
> >}
>
> This iterates over all PFNs in the highmem range and skips those in holes.
> for_each_free_mem_range() skips the holes altogether.
>
> Largely, I think we need to move, say, arm's version to mm/ and use it everywhere, except, perhaps, x86.
I tried to replace quoted powerpc CONFIG_HIGHMEM code by above arm code
and it worked fine too! No kernel crash anymore. But 'free' see only
3062888 kB of total memory. Which is less then with the first
workaround.
Here is bootlog:
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x4 nid=-1 from=0x00000000 max_addr=0x00000000 smp_setup_cpu_maps+0x40/0x2b4
[ 0.000000] memblock_reserve: [0x2fff5d74-0x2fff5d7b] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] CPU maps initialized for 1 thread per core
[ 0.000000] (thread shift is 0)
[ 0.000000] memblock_phys_free: [0x2fff5d74-0x2fff5d7b] setup_arch+0x1bc/0x318
[ 0.000000] -----------------------------------------------------
[ 0.000000] phys_mem_size = 0xbe500000
[ 0.000000] dcache_bsize = 0x20
[ 0.000000] icache_bsize = 0x20
[ 0.000000] cpu_features = 0x0000000010010108
[ 0.000000] possible = 0x0000000010010108
[ 0.000000] always = 0x0000000010010108
[ 0.000000] cpu_user_features = 0x84e08000 0x08000000
[ 0.000000] mmu_features = 0x00020010
[ 0.000000] -----------------------------------------------------
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff2000-0x2fff3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2fff0000-0x2fff1fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffee000-0x2ffeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffec000-0x2ffedfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffea000-0x2ffebfff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe8000-0x2ffe9fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe6000-0x2ffe7fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe4000-0x2ffe5fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe2000-0x2ffe3fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8192 bytes align=0x2000 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_stack+0x2c/0x60
[ 0.000000] memblock_reserve: [0x2ffe0000-0x2ffe1fff] memblock_alloc_range_nid+0xe8/0x1b0
mpc85xx_rdb_setup_arch()
[ 0.000000] ioremap() called early from of_iomap+0x48/0x80. Use early_ioremap() instead
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2fff4000-0x2fff4fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MPC85xx RDB board from Freescale Semiconductor
[ 0.000000] barrier-nospec: using isync; sync as speculation barrier
[ 0.000000] barrier-nospec: patched 182 locations
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 early_pte_alloc_kernel+0x3c/0x90
[ 0.000000] memblock_reserve: [0x2ffdf000-0x2ffdffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Top of RAM: 0xff700000, Total RAM: 0xbe500000
[ 0.000000] Memory hole size: 1042MB
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000002fffffff]
[ 0.000000] HighMem [mem 0x0000000030000000-0x00000000ff6fffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000007fffffff]
[ 0.000000] node 0: [mem 0x00000000c0200000-0x00000000eeffffff]
[ 0.000000] node 0: [mem 0x00000000f0000000-0x00000000ff6fffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000ff6fffff]
[ 0.000000] memblock_alloc_try_nid_raw: 37675008 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 free_area_init+0x890/0xc94
[ 0.000000] memblock_reserve: [0x2dbf1000-0x2ffdefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5d00-0x2fff5d5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 416 bytes align=0x20 nid=0 from=0x00000000 max_addr=0x00000000 setup_usemap+0x60/0xa0
[ 0.000000] memblock_reserve: [0x2fff5b60-0x2fff5cff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x38/0x154
[ 0.000000] memblock_reserve: [0x2fff5b40-0x2fff5b5f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 1024 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0x7c/0x154
[ 0.000000] memblock_reserve: [0x2fff5740-0x2fff5b3f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 32 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 mmu_context_init+0xc4/0x154
[ 0.000000] memblock_reserve: [0x2fff5720-0x2fff573f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] MMU: Allocated 1088 bytes of context maps for 255 contexts
[ 0.000000] memblock_alloc_try_nid: 111 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x194/0x6d0
[ 0.000000] memblock_reserve: [0x2fff56a0-0x2fff570e] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 111 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 start_kernel+0x1c0/0x6d0
[ 0.000000] memblock_reserve: [0x2fff5620-0x2fff568e] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x1000 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x314/0x7b4
[ 0.000000] memblock_reserve: [0x2dbf0000-0x2dbf0fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4096 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_embed_first_chunk+0x4d4/0x7b4
[ 0.000000] memblock_reserve: [0x2dbef000-0x2dbeffff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 90112 bytes align=0x1000 nid=-1 from=0x3fffffff max_addr=0x00000000 pcpu_embed_first_chunk+0x564/0x7b4
[ 0.000000] memblock_reserve: [0x2dbd9000-0x2dbeefff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbe4000-0x2dbe3fff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeefff] pcpu_embed_first_chunk+0x680/0x7b4
[ 0.000000] percpu: Embedded 11 pages/cpu s14196 r8192 d22668 u45056
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x37c/0x924
[ 0.000000] memblock_reserve: [0x2fff5d60-0x2fff5d63] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 4 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3a4/0x924
[ 0.000000] memblock_reserve: [0x2fff5600-0x2fff5603] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3cc/0x924
[ 0.000000] memblock_reserve: [0x2fff55e0-0x2fff55e7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 8 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x3f4/0x924
[ 0.000000] memblock_reserve: [0x2fff55c0-0x2fff55c7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] pcpu-alloc: s14196 r8192 d22668 u45056 alloc=11*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1
[ 0.000000] memblock_alloc_try_nid: 136 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_setup_first_chunk+0x7fc/0x924
[ 0.000000] memblock_reserve: [0x2fff5520-0x2fff55a7] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff54c0-0x2fff551f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 384 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5340-0x2fff54bf] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 388 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2fff51a0-0x2fff5323] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5140-0x2fff519f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 96 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x64/0x2e0
[ 0.000000] memblock_reserve: [0x2fff50e0-0x2fff513f] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 768 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xc4/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd8d00-0x2dbd8fff] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 772 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0xf0/0x2e0
[ 0.000000] memblock_reserve: [0x2dbd89e0-0x2dbd8ce3] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_alloc_try_nid: 192 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 pcpu_alloc_first_chunk+0x11c/0x2e0
[ 0.000000] memblock_reserve: [0x2fff5020-0x2fff50df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] memblock_phys_free: [0x2dbf0000-0x2dbf0fff] pcpu_embed_first_chunk+0x744/0x7b4
[ 0.000000] memblock_phys_free: [0x2dbef000-0x2dbeffff] pcpu_embed_first_chunk+0x754/0x7b4
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 777792
[ 0.000000] Kernel command line: root=ubi0:rootfs rootfstype=ubifs ubi.mtd=rootfs rootflags=chk_data_crc rw console=ttyS0,115200 memblock=debug
[ 0.000000] memblock_alloc_try_nid: 524288 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db589e0-0x2dbd89df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes, linear)
[ 0.000000] memblock_alloc_try_nid: 262144 bytes align=0x20 nid=-1 from=0x00000000 max_addr=0x00000000 alloc_large_system_hash+0x1a4/0x2ec
[ 0.000000] memblock_reserve: [0x2db189e0-0x2db589df] memblock_alloc_range_nid+0xe8/0x1b0
[ 0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Kernel virtual memory layout:
[ 0.000000] * 0xffbbf000..0xfffff000 : fixmap
[ 0.000000] * 0xff400000..0xff800000 : highmem PTEs
[ 0.000000] * 0xff3fe000..0xff400000 : early ioremap
[ 0.000000] * 0xf1000000..0xff3fe000 : vmalloc & ioremap
[ 0.000000] Memory: 3062612K/3118080K available (10732K kernel code, 712K rwdata, 2044K rodata, 276K init, 287K bss, 55468K reserved, 0K cma-reserved, 2331640K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
> >Christophe
> --
> Sincerely yours,
> Mike
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 00/12] powerpc: Nintendo Wii U support
2022-06-28 13:31 ` Ash Logan
@ 2022-11-15 14:47 ` Christophe Leroy
-1 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-11-15 14:47 UTC (permalink / raw)
To: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, robh+dt, benh
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Hi,
Your series doesn't apply anymore, can you rebase ?
Thanks
Christophe
Le 28/06/2022 à 15:31, Ash Logan a écrit :
> The following patches add basic support for the Nintendo Wii U video
> game console, a PowerPC system somewhat similar to the GameCube and
> Wii.
>
> This includes:
> - devicetree source
> - bootwrapper support
> - udbg console to bootloader
> - early udbg console
> - interrupt controllers
> - platform support
> - recognition of the Espresso processor
> - workaround for the discontiguous RAM blocks
>
> This is enough to boot on hardware. dmesg pics (with a small hack to
> udbg-immortal, not included):
> Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
> Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
>
> For those who have hardware and would like to try these patches, some
> modification is required to the stock OS to allow Linux. For info:
> https://wiki.linux-wiiu.org/wiki/AdvancedSetup
>
> Some of the design choices (new platform > embedded6xx) were discussed
> previously:
> Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
>
> Turns out even less changes were needed than previously anticipated for
> discontiguous memory, and KUAP is yet to give trouble. Thanks to those
> who helped and discussed this.
>
> Changes since v2:
> - Fixed some overzealous deleting in the devicetree, oops.
> - Fixed missing declarations for some functions (thanks robots)
> - Fixed some checkpatch warnings.
> - Mark latte as a simple-bus and use of_platform_default_populate.
> Changes since v1:
> - Style and formatting tweaks to the devicetree, thanks Rob Herring for
> the review.
>
> Ash Logan (12):
> dt-bindings: wiiu: Document the Nintendo Wii U devicetree
> powerpc: wiiu: device tree
> powerpc: wiiu: bootwrapper support
> powerpc: wiiu: introduce wiiu platform
> powerpc: wiiu: declare as non-coherent
> powerpc: wiiu: udbg support for latteipc
> powerpc: wiiu: espresso interrupt controller support
> powerpc: wiiu: latte interrupt controller support
> powerpc: espresso processor support
> powerpc: wiiu: platform support
> powerpc: wiiu: don't enforce flat memory
> powerpc: wiiu: add minimal default config
>
> .../bindings/powerpc/nintendo/wiiu.yaml | 28 ++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 +++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++
> arch/powerpc/Kconfig.debug | 9 +
> arch/powerpc/boot/Makefile | 4 +
> arch/powerpc/boot/dts/wiiu.dts | 326 ++++++++++++++++++
> arch/powerpc/boot/wiiu-head.S | 103 ++++++
> arch/powerpc/boot/wiiu.c | 73 ++++
> arch/powerpc/boot/wrapper | 4 +
> arch/powerpc/configs/wiiu_defconfig | 7 +
> arch/powerpc/include/asm/udbg.h | 1 +
> arch/powerpc/kernel/cputable.c | 16 +
> arch/powerpc/kernel/head_book3s_32.S | 20 ++
> arch/powerpc/kernel/udbg.c | 3 +
> arch/powerpc/mm/init_32.c | 4 +-
> arch/powerpc/platforms/Kconfig | 1 +
> arch/powerpc/platforms/Kconfig.cputype | 2 +-
> arch/powerpc/platforms/Makefile | 1 +
> arch/powerpc/platforms/wiiu/Kconfig | 22 ++
> arch/powerpc/platforms/wiiu/Makefile | 4 +
> arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
> arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
> arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
> arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
> arch/powerpc/platforms/wiiu/setup.c | 60 ++++
> arch/powerpc/platforms/wiiu/udbg_latteipc.c | 124 +++++++
> arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
> 32 files changed, 1632 insertions(+), 3 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> create mode 100644 arch/powerpc/boot/dts/wiiu.dts
> create mode 100644 arch/powerpc/boot/wiiu-head.S
> create mode 100644 arch/powerpc/boot/wiiu.c
> create mode 100644 arch/powerpc/configs/wiiu_defconfig
> create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
> create mode 100644 arch/powerpc/platforms/wiiu/Makefile
> create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
> create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
> create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
> create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
> create mode 100644 arch/powerpc/platforms/wiiu/setup.c
> create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
> create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
>
>
> base-commit: 03c765b0e3b4cb5063276b086c76f7a612856a9a
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v3 00/12] powerpc: Nintendo Wii U support
@ 2022-11-15 14:47 ` Christophe Leroy
0 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2022-11-15 14:47 UTC (permalink / raw)
To: Ash Logan, krzysztof.kozlowski+dt, paulus, mpe, robh+dt, benh
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Hi,
Your series doesn't apply anymore, can you rebase ?
Thanks
Christophe
Le 28/06/2022 à 15:31, Ash Logan a écrit :
> The following patches add basic support for the Nintendo Wii U video
> game console, a PowerPC system somewhat similar to the GameCube and
> Wii.
>
> This includes:
> - devicetree source
> - bootwrapper support
> - udbg console to bootloader
> - early udbg console
> - interrupt controllers
> - platform support
> - recognition of the Espresso processor
> - workaround for the discontiguous RAM blocks
>
> This is enough to boot on hardware. dmesg pics (with a small hack to
> udbg-immortal, not included):
> Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
> Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
>
> For those who have hardware and would like to try these patches, some
> modification is required to the stock OS to allow Linux. For info:
> https://wiki.linux-wiiu.org/wiki/AdvancedSetup
>
> Some of the design choices (new platform > embedded6xx) were discussed
> previously:
> Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
>
> Turns out even less changes were needed than previously anticipated for
> discontiguous memory, and KUAP is yet to give trouble. Thanks to those
> who helped and discussed this.
>
> Changes since v2:
> - Fixed some overzealous deleting in the devicetree, oops.
> - Fixed missing declarations for some functions (thanks robots)
> - Fixed some checkpatch warnings.
> - Mark latte as a simple-bus and use of_platform_default_populate.
> Changes since v1:
> - Style and formatting tweaks to the devicetree, thanks Rob Herring for
> the review.
>
> Ash Logan (12):
> dt-bindings: wiiu: Document the Nintendo Wii U devicetree
> powerpc: wiiu: device tree
> powerpc: wiiu: bootwrapper support
> powerpc: wiiu: introduce wiiu platform
> powerpc: wiiu: declare as non-coherent
> powerpc: wiiu: udbg support for latteipc
> powerpc: wiiu: espresso interrupt controller support
> powerpc: wiiu: latte interrupt controller support
> powerpc: espresso processor support
> powerpc: wiiu: platform support
> powerpc: wiiu: don't enforce flat memory
> powerpc: wiiu: add minimal default config
>
> .../bindings/powerpc/nintendo/wiiu.yaml | 28 ++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 42 +++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 41 +++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 43 +++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 46 +++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 40 +++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 25 ++
> arch/powerpc/Kconfig.debug | 9 +
> arch/powerpc/boot/Makefile | 4 +
> arch/powerpc/boot/dts/wiiu.dts | 326 ++++++++++++++++++
> arch/powerpc/boot/wiiu-head.S | 103 ++++++
> arch/powerpc/boot/wiiu.c | 73 ++++
> arch/powerpc/boot/wrapper | 4 +
> arch/powerpc/configs/wiiu_defconfig | 7 +
> arch/powerpc/include/asm/udbg.h | 1 +
> arch/powerpc/kernel/cputable.c | 16 +
> arch/powerpc/kernel/head_book3s_32.S | 20 ++
> arch/powerpc/kernel/udbg.c | 3 +
> arch/powerpc/mm/init_32.c | 4 +-
> arch/powerpc/platforms/Kconfig | 1 +
> arch/powerpc/platforms/Kconfig.cputype | 2 +-
> arch/powerpc/platforms/Makefile | 1 +
> arch/powerpc/platforms/wiiu/Kconfig | 22 ++
> arch/powerpc/platforms/wiiu/Makefile | 4 +
> arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
> arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
> arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
> arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
> arch/powerpc/platforms/wiiu/setup.c | 60 ++++
> arch/powerpc/platforms/wiiu/udbg_latteipc.c | 124 +++++++
> arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
> 32 files changed, 1632 insertions(+), 3 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> create mode 100644 arch/powerpc/boot/dts/wiiu.dts
> create mode 100644 arch/powerpc/boot/wiiu-head.S
> create mode 100644 arch/powerpc/boot/wiiu.c
> create mode 100644 arch/powerpc/configs/wiiu_defconfig
> create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
> create mode 100644 arch/powerpc/platforms/wiiu/Makefile
> create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
> create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
> create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
> create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
> create mode 100644 arch/powerpc/platforms/wiiu/setup.c
> create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
> create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
>
>
> base-commit: 03c765b0e3b4cb5063276b086c76f7a612856a9a
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v4 00/11] powerpc: Nintendo Wii U support
2022-06-28 13:31 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
The following patches add basic support for the Nintendo Wii U video
game console, a PowerPC system somewhat similar to the GameCube and
Wii.
This includes:
- devicetree source
- bootwrapper support
- udbg console to bootloader
- early udbg console
- interrupt controllers
- platform support
- recognition of the Espresso processor
This is enough to boot on hardware. dmesg pics (with a small hack to
udbg-immortal, not included):
Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
For those who have hardware and would like to try these patches, some
modification is required to the stock OS to allow Linux. For info:
https://wiki.linux-wiiu.org/wiki/AdvancedSetup
Some of the design choices (new platform > embedded6xx) were discussed
previously:
Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
Turns out even less changes were needed than previously anticipated for
discontiguous memory, and KUAP is yet to give trouble. Thanks to those
who helped and discussed this.
Changes since v3:
- Reworked devicetree bindings - thanks Krzysztof Kozlowski for the review.
- Update devicetree source to match.
- Fixes to ensure patches apply to current source.
Changes since v2:
- Fixed some overzealous deleting in the devicetree, oops.
- Fixed missing declarations for some functions (thanks robots)
- Fixed some checkpatch warnings.
- Mark latte as a simple-bus and use of_platform_default_populate.
Changes since v1:
- Style and formatting tweaks to the devicetree, thanks Rob Herring for
the review.
Ash Logan (11):
dt-bindings: wiiu: Document the Nintendo Wii U devicetree
powerpc: wiiu: device tree
powerpc: wiiu: bootwrapper support
powerpc: wiiu: introduce wiiu platform
powerpc: wiiu: declare as non-coherent
powerpc: wiiu: udbg support for latteipc
powerpc: wiiu: espresso interrupt controller support
powerpc: wiiu: latte interrupt controller support
powerpc: espresso processor support
powerpc: wiiu: platform support
powerpc: wiiu: add minimal default config
.../bindings/powerpc/nintendo/wiiu.yaml | 25 ++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 +++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 +++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 +++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 ++
.../devicetree/bindings/usb/generic-ehci.yaml | 1 +
arch/powerpc/Kconfig.debug | 9 +
arch/powerpc/boot/Makefile | 4 +
arch/powerpc/boot/dts/wiiu.dts | 319 ++++++++++++++++++
arch/powerpc/boot/wiiu-head.S | 103 ++++++
arch/powerpc/boot/wiiu.c | 73 ++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/configs/wiiu_defconfig | 7 +
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/cpu_specs_book3s_32.h | 15 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 22 ++
arch/powerpc/platforms/wiiu/Makefile | 4 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
arch/powerpc/platforms/wiiu/setup.c | 60 ++++
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 126 +++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
32 files changed, 1657 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
create mode 100644 arch/powerpc/configs/wiiu_defconfig
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
base-commit: 094226ad94f471a9f19e8f8e7140a09c2625abaa
--
2.38.1
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v4 00/11] powerpc: Nintendo Wii U support
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
The following patches add basic support for the Nintendo Wii U video
game console, a PowerPC system somewhat similar to the GameCube and
Wii.
This includes:
- devicetree source
- bootwrapper support
- udbg console to bootloader
- early udbg console
- interrupt controllers
- platform support
- recognition of the Espresso processor
This is enough to boot on hardware. dmesg pics (with a small hack to
udbg-immortal, not included):
Link: https://wiki.linux-wiiu.org/images/7/7e/Mainline-initial-dmesg1.png
Link: https://wiki.linux-wiiu.org/images/9/91/Mainline-initial-dmesg2.png
For those who have hardware and would like to try these patches, some
modification is required to the stock OS to allow Linux. For info:
https://wiki.linux-wiiu.org/wiki/AdvancedSetup
Some of the design choices (new platform > embedded6xx) were discussed
previously:
Link: https://lore.kernel.org/lkml/0020d47c-0e23-822c-33f5-ccb7ea4c1072@heyquark.com/T/
Turns out even less changes were needed than previously anticipated for
discontiguous memory, and KUAP is yet to give trouble. Thanks to those
who helped and discussed this.
Changes since v3:
- Reworked devicetree bindings - thanks Krzysztof Kozlowski for the review.
- Update devicetree source to match.
- Fixes to ensure patches apply to current source.
Changes since v2:
- Fixed some overzealous deleting in the devicetree, oops.
- Fixed missing declarations for some functions (thanks robots)
- Fixed some checkpatch warnings.
- Mark latte as a simple-bus and use of_platform_default_populate.
Changes since v1:
- Style and formatting tweaks to the devicetree, thanks Rob Herring for
the review.
Ash Logan (11):
dt-bindings: wiiu: Document the Nintendo Wii U devicetree
powerpc: wiiu: device tree
powerpc: wiiu: bootwrapper support
powerpc: wiiu: introduce wiiu platform
powerpc: wiiu: declare as non-coherent
powerpc: wiiu: udbg support for latteipc
powerpc: wiiu: espresso interrupt controller support
powerpc: wiiu: latte interrupt controller support
powerpc: espresso processor support
powerpc: wiiu: platform support
powerpc: wiiu: add minimal default config
.../bindings/powerpc/nintendo/wiiu.yaml | 25 ++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 +++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 +++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 +++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 ++
.../devicetree/bindings/usb/generic-ehci.yaml | 1 +
arch/powerpc/Kconfig.debug | 9 +
arch/powerpc/boot/Makefile | 4 +
arch/powerpc/boot/dts/wiiu.dts | 319 ++++++++++++++++++
arch/powerpc/boot/wiiu-head.S | 103 ++++++
arch/powerpc/boot/wiiu.c | 73 ++++
arch/powerpc/boot/wrapper | 4 +
arch/powerpc/configs/wiiu_defconfig | 7 +
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/cpu_specs_book3s_32.h | 15 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Kconfig.cputype | 2 +-
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 22 ++
arch/powerpc/platforms/wiiu/Makefile | 4 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 ++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 ++++
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 ++
arch/powerpc/platforms/wiiu/setup.c | 60 ++++
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 126 +++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 ++
32 files changed, 1657 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
create mode 100644 arch/powerpc/configs/wiiu_defconfig
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
base-commit: 094226ad94f471a9f19e8f8e7140a09c2625abaa
--
2.38.1
^ permalink raw reply [flat|nested] 170+ messages in thread
* [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Adds schema for the various Wii U devicetree nodes used.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v3->v4: Rework to match expected style and conciceness.
.../bindings/powerpc/nintendo/wiiu.yaml | 25 +++++++++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 ++++++++++++++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++++++++++++++++++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 +++++++++++
.../devicetree/bindings/usb/generic-ehci.yaml | 1 +
9 files changed, 333 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
new file mode 100644
index 000000000000..23703b1052d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U bindings
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U video game console binding.
+
+properties:
+ $nodename:
+ const: "/"
+
+ compatible:
+ const: nintendo,wiiu
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
new file mode 100644
index 000000000000..476a8ccda7a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U "Espresso" interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
+
+allOf:
+ - $ref: "/schemas/interrupt-controller.yaml#"
+
+properties:
+ compatible:
+ const: nintendo,espresso-pic
+
+ '#interrupt-cells':
+ # Interrupt numbers 0-32 in one cell
+ const: 1
+
+ interrupt-controller: true
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - '#interrupt-cells'
+ - interrupt-controller
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ interrupt-controller@c000078 {
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
new file mode 100644
index 000000000000..d44ebe0d866c
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte "GPU7" graphics processor
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
+ Nintendo Wii U.
+
+properties:
+ compatible:
+ const: nintendo,latte-gpu7
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ gpu@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
new file mode 100644
index 000000000000..a53971a11e89
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte AHCI controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
+
+allOf:
+ - $ref: "/schemas/ata/ahci-common.yaml#"
+
+properties:
+ compatible:
+ const: nintendo,latte-ahci
+
+ reg:
+ items:
+ - description: |
+ HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
+ registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
+
+ interrupts:
+ items:
+ - description: Main HBA interrupt
+ - description: Vendor debugging interrupt
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ sata@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x408>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38>, <28>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
new file mode 100644
index 000000000000..772afe0c298c
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte DSP
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U digital signal processor, as found in the Latte chip.
+
+properties:
+ compatible:
+ const: nintendo,latte-dsp
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
new file mode 100644
index 000000000000..4b71d6b9b14d
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
+
+allOf:
+ - $ref: "/schemas/interrupt-controller.yaml#"
+
+properties:
+ compatible:
+ const: nintendo,latte-pic
+
+ '#interrupt-cells':
+ # Interrupt numbers 0-64 in one cell.
+ const: 1
+
+ interrupt-controller: true
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Cascade interrupt for Espresso PIC
+
+required:
+ - compatible
+ - '#interrupt-cells'
+ - interrupt-controller
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ interrupt-controller@d800440 {
+ compatible = "nintendo,latte-pic";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ reg = <0x0d800440 0x30>;
+
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
new file mode 100644
index 000000000000..25d474fca679
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte SD Host controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
+
+allOf:
+ - $ref: "/schemas/mmc/mmc-controller.yaml#"
+
+properties:
+ compatible:
+ items:
+ - const: nintendo,latte-sdhci
+ - const: sdhci
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ mmc@d070000 {
+ compatible = "nintendo,latte-sdhci", "sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
new file mode 100644
index 000000000000..6fdf93622fcc
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Latte system bus
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
+
+allOf:
+ - $ref: "/schemas/simple-bus.yaml#"
+
+properties:
+ compatible:
+ items:
+ - const: nintendo,latte
+ - const: simple-bus
+
+
+required:
+ - compatible
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
index c5f629c5bc61..9f69b5ab21ff 100644
--- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
@@ -69,6 +69,7 @@ properties:
- ibm,usb-ehci-440epx
- ibm,usb-ehci-460ex
- nintendo,hollywood-usb-ehci
+ - nintendo,latte-ehci
- st,spear600-ehci
- const: usb-ehci
- enum:
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Adds schema for the various Wii U devicetree nodes used.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v3->v4: Rework to match expected style and conciceness.
.../bindings/powerpc/nintendo/wiiu.yaml | 25 +++++++++
.../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 ++++++++++++++
.../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++++++++++++++++
.../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++
.../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++++++++++++++++++
.../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 ++++++++++++++++
.../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 +++++++++++
.../devicetree/bindings/usb/generic-ehci.yaml | 1 +
9 files changed, 333 insertions(+)
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
new file mode 100644
index 000000000000..23703b1052d0
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U bindings
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U video game console binding.
+
+properties:
+ $nodename:
+ const: "/"
+
+ compatible:
+ const: nintendo,wiiu
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
new file mode 100644
index 000000000000..476a8ccda7a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
@@ -0,0 +1,48 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U "Espresso" interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
+
+allOf:
+ - $ref: "/schemas/interrupt-controller.yaml#"
+
+properties:
+ compatible:
+ const: nintendo,espresso-pic
+
+ '#interrupt-cells':
+ # Interrupt numbers 0-32 in one cell
+ const: 1
+
+ interrupt-controller: true
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - '#interrupt-cells'
+ - interrupt-controller
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ interrupt-controller@c000078 {
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
new file mode 100644
index 000000000000..d44ebe0d866c
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
@@ -0,0 +1,42 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte "GPU7" graphics processor
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
+ Nintendo Wii U.
+
+properties:
+ compatible:
+ const: nintendo,latte-gpu7
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ gpu@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
new file mode 100644
index 000000000000..a53971a11e89
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte AHCI controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
+
+allOf:
+ - $ref: "/schemas/ata/ahci-common.yaml#"
+
+properties:
+ compatible:
+ const: nintendo,latte-ahci
+
+ reg:
+ items:
+ - description: |
+ HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
+ registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
+
+ interrupts:
+ items:
+ - description: Main HBA interrupt
+ - description: Vendor debugging interrupt
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ sata@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x408>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38>, <28>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
new file mode 100644
index 000000000000..772afe0c298c
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte DSP
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Nintendo Wii U digital signal processor, as found in the Latte chip.
+
+properties:
+ compatible:
+ const: nintendo,latte-dsp
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
new file mode 100644
index 000000000000..4b71d6b9b14d
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte interrupt controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
+
+allOf:
+ - $ref: "/schemas/interrupt-controller.yaml#"
+
+properties:
+ compatible:
+ const: nintendo,latte-pic
+
+ '#interrupt-cells':
+ # Interrupt numbers 0-64 in one cell.
+ const: 1
+
+ interrupt-controller: true
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: Cascade interrupt for Espresso PIC
+
+required:
+ - compatible
+ - '#interrupt-cells'
+ - interrupt-controller
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ interrupt-controller@d800440 {
+ compatible = "nintendo,latte-pic";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ reg = <0x0d800440 0x30>;
+
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
new file mode 100644
index 000000000000..25d474fca679
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Nintendo Wii U Latte SD Host controller
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
+
+allOf:
+ - $ref: "/schemas/mmc/mmc-controller.yaml#"
+
+properties:
+ compatible:
+ items:
+ - const: nintendo,latte-sdhci
+ - const: sdhci
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ mmc@d070000 {
+ compatible = "nintendo,latte-sdhci", "sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+...
diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
new file mode 100644
index 000000000000..6fdf93622fcc
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Latte system bus
+
+maintainers:
+ - Ash Logan <ash@heyquark.com>
+ - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
+
+description: |
+ Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
+
+allOf:
+ - $ref: "/schemas/simple-bus.yaml#"
+
+properties:
+ compatible:
+ items:
+ - const: nintendo,latte
+ - const: simple-bus
+
+
+required:
+ - compatible
+
+additionalProperties: true
+
+...
diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
index c5f629c5bc61..9f69b5ab21ff 100644
--- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
+++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
@@ -69,6 +69,7 @@ properties:
- ibm,usb-ehci-440epx
- ibm,usb-ehci-460ex
- nintendo,hollywood-usb-ehci
+ - nintendo,latte-ehci
- st,spear600-ehci
- const: usb-ehci
- enum:
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 02/11] powerpc: wiiu: device tree
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add a device tree source file for the Nintendo Wii U video game console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v1->v2: Style and formatting changes suggested by Rob Herring.
License remains GPL-2.0 as the other powerpc dtses are the same, happy
to change if there is a different preferred default.
v2->v3: Re-added address-cells accidentally removed in v2.
Marked latte as a simple-bus, since it is.
v3->v4: Updated to match devicetree bindings. Model also changed to
wup-101 in preparation for potentially different devices in future
(cat-dev etc.) Chosen node removed.
arch/powerpc/boot/dts/wiiu.dts | 319 +++++++++++++++++++++++++++++++++
1 file changed, 319 insertions(+)
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
new file mode 100644
index 000000000000..ee25b0855374
--- /dev/null
+++ b/arch/powerpc/boot/dts/wiiu.dts
@@ -0,0 +1,319 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nintendo Wii U Device Tree Source
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "nintendo,wup-101";
+ compatible = "nintendo,wiiu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
+ 0x08000000 0x00300000 /* MEM0 - 3MiB */
+ 0x10000000 0x80000000>; /* MEM2 - 2GiB */
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* TODO: Add SMP */
+ PowerPC,espresso@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <1243125000>; /* 1.243125GHz */
+ bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
+ timebase-frequency = <62156250>; /* 1/4 of the bus clock */
+ i-cache-size = <32768>; /* 32K icache */
+ i-cache-line-size = <32>;
+ i-cache-block-size = <32>;
+ i-cache-sets = <128>;
+ d-cache-size = <32768>; /* 32K dcache */
+ d-cache-line-size = <32>;
+ d-cache-block-size = <32>;
+ d-cache-sets = <128>;
+ next-level-cache = <&L2_0>;
+ L2_0:l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>; /* 512KB L2 */
+ cache-line-size = <64>;
+ cache-block-size = <32>;
+ cache-sets = <2048>;
+ };
+ };
+ };
+
+ soc {
+ compatible = "nintendo,latte", "simple-bus";
+ ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
+ 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
+ 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ latte_gpu: gpu@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+
+ espresso_pic: interrupt-controller@c000078 {
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+
+ ehci_0: usb@d040000 {
+ compatible = "nintendo,latte-ehci", "usb-ehci";
+ reg = <0x0d040000 0x100>;
+ interrupts = <4>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_0: usb@d050000 {
+ compatible = "nintendo,latte-ohci";
+ reg = <0x0d050000 0x100>;
+ interrupts = <5>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_1: usb@d060000 {
+ compatible = "nintendo,latte-ohci";
+ reg = <0x0d060000 0x100>;
+ interrupts = <6>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ehci_1: usb@d120000 {
+ compatible = "nintendo,latte-ehci", "usb-ehci";
+ reg = <0x0d120000 0x100>;
+ interrupts = <16>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_1_0: usb@d130000 {
+ compatible = "nintendo,latte-ohci";
+ reg = <0x0d130000 0x100>;
+ interrupts = <35>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ehci_2: usb@d140000 {
+ compatible = "nintendo,latte-ehci", "usb-ehci";
+ reg = <0x0d140000 0x100>;
+ interrupts = <36>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_2_0: usb@d150000 {
+ compatible = "nintendo,latte-ohci";
+ reg = <0x0d150000 0x100>;
+ interrupts = <37>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ sdcard_0: mmc@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ wifi_0: mmc@d080000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d080000 0x200>;
+ interrupts = <8>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ legacy_ipc: ipc@d800000 {
+ compatible = "nintendo,latte-ipc", "nintendo,hollywood-ipc";
+ reg = <0x0d800000 0x10>;
+ interrupts = <30 31>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ latte_otp: otp@d8001ec {
+ compatible = "nintendo,latte-otp";
+ reg = <0x0d8001ec 0x8>;
+ };
+
+ sata@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x808>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38 28>;
+ };
+
+ latte_pic: interrupt-controller@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+
+ gpio: gpio@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d8000c0 0x40>;
+ gpio-controller;
+ /* TODO: There are actually 31 AHBALL GPIOs */
+ ngpios = <24>;
+
+ gpio-line-names =
+ "POWER", "DWIFI", "FAN", "DC_DC",
+ "", "Esp10WorkAround", "", "",
+ "PADPD", "", "EEP_CS", "EEP_CLK",
+ "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
+ "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
+ "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ gpio2: gpio@d800520 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d800520 0x40>;
+ gpio-controller;
+ ngpios = <7>;
+
+ gpio-line-names =
+ "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
+ "AVE_INT", "", "AVE_RESET";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+ };
+
+ spi_gpio: spi {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+ sck-gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ mosi-gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ miso-gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ eeprom@0 {
+ compatible = "atmel,at93c66";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ /* TODO: wiiubrew says this is 16-bit, but I only get the correct
+ * values in 8-bit...
+ */
+ data-size = <8>;
+ read-only;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
+ rng_seed: rng@12 { reg = <0x012 8>; };
+ ppc_pvr: pvr@20 { reg = <0x020 4>; };
+ seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
+ seeprom_ver: sver@2a { reg = <0x02A 2>; };
+ otp_ver: over@2c { reg = <0x02C 2>; };
+ otp_rev: orev@2e { reg = <0x02E 2>; };
+ otp_ver_str: over-str@30 { reg = <0x030 8>; };
+
+ bc_crc: bc-crc@38 { reg = <0x038 4>; };
+ bc_sz: bc-sz@3c { reg = <0x03C 2>; };
+ bc_ver: bc-ver@3e { reg = <0x03E 2>; };
+ bc_boardtype: boardtype@42 { reg = <0x042 2>; };
+ bc_boardrev: boardrev@44 { reg = <0x044 2>; };
+ bc_bootsource: bootsource@46 { reg = <0x046 2>; };
+ bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
+ bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
+ bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
+ bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
+ bc_video1080p: video1080p@50 { reg = <0x050 2>; };
+ bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
+ bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
+ bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
+ bc_satadevice: satadevice@58 { reg = <0x058 2>; };
+ bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
+ bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
+
+ drive_key: drvkey@80 { reg = <0x080 16>; };
+ factory_key: fackey@90 { reg = <0x090 16>; };
+ shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
+ usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
+ drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
+ usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
+ shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
+
+ sysprod_version: sp_ver@140 { reg = <0x140 4>; };
+ sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
+ sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
+ sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
+ sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
+ sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
+ sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
+ sysprod_code: sp_code@158 { reg = <0x158 8>; };
+ sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
+ sysprod_model: sp_model@170 { reg = <0x170 16>; };
+
+ prod_year: pyear@188 { reg = <0x188 2>; };
+ prod_date: pdate@18a { reg = <0x18A 2>; };
+ prod_time: ptime@18c { reg = <0x18C 2>; };
+
+ boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
+ };
+ };
+
+ /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
+ gpio-keys {
+ poll-interval = <50>;
+ compatible = "gpio-keys-polled";
+
+ key-power {
+ label = "Power Button";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+};
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 02/11] powerpc: wiiu: device tree
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add a device tree source file for the Nintendo Wii U video game console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v1->v2: Style and formatting changes suggested by Rob Herring.
License remains GPL-2.0 as the other powerpc dtses are the same, happy
to change if there is a different preferred default.
v2->v3: Re-added address-cells accidentally removed in v2.
Marked latte as a simple-bus, since it is.
v3->v4: Updated to match devicetree bindings. Model also changed to
wup-101 in preparation for potentially different devices in future
(cat-dev etc.) Chosen node removed.
arch/powerpc/boot/dts/wiiu.dts | 319 +++++++++++++++++++++++++++++++++
1 file changed, 319 insertions(+)
create mode 100644 arch/powerpc/boot/dts/wiiu.dts
diff --git a/arch/powerpc/boot/dts/wiiu.dts b/arch/powerpc/boot/dts/wiiu.dts
new file mode 100644
index 000000000000..ee25b0855374
--- /dev/null
+++ b/arch/powerpc/boot/dts/wiiu.dts
@@ -0,0 +1,319 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Nintendo Wii U Device Tree Source
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "nintendo,wup-101";
+ compatible = "nintendo,wiiu";
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x02000000 /* MEM1 - 32MiB */
+ 0x08000000 0x00300000 /* MEM0 - 3MiB */
+ 0x10000000 0x80000000>; /* MEM2 - 2GiB */
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* TODO: Add SMP */
+ PowerPC,espresso@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <1243125000>; /* 1.243125GHz */
+ bus-frequency = <248625000>; /* 248.625MHz core-to-bus 5x */
+ timebase-frequency = <62156250>; /* 1/4 of the bus clock */
+ i-cache-size = <32768>; /* 32K icache */
+ i-cache-line-size = <32>;
+ i-cache-block-size = <32>;
+ i-cache-sets = <128>;
+ d-cache-size = <32768>; /* 32K dcache */
+ d-cache-line-size = <32>;
+ d-cache-block-size = <32>;
+ d-cache-sets = <128>;
+ next-level-cache = <&L2_0>;
+ L2_0:l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ cache-size = <0x80000>; /* 512KB L2 */
+ cache-line-size = <64>;
+ cache-block-size = <32>;
+ cache-sets = <2048>;
+ };
+ };
+ };
+
+ soc {
+ compatible = "nintendo,latte", "simple-bus";
+ ranges = <0x0c000000 0x0c000000 0x00400000 /* Espresso-only registers */
+ 0x0d000000 0x0d000000 0x00200000 /* Latte AHB deivces */
+ 0x0d800000 0x0d800000 0x00800000>; /* Latte SoC registers */
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ latte_gpu: gpu@c200000 {
+ compatible = "nintendo,latte-gpu7";
+ reg = <0x0c200000 0x80000>;
+ interrupts = <2>;
+ interrupt-parent = <&espresso_pic>;
+ };
+
+ espresso_pic: interrupt-controller@c000078 {
+ compatible = "nintendo,espresso-pic";
+ reg = <0x0c000078 0x18>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+
+ latte_dsp: dsp@c005000 {
+ compatible = "nintendo,latte-dsp";
+ reg = <0x0c005000 0x200>;
+ };
+
+ ehci_0: usb@d040000 {
+ compatible = "nintendo,latte-ehci", "usb-ehci";
+ reg = <0x0d040000 0x100>;
+ interrupts = <4>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_0: usb@d050000 {
+ compatible = "nintendo,latte-ohci";
+ reg = <0x0d050000 0x100>;
+ interrupts = <5>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_0_1: usb@d060000 {
+ compatible = "nintendo,latte-ohci";
+ reg = <0x0d060000 0x100>;
+ interrupts = <6>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ehci_1: usb@d120000 {
+ compatible = "nintendo,latte-ehci", "usb-ehci";
+ reg = <0x0d120000 0x100>;
+ interrupts = <16>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_1_0: usb@d130000 {
+ compatible = "nintendo,latte-ohci";
+ reg = <0x0d130000 0x100>;
+ interrupts = <35>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ehci_2: usb@d140000 {
+ compatible = "nintendo,latte-ehci", "usb-ehci";
+ reg = <0x0d140000 0x100>;
+ interrupts = <36>;
+ interrupt-parent = <&latte_pic>;
+ big-endian-regs;
+ };
+
+ ohci_2_0: usb@d150000 {
+ compatible = "nintendo,latte-ohci";
+ reg = <0x0d150000 0x100>;
+ interrupts = <37>;
+ interrupt-parent = <&latte_pic>;
+
+ big-endian-regs;
+ };
+
+ sdcard_0: mmc@d070000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d070000 0x200>;
+ interrupts = <7>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ wifi_0: mmc@d080000 {
+ compatible = "nintendo,latte-sdhci","sdhci";
+ reg = <0x0d080000 0x200>;
+ interrupts = <8>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ legacy_ipc: ipc@d800000 {
+ compatible = "nintendo,latte-ipc", "nintendo,hollywood-ipc";
+ reg = <0x0d800000 0x10>;
+ interrupts = <30 31>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ latte_otp: otp@d8001ec {
+ compatible = "nintendo,latte-otp";
+ reg = <0x0d8001ec 0x8>;
+ };
+
+ sata@d160400 {
+ compatible = "nintendo,latte-ahci";
+ reg = <0x0d160400 0x808>;
+
+ interrupt-parent = <&latte_pic>;
+ interrupts = <38 28>;
+ };
+
+ latte_pic: interrupt-controller@d800440 {
+ #interrupt-cells = <1>;
+ interrupt-controller;
+
+ compatible = "nintendo,latte-pic";
+ reg = <0x0d800440 0x30>;
+ interrupt-parent = <&espresso_pic>;
+ interrupts = <24>;
+ };
+
+ gpio: gpio@d8000c0 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d8000c0 0x40>;
+ gpio-controller;
+ /* TODO: There are actually 31 AHBALL GPIOs */
+ ngpios = <24>;
+
+ gpio-line-names =
+ "POWER", "DWIFI", "FAN", "DC_DC",
+ "", "Esp10WorkAround", "", "",
+ "PADPD", "", "EEP_CS", "EEP_CLK",
+ "EEP_MOSI", "EEP_MISO", "AVE_SCL", "AVE_SDA",
+ "DEBUG0", "DEBUG1", "DEBUG2", "DEBUG3",
+ "DEBUG4", "DEBUG5", "DEBUG6", "DEBUG7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+
+ gpio2: gpio@d800520 {
+ #gpio-cells = <2>;
+ compatible = "nintendo,latte-gpio", "nintendo,hollywood-gpio";
+
+ reg = <0x0d800520 0x40>;
+ gpio-controller;
+ ngpios = <7>;
+
+ gpio-line-names =
+ "FANSPEED", "SMC_SCL", "SMC_SDA", "DC_DC2",
+ "AVE_INT", "", "AVE_RESET";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <10>;
+ interrupt-parent = <&latte_pic>;
+ };
+ };
+
+ spi_gpio: spi {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cs-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
+ sck-gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
+ mosi-gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
+ miso-gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+
+ eeprom@0 {
+ compatible = "atmel,at93c66";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ spi-cs-high;
+ /* TODO: wiiubrew says this is 16-bit, but I only get the correct
+ * values in 8-bit...
+ */
+ data-size = <8>;
+ read-only;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* https://wiiubrew.org/wiki/Hardware/SEEPROM */
+ rng_seed: rng@12 { reg = <0x012 8>; };
+ ppc_pvr: pvr@20 { reg = <0x020 4>; };
+ seeprom_ver_str: sver-str@24 { reg = <0x024 6>; };
+ seeprom_ver: sver@2a { reg = <0x02A 2>; };
+ otp_ver: over@2c { reg = <0x02C 2>; };
+ otp_rev: orev@2e { reg = <0x02E 2>; };
+ otp_ver_str: over-str@30 { reg = <0x030 8>; };
+
+ bc_crc: bc-crc@38 { reg = <0x038 4>; };
+ bc_sz: bc-sz@3c { reg = <0x03C 2>; };
+ bc_ver: bc-ver@3e { reg = <0x03E 2>; };
+ bc_boardtype: boardtype@42 { reg = <0x042 2>; };
+ bc_boardrev: boardrev@44 { reg = <0x044 2>; };
+ bc_bootsource: bootsource@46 { reg = <0x046 2>; };
+ bc_ddr3size: ddr3size@48 { reg = <0x048 2>; };
+ bc_ddr3speed: ddr3speed@4a { reg = <0x04A 2>; };
+ bc_ppcclockmul: ppcclockmul@4c { reg = <0x04C 2>; };
+ bc_iopclockmul: iopclockmul@46 { reg = <0x04E 2>; };
+ bc_video1080p: video1080p@50 { reg = <0x050 2>; };
+ bc_ddr3vendor: ddr3vendor@52 { reg = <0x052 2>; };
+ bc_movpassivereset: movpassivereset@54 { reg = <0x054 2>; };
+ bc_syspllspd: syspllspd@56 { reg = <0x056 2>; };
+ bc_satadevice: satadevice@58 { reg = <0x058 2>; };
+ bc_consoletype: consoletype@5a { reg = <0x05A 2>; };
+ bc_deviceprescence: deviceprescence@5c { reg = <0x05C 2>; };
+
+ drive_key: drvkey@80 { reg = <0x080 16>; };
+ factory_key: fackey@90 { reg = <0x090 16>; };
+ shdd_key: shddkey@a0 { reg = <0x0A0 16>; };
+ usb_key_seed: usbkeyseed@b0 { reg = <0x0B0 16>; };
+ drive_key_flag: drvkeyf@c0 { reg = <0x0C0 2>; };
+ usb_key_flag: udbkeyf@c2 { reg = <0x0C2 2>; };
+ shdd_key_flag: shddkeyf@c4 { reg = <0x0C4 2>; };
+
+ sysprod_version: sp_ver@140 { reg = <0x140 4>; };
+ sysprod_eeprom_version: sp_ee_ver@144 { reg = <0x144 4>; };
+ sysprod_product_area: sp_parea@148 { reg = <0x148 4>; };
+ sysprod_game_region: sp_region@14c { reg = <0x14C 4>; };
+ sysprod_ntsc_pal: sp_ntscpal@150 { reg = <0x150 4>; };
+ sysprod_5ghz_country: sp_5ghz_c@154 { reg = <0x154 2>; };
+ sysprod_5ghz_country_rev: sp_5ghz_crev@156 { reg = <0x156 2>; };
+ sysprod_code: sp_code@158 { reg = <0x158 8>; };
+ sysprod_serial: sp_serial@160 { reg = <0x160 16>; };
+ sysprod_model: sp_model@170 { reg = <0x170 16>; };
+
+ prod_year: pyear@188 { reg = <0x188 2>; };
+ prod_date: pdate@18a { reg = <0x18A 2>; };
+ prod_time: ptime@18c { reg = <0x18C 2>; };
+
+ boot_params: boot_params@1c0 { reg = <0x1C0 48>; };
+ };
+ };
+
+ /* TODO make this gpio-keyed once hollywood-gpio supports interrupts */
+ gpio-keys {
+ poll-interval = <50>;
+ compatible = "gpio-keys-polled";
+
+ key-power {
+ label = "Power Button";
+ gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
+ linux,code = <KEY_POWER>;
+ };
+ };
+};
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 03/11] powerpc: wiiu: bootwrapper support
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add support for the Nintendo Wii U game console to the powerpc
bootwrapper.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/Makefile | 4 ++
arch/powerpc/boot/wiiu-head.S | 103 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/wiiu.c | 73 ++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index d32d95aea5d6..42f622945b4a 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -162,6 +162,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
gamecube-head.S gamecube.c \
wii-head.S wii.c holly.c \
fixed-head.S mvme5100.c
+src-plat-$(CONFIG_WIIU) += wiiu-head.S wiiu.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -360,6 +361,9 @@ image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
image-$(CONFIG_WII) += dtbImage.wii
image-$(CONFIG_MVME5100) += dtbImage.mvme5100
+# Board port in arch/powerpc/platform/wiiu/Kconfig
+image-$(CONFIG_WIIU) += dtbImage.wiiu
+
# Board port in arch/powerpc/platform/amigaone/Kconfig
image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/wiiu-head.S b/arch/powerpc/boot/wiiu-head.S
new file mode 100644
index 000000000000..8586e2e992d5
--- /dev/null
+++ b/arch/powerpc/boot/wiiu-head.S
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entrypoint head asm
+ * This code expects to be called directly after the Espresso BootROM, which implies certain MSR
+ * states.
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include "ppc_asm.h"
+
+.text
+.global _zimage_start
+_zimage_start:
+ /* Clear out all BATs. MMU is already off. */
+ li r8, 0
+
+ mtspr 0x210, r8 /* IBAT0U */
+ mtspr 0x212, r8 /* IBAT1U */
+ mtspr 0x214, r8 /* IBAT2U */
+ mtspr 0x216, r8 /* IBAT3U */
+ mtspr 0x218, r8 /* DBAT0U */
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x21c, r8 /* DBAT2U */
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ mtspr 0x230, r8 /* IBAT4U */
+ mtspr 0x232, r8 /* IBAT5U */
+ mtspr 0x234, r8 /* IBAT6U */
+ mtspr 0x236, r8 /* IBAT7U */
+ mtspr 0x238, r8 /* DBAT4U */
+ mtspr 0x23a, r8 /* DBAT5U */
+ mtspr 0x23c, r8 /* DBAT6U */
+ mtspr 0x23e, r8 /* DBAT7U */
+
+ /* MEM1 */
+ /* 32MB, starting at 0x00000000... */
+ li r8, 0x000003ff@l
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x212, r8 /* IBAT1U */
+
+ /* mapped into phys 0x00000000; read-write; normal caching. */
+ li r8, 0x00000002@l
+ mtspr 0x21b, r8 /* DBAT1L */
+ mtspr 0x213, r8 /* IBAT1L */
+
+ /* Latte MMIO area */
+ /* 64MB, starting at 0x0d800000... */
+ lis r8, 0x0d8007ff@h
+ ori r8, r8,0x0d800007ff@l
+ mtspr 0x21c, r8 /* DBAT2U */
+
+ /* mapped into phys 0x0d800000; read-write; writethrough/nocache/guard*/
+ lis r8, 0x0d80006A@h
+ ori r8, r8,0x0d80006A@l
+ mtspr 0x21d, r8 /* DBAT2L */
+
+ /* Bootloader comms area (actually 0x89200000) */
+ /* 128MiB, starting at 0x88000000... */
+ lis r8, 0x88000fff@h
+ ori r8, r8, 0x88000fff@l
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ /* mapped into phys 0x88000000; read-write; normal caching. */
+ lis r8, 0x88000002@h
+ ori r8, r8, 0x88000002@l
+ mtspr 0x21f, r8 /* DBAT3L */
+
+ /* Turn on BAT 4 through 7, configure CPU */
+ mfspr r8, 0x3f3 /* HID4 */
+ oris r8, r8, 0x3200 /* L2FM: 64-byte fetch, BPD: max depth is 4, SBE */
+ mtspr 0x3f3, r8
+
+ /* Turn on and invalidate caches */
+ mfspr r8, 0x3f0 /* HID0 */
+ /* HID0_ICE | HID0_ICFI | HID0_DCE | HID0_DCFI */
+ ori r8, r8, (1 << 15) | (1 << 11) | (1 << 14) | (1 << 10)
+ mtspr 0x3f0, r8
+ isync
+
+ li r3, 0
+ li r4, 0
+ li r5, 0
+
+ bl get_lr
+get_lr:
+ mflr r8
+ /* Get absolute address of done */
+ addi r8, r8, done - get_lr
+
+ /* Set up MSR */
+ /* MSR_DR | MSR_IR | MSR_FP */
+ /* Data/instruction MMUs, FPU because why not */
+ ori r9, r3, (1 << 4) | (1 << 5) | (1 << 13)
+
+ /* Apply our new MSR, starting execution at "done" */
+ mtsrr0 r8
+ mtsrr1 r9
+ sync
+ rfi
+done:
+ b _zimage_start_lib
diff --git a/arch/powerpc/boot/wiiu.c b/arch/powerpc/boot/wiiu.c
new file mode 100644
index 000000000000..fe88eb2c42ae
--- /dev/null
+++ b/arch/powerpc/boot/wiiu.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Platform support and IPC debug console to linux-loader (on Starbuck)
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include <stddef.h>
+#include "string.h"
+#include "stdio.h"
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+BSS_STACK(8192);
+
+// Volatile is used here since the io.h routines require it
+#define LT_IPC_PPCMSG ((volatile u32 *)0x0d800000)
+#define LT_IPC_PPCCTRL ((volatile u32 *)0x0d800004)
+#define LT_IPC_PPCCTRL_X1 0x1
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+static void wiiu_ipc_sendmsg(int msg)
+{
+ out_be32(LT_IPC_PPCMSG, msg);
+ out_be32(LT_IPC_PPCCTRL, LT_IPC_PPCCTRL_X1);
+ while (in_be32(LT_IPC_PPCCTRL) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Send logging string out over IPC to linux-loader for early printing.
+ * Packs 3 chars at a time where possible.
+ */
+static void wiiu_write_ipc(const char *buf, int len)
+{
+ int i = 0;
+
+ for (i = 0; i + 2 < len; i += 3) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i + 0] << 16) |
+ (buf[i + 1] << 8) | buf[i + 2];
+
+ wiiu_ipc_sendmsg(msg);
+ }
+
+ if (i < len) {
+ for (; i < len; i++) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i] << 16);
+
+ wiiu_ipc_sendmsg(msg);
+ }
+ }
+}
+
+/*
+ * Note 32MiB heap - not ideal but seems fine for the bootwrapper
+ */
+void platform_init(unsigned int r3, unsigned int r4, unsigned int r5)
+{
+ u32 heapsize;
+
+ console_ops.write = wiiu_write_ipc;
+ printf("wiiu: bootwrapper ok\n");
+
+ heapsize = 32 * 1024 * 1024 - (u32)_end;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ printf("wiiu: heap ok\n");
+
+ fdt_init(_dtb_start);
+ printf("wiiu: dtb ok\n");
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 5bdd4dd20bbb..25fd60770659 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -344,6 +344,10 @@ gamecube|wii)
link_address='0x600000'
platformo="$object/$platform-head.o $object/$platform.o"
;;
+wiiu)
+ link_address='0x600000'
+ platformo="$object/wiiu-head.o $object/$platform.o"
+ ;;
microwatt)
link_address='0x500000'
platformo="$object/fixed-head.o $object/$platform.o"
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 03/11] powerpc: wiiu: bootwrapper support
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add support for the Nintendo Wii U game console to the powerpc
bootwrapper.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
arch/powerpc/boot/Makefile | 4 ++
arch/powerpc/boot/wiiu-head.S | 103 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/wiiu.c | 73 ++++++++++++++++++++++++
arch/powerpc/boot/wrapper | 4 ++
4 files changed, 184 insertions(+)
create mode 100644 arch/powerpc/boot/wiiu-head.S
create mode 100644 arch/powerpc/boot/wiiu.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index d32d95aea5d6..42f622945b4a 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -162,6 +162,7 @@ src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
gamecube-head.S gamecube.c \
wii-head.S wii.c holly.c \
fixed-head.S mvme5100.c
+src-plat-$(CONFIG_WIIU) += wiiu-head.S wiiu.c
src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c epapr-wrapper.c
@@ -360,6 +361,9 @@ image-$(CONFIG_GAMECUBE) += dtbImage.gamecube
image-$(CONFIG_WII) += dtbImage.wii
image-$(CONFIG_MVME5100) += dtbImage.mvme5100
+# Board port in arch/powerpc/platform/wiiu/Kconfig
+image-$(CONFIG_WIIU) += dtbImage.wiiu
+
# Board port in arch/powerpc/platform/amigaone/Kconfig
image-$(CONFIG_AMIGAONE) += cuImage.amigaone
diff --git a/arch/powerpc/boot/wiiu-head.S b/arch/powerpc/boot/wiiu-head.S
new file mode 100644
index 000000000000..8586e2e992d5
--- /dev/null
+++ b/arch/powerpc/boot/wiiu-head.S
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Entrypoint head asm
+ * This code expects to be called directly after the Espresso BootROM, which implies certain MSR
+ * states.
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include "ppc_asm.h"
+
+.text
+.global _zimage_start
+_zimage_start:
+ /* Clear out all BATs. MMU is already off. */
+ li r8, 0
+
+ mtspr 0x210, r8 /* IBAT0U */
+ mtspr 0x212, r8 /* IBAT1U */
+ mtspr 0x214, r8 /* IBAT2U */
+ mtspr 0x216, r8 /* IBAT3U */
+ mtspr 0x218, r8 /* DBAT0U */
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x21c, r8 /* DBAT2U */
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ mtspr 0x230, r8 /* IBAT4U */
+ mtspr 0x232, r8 /* IBAT5U */
+ mtspr 0x234, r8 /* IBAT6U */
+ mtspr 0x236, r8 /* IBAT7U */
+ mtspr 0x238, r8 /* DBAT4U */
+ mtspr 0x23a, r8 /* DBAT5U */
+ mtspr 0x23c, r8 /* DBAT6U */
+ mtspr 0x23e, r8 /* DBAT7U */
+
+ /* MEM1 */
+ /* 32MB, starting at 0x00000000... */
+ li r8, 0x000003ff@l
+ mtspr 0x21a, r8 /* DBAT1U */
+ mtspr 0x212, r8 /* IBAT1U */
+
+ /* mapped into phys 0x00000000; read-write; normal caching. */
+ li r8, 0x00000002@l
+ mtspr 0x21b, r8 /* DBAT1L */
+ mtspr 0x213, r8 /* IBAT1L */
+
+ /* Latte MMIO area */
+ /* 64MB, starting at 0x0d800000... */
+ lis r8, 0x0d8007ff@h
+ ori r8, r8,0x0d800007ff@l
+ mtspr 0x21c, r8 /* DBAT2U */
+
+ /* mapped into phys 0x0d800000; read-write; writethrough/nocache/guard*/
+ lis r8, 0x0d80006A@h
+ ori r8, r8,0x0d80006A@l
+ mtspr 0x21d, r8 /* DBAT2L */
+
+ /* Bootloader comms area (actually 0x89200000) */
+ /* 128MiB, starting at 0x88000000... */
+ lis r8, 0x88000fff@h
+ ori r8, r8, 0x88000fff@l
+ mtspr 0x21e, r8 /* DBAT3U */
+
+ /* mapped into phys 0x88000000; read-write; normal caching. */
+ lis r8, 0x88000002@h
+ ori r8, r8, 0x88000002@l
+ mtspr 0x21f, r8 /* DBAT3L */
+
+ /* Turn on BAT 4 through 7, configure CPU */
+ mfspr r8, 0x3f3 /* HID4 */
+ oris r8, r8, 0x3200 /* L2FM: 64-byte fetch, BPD: max depth is 4, SBE */
+ mtspr 0x3f3, r8
+
+ /* Turn on and invalidate caches */
+ mfspr r8, 0x3f0 /* HID0 */
+ /* HID0_ICE | HID0_ICFI | HID0_DCE | HID0_DCFI */
+ ori r8, r8, (1 << 15) | (1 << 11) | (1 << 14) | (1 << 10)
+ mtspr 0x3f0, r8
+ isync
+
+ li r3, 0
+ li r4, 0
+ li r5, 0
+
+ bl get_lr
+get_lr:
+ mflr r8
+ /* Get absolute address of done */
+ addi r8, r8, done - get_lr
+
+ /* Set up MSR */
+ /* MSR_DR | MSR_IR | MSR_FP */
+ /* Data/instruction MMUs, FPU because why not */
+ ori r9, r3, (1 << 4) | (1 << 5) | (1 << 13)
+
+ /* Apply our new MSR, starting execution at "done" */
+ mtsrr0 r8
+ mtsrr1 r9
+ sync
+ rfi
+done:
+ b _zimage_start_lib
diff --git a/arch/powerpc/boot/wiiu.c b/arch/powerpc/boot/wiiu.c
new file mode 100644
index 000000000000..fe88eb2c42ae
--- /dev/null
+++ b/arch/powerpc/boot/wiiu.c
@@ -0,0 +1,73 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Platform support and IPC debug console to linux-loader (on Starbuck)
+ *
+ * Nintendo Wii U bootwrapper support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#include <stddef.h>
+#include "string.h"
+#include "stdio.h"
+#include "types.h"
+#include "io.h"
+#include "ops.h"
+
+BSS_STACK(8192);
+
+// Volatile is used here since the io.h routines require it
+#define LT_IPC_PPCMSG ((volatile u32 *)0x0d800000)
+#define LT_IPC_PPCCTRL ((volatile u32 *)0x0d800004)
+#define LT_IPC_PPCCTRL_X1 0x1
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+static void wiiu_ipc_sendmsg(int msg)
+{
+ out_be32(LT_IPC_PPCMSG, msg);
+ out_be32(LT_IPC_PPCCTRL, LT_IPC_PPCCTRL_X1);
+ while (in_be32(LT_IPC_PPCCTRL) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Send logging string out over IPC to linux-loader for early printing.
+ * Packs 3 chars at a time where possible.
+ */
+static void wiiu_write_ipc(const char *buf, int len)
+{
+ int i = 0;
+
+ for (i = 0; i + 2 < len; i += 3) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i + 0] << 16) |
+ (buf[i + 1] << 8) | buf[i + 2];
+
+ wiiu_ipc_sendmsg(msg);
+ }
+
+ if (i < len) {
+ for (; i < len; i++) {
+ int msg = WIIU_LOADER_CMD_PRINT | (buf[i] << 16);
+
+ wiiu_ipc_sendmsg(msg);
+ }
+ }
+}
+
+/*
+ * Note 32MiB heap - not ideal but seems fine for the bootwrapper
+ */
+void platform_init(unsigned int r3, unsigned int r4, unsigned int r5)
+{
+ u32 heapsize;
+
+ console_ops.write = wiiu_write_ipc;
+ printf("wiiu: bootwrapper ok\n");
+
+ heapsize = 32 * 1024 * 1024 - (u32)_end;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ printf("wiiu: heap ok\n");
+
+ fdt_init(_dtb_start);
+ printf("wiiu: dtb ok\n");
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 5bdd4dd20bbb..25fd60770659 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -344,6 +344,10 @@ gamecube|wii)
link_address='0x600000'
platformo="$object/$platform-head.o $object/$platform.o"
;;
+wiiu)
+ link_address='0x600000'
+ platformo="$object/wiiu-head.o $object/$platform.o"
+ ;;
microwatt)
link_address='0x500000'
platformo="$object/fixed-head.o $object/$platform.o"
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 04/11] powerpc: wiiu: introduce wiiu platform
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Adds empty platforms/wiiu for Nintendo Wii U console
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v2->v3: Add help text for CONFIG_WIIU.
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 8 ++++++++
arch/powerpc/platforms/wiiu/Makefile | 1 +
4 files changed, 11 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d41dad227de8..c4a9c3c0b409 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/wiiu/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 94470fb27c99..944ddd938711 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
obj-$(CONFIG_PPC_MICROWATT) += microwatt/
+obj-$(CONFIG_WIIU) += wiiu/
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
new file mode 100644
index 000000000000..3834834c6bd7
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config WIIU
+ bool "Nintendo Wii U"
+ depends on PPC_BOOK3S_32
+ help
+ Select WIIU if configuring for the Nintendo Wii U.
+ More information at: <https://linux-wiiu.org/>
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
new file mode 100644
index 000000000000..f66554cd5c45
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: GPL-2.0
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 04/11] powerpc: wiiu: introduce wiiu platform
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Adds empty platforms/wiiu for Nintendo Wii U console
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v2->v3: Add help text for CONFIG_WIIU.
arch/powerpc/platforms/Kconfig | 1 +
arch/powerpc/platforms/Makefile | 1 +
arch/powerpc/platforms/wiiu/Kconfig | 8 ++++++++
arch/powerpc/platforms/wiiu/Makefile | 1 +
4 files changed, 11 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/Kconfig
create mode 100644 arch/powerpc/platforms/wiiu/Makefile
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index d41dad227de8..c4a9c3c0b409 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ source "arch/powerpc/platforms/40x/Kconfig"
source "arch/powerpc/platforms/amigaone/Kconfig"
source "arch/powerpc/platforms/book3s/Kconfig"
source "arch/powerpc/platforms/microwatt/Kconfig"
+source "arch/powerpc/platforms/wiiu/Kconfig"
config KVM_GUEST
bool "KVM Guest support"
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 94470fb27c99..944ddd938711 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -24,3 +24,4 @@ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/
obj-$(CONFIG_AMIGAONE) += amigaone/
obj-$(CONFIG_PPC_BOOK3S) += book3s/
obj-$(CONFIG_PPC_MICROWATT) += microwatt/
+obj-$(CONFIG_WIIU) += wiiu/
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
new file mode 100644
index 000000000000..3834834c6bd7
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0
+
+config WIIU
+ bool "Nintendo Wii U"
+ depends on PPC_BOOK3S_32
+ help
+ Select WIIU if configuring for the Nintendo Wii U.
+ More information at: <https://linux-wiiu.org/>
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
new file mode 100644
index 000000000000..f66554cd5c45
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -0,0 +1 @@
+# SPDX-License-Identifier: GPL-2.0
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 05/11] powerpc: wiiu: declare as non-coherent
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
The Nintendo Wii U requires explicit cache handling when interfacing
with DMA devices.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 0c4eed9aea80..ae1ee77705ea 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -522,7 +522,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ GAMECUBE_COMMON || AMIGAONE || WIIU
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 05/11] powerpc: wiiu: declare as non-coherent
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
The Nintendo Wii U requires explicit cache handling when interfacing
with DMA devices.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/platforms/Kconfig.cputype | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 0c4eed9aea80..ae1ee77705ea 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -522,7 +522,7 @@ config NR_CPUS
config NOT_COHERENT_CACHE
bool
depends on 4xx || PPC_8xx || PPC_MPC512x || \
- GAMECUBE_COMMON || AMIGAONE
+ GAMECUBE_COMMON || AMIGAONE || WIIU
select ARCH_HAS_DMA_PREP_COHERENT
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_SYNC_DMA_FOR_CPU
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 06/11] powerpc: wiiu: udbg support for latteipc
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add support for using the Latte chipset IPC for udbg on the Nintendo Wii
U console.
These messages can then be received by a special firmware running on the
"Starbuck" coprocessor.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v2->v3: Fix a missing declaration issue by including latteipc_udbg.h.
v3->v4: Add missing of.h includes.
arch/powerpc/Kconfig.debug | 9 ++
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/wiiu/Kconfig | 13 ++
arch/powerpc/platforms/wiiu/Makefile | 2 +
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 126 ++++++++++++++++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 +++++
8 files changed, 201 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 6aaf8dc60610..b87343b0d1b4 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,15 @@ config PPC_EARLY_DEBUG_USBGECKO
Select this to enable early debugging for Nintendo GameCube/Wii
consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_LATTEIPC
+ bool "Early debugging through Latte chipset IPC"
+ depends on WIIU
+ select LATTEIPC_UDBG
+ help
+ Select this to enable early debugging for Nintendo Wii U consoles via
+ chipset IPC to the security coprocessor. This assumes a firmware is
+ running on the coprocessor to receive messages.
+
config PPC_EARLY_DEBUG_PS3GELIC
bool "Early debugging through the PS3 Ethernet port"
depends on PPC_PS3
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index b1f094728b35..ef1367f146fd 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -53,6 +53,7 @@ void __init udbg_init_ps3gelic(void);
void __init udbg_init_debug_opal_raw(void);
void __init udbg_init_debug_opal_hvsi(void);
void __init udbg_init_debug_16550(void);
+void __init udbg_init_latteipc(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 519b60695167..5b3b1c971feb 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -164,6 +164,9 @@ __after_mmu_off:
#ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO
bl setup_usbgecko_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+ bl setup_latteipc_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1201,4 +1204,21 @@ setup_usbgecko_bat:
blr
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+setup_latteipc_bat:
+ /* prepare a BAT for early io */
+ lis r8, 0x0d80
+
+ /*
+ * The virtual address used must match the virtual address
+ * associated to the fixmap entry FIX_EARLY_DEBUG_BASE.
+ */
+ lis r11, 0xfffe /* top 128K */
+ ori r8, r8, 0x002a /* uncached, guarded ,rw */
+ ori r11, r11, 0x2 /* 128K, Vs=1, Vp=0 */
+ mtspr SPRN_DBAT1L, r8
+ mtspr SPRN_DBAT1U, r11
+ blr
+#endif
+
.data
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 92b3fc258d11..b2ec88ef3cc1 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -69,6 +69,9 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_hvsi();
#elif defined(CONFIG_PPC_EARLY_DEBUG_16550)
udbg_init_debug_16550();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_LATTEIPC)
+ /* For use on Nintendo Wii U */
+ udbg_init_latteipc();
#endif
#ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index 3834834c6bd7..8dfd6ac8774d 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -6,3 +6,16 @@ config WIIU
help
Select WIIU if configuring for the Nintendo Wii U.
More information at: <https://linux-wiiu.org/>
+
+config LATTEIPC_UDBG
+ bool "Chipset IPC udbg console for the Nintendo Wii U"
+ depends on WIIU
+ help
+ If you say yes to this option, support will be included for the
+ Wii U's chipset IPC as a udbg console.
+ These IPC messages can be received by a firmware running on the
+ console's "Starbuck" security coprocessor.
+
+ This driver bypasses the IPC layer completely.
+
+ If in doubt, say N here.
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index f66554cd5c45..b1e0e1307f6e 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.c b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
new file mode 100644
index 000000000000..9f46a0d19e81
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.c
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#include <mm/mmu_decl.h>
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/fixmap.h>
+
+#include "udbg_latteipc.h"
+
+#define LT_MMIO_BASE ((phys_addr_t)0x0d800000)
+#define LT_IPC_PPCMSG 0x00
+#define LT_IPC_PPCCTRL 0x04
+#define LT_IPC_PPCCTRL_X1 0x01
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+void __iomem *latteipc_io_base;
+
+/*
+ * Transmits a character.
+ * Sends over IPC to linux-loader for printing.
+ */
+static void latteipc_udbg_putc(char c)
+{
+ void __iomem *ppcmsg_reg = latteipc_io_base + LT_IPC_PPCMSG;
+ void __iomem *ppcctrl_reg = latteipc_io_base + LT_IPC_PPCCTRL;
+
+ out_be32(ppcmsg_reg, WIIU_LOADER_CMD_PRINT | (c << 16));
+ out_be32(ppcctrl_reg, LT_IPC_PPCCTRL_X1);
+
+ while (in_be32(ppcctrl_reg) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Retrieves and prepares the virtual address needed to access the hardware.
+ */
+static void __iomem *latteipc_udbg_setup_ipc_io_base(struct device_node *np)
+{
+ void __iomem *ipc_io_base = NULL;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ reg = of_get_property(np, "reg", NULL);
+ if (reg) {
+ paddr = of_translate_address(np, reg);
+ if (paddr)
+ ipc_io_base = ioremap(paddr, reg[1]);
+ }
+ return ipc_io_base;
+}
+
+/*
+ * Latte IPC udbg support initialization.
+ */
+void __init latteipc_udbg_init(void)
+{
+ struct device_node *np;
+ void __iomem *ipc_io_base;
+
+ if (latteipc_io_base)
+ udbg_printf("%s: early -> final\n", __func__);
+
+ np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
+ if (!np) {
+ udbg_printf("%s: IPC node not found\n", __func__);
+ goto out;
+ }
+
+ ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
+ if (!ipc_io_base) {
+ udbg_printf("%s: failed to setup IPC io base\n", __func__);
+ goto done;
+ }
+
+ udbg_putc = latteipc_udbg_putc;
+ udbg_printf("latteipc_udbg: ready\n");
+
+done:
+ of_node_put(np);
+out:
+ return;
+}
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+
+void __init udbg_init_latteipc(void)
+{
+ /*
+ * At this point we have a BAT already setup that enables I/O
+ * to the IPC hardware.
+ *
+ * The BAT uses a virtual address range reserved at the fixmap.
+ * This must match the virtual address configured in
+ * head_32.S:setup_latteipc_bat().
+ */
+ latteipc_io_base = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE);
+
+ /* Assume a firmware is present, add hooks */
+ udbg_putc = latteipc_udbg_putc;
+
+ /*
+ * Prepare again the same BAT for MMU_init.
+ * This allows udbg I/O to continue working after the MMU is
+ * turned on for real.
+ * It is safe to continue using the same virtual address as it is
+ * a reserved fixmap area.
+ */
+ setbat(1, (unsigned long)latteipc_io_base, LT_MMIO_BASE, 128 * 1024,
+ PAGE_KERNEL_NCG);
+}
+
+#endif /* CONFIG_PPC_EARLY_DEBUG_LATTEIPC */
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.h b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
new file mode 100644
index 000000000000..ca6d34e49158
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.h
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#ifndef __LATTEIPC_UDBG_H
+#define __LATTEIPC_UDBG_H
+
+#ifdef CONFIG_LATTEIPC_UDBG
+
+void __init latteipc_udbg_init(void);
+
+#else
+
+static inline void __init latteipc_udbg_init(void)
+{
+}
+
+#endif /* CONFIG_LATTEIPC_UDBG */
+
+#endif /* __LATTEIPC_UDBG_H */
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 06/11] powerpc: wiiu: udbg support for latteipc
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add support for using the Latte chipset IPC for udbg on the Nintendo Wii
U console.
These messages can then be received by a special firmware running on the
"Starbuck" coprocessor.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v2->v3: Fix a missing declaration issue by including latteipc_udbg.h.
v3->v4: Add missing of.h includes.
arch/powerpc/Kconfig.debug | 9 ++
arch/powerpc/include/asm/udbg.h | 1 +
arch/powerpc/kernel/head_book3s_32.S | 20 ++++
arch/powerpc/kernel/udbg.c | 3 +
arch/powerpc/platforms/wiiu/Kconfig | 13 ++
arch/powerpc/platforms/wiiu/Makefile | 2 +
arch/powerpc/platforms/wiiu/udbg_latteipc.c | 126 ++++++++++++++++++++
arch/powerpc/platforms/wiiu/udbg_latteipc.h | 27 +++++
8 files changed, 201 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.c
create mode 100644 arch/powerpc/platforms/wiiu/udbg_latteipc.h
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 6aaf8dc60610..b87343b0d1b4 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -254,6 +254,15 @@ config PPC_EARLY_DEBUG_USBGECKO
Select this to enable early debugging for Nintendo GameCube/Wii
consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_LATTEIPC
+ bool "Early debugging through Latte chipset IPC"
+ depends on WIIU
+ select LATTEIPC_UDBG
+ help
+ Select this to enable early debugging for Nintendo Wii U consoles via
+ chipset IPC to the security coprocessor. This assumes a firmware is
+ running on the coprocessor to receive messages.
+
config PPC_EARLY_DEBUG_PS3GELIC
bool "Early debugging through the PS3 Ethernet port"
depends on PPC_PS3
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index b1f094728b35..ef1367f146fd 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -53,6 +53,7 @@ void __init udbg_init_ps3gelic(void);
void __init udbg_init_debug_opal_raw(void);
void __init udbg_init_debug_opal_hvsi(void);
void __init udbg_init_debug_16550(void);
+void __init udbg_init_latteipc(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/kernel/head_book3s_32.S b/arch/powerpc/kernel/head_book3s_32.S
index 519b60695167..5b3b1c971feb 100644
--- a/arch/powerpc/kernel/head_book3s_32.S
+++ b/arch/powerpc/kernel/head_book3s_32.S
@@ -164,6 +164,9 @@ __after_mmu_off:
#ifdef CONFIG_PPC_EARLY_DEBUG_USBGECKO
bl setup_usbgecko_bat
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+ bl setup_latteipc_bat
+#endif
/*
* Call setup_cpu for CPU 0 and initialize 6xx Idle
@@ -1201,4 +1204,21 @@ setup_usbgecko_bat:
blr
#endif
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+setup_latteipc_bat:
+ /* prepare a BAT for early io */
+ lis r8, 0x0d80
+
+ /*
+ * The virtual address used must match the virtual address
+ * associated to the fixmap entry FIX_EARLY_DEBUG_BASE.
+ */
+ lis r11, 0xfffe /* top 128K */
+ ori r8, r8, 0x002a /* uncached, guarded ,rw */
+ ori r11, r11, 0x2 /* 128K, Vs=1, Vp=0 */
+ mtspr SPRN_DBAT1L, r8
+ mtspr SPRN_DBAT1U, r11
+ blr
+#endif
+
.data
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index 92b3fc258d11..b2ec88ef3cc1 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -69,6 +69,9 @@ void __init udbg_early_init(void)
udbg_init_debug_opal_hvsi();
#elif defined(CONFIG_PPC_EARLY_DEBUG_16550)
udbg_init_debug_16550();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_LATTEIPC)
+ /* For use on Nintendo Wii U */
+ udbg_init_latteipc();
#endif
#ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index 3834834c6bd7..8dfd6ac8774d 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -6,3 +6,16 @@ config WIIU
help
Select WIIU if configuring for the Nintendo Wii U.
More information at: <https://linux-wiiu.org/>
+
+config LATTEIPC_UDBG
+ bool "Chipset IPC udbg console for the Nintendo Wii U"
+ depends on WIIU
+ help
+ If you say yes to this option, support will be included for the
+ Wii U's chipset IPC as a udbg console.
+ These IPC messages can be received by a firmware running on the
+ console's "Starbuck" security coprocessor.
+
+ This driver bypasses the IPC layer completely.
+
+ If in doubt, say N here.
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index f66554cd5c45..b1e0e1307f6e 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
+
+obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.c b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
new file mode 100644
index 000000000000..9f46a0d19e81
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.c
@@ -0,0 +1,126 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.c
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#include <mm/mmu_decl.h>
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/fixmap.h>
+
+#include "udbg_latteipc.h"
+
+#define LT_MMIO_BASE ((phys_addr_t)0x0d800000)
+#define LT_IPC_PPCMSG 0x00
+#define LT_IPC_PPCCTRL 0x04
+#define LT_IPC_PPCCTRL_X1 0x01
+
+#define WIIU_LOADER_CMD_PRINT 0x01000000
+
+void __iomem *latteipc_io_base;
+
+/*
+ * Transmits a character.
+ * Sends over IPC to linux-loader for printing.
+ */
+static void latteipc_udbg_putc(char c)
+{
+ void __iomem *ppcmsg_reg = latteipc_io_base + LT_IPC_PPCMSG;
+ void __iomem *ppcctrl_reg = latteipc_io_base + LT_IPC_PPCCTRL;
+
+ out_be32(ppcmsg_reg, WIIU_LOADER_CMD_PRINT | (c << 16));
+ out_be32(ppcctrl_reg, LT_IPC_PPCCTRL_X1);
+
+ while (in_be32(ppcctrl_reg) & LT_IPC_PPCCTRL_X1)
+ barrier();
+}
+
+/*
+ * Retrieves and prepares the virtual address needed to access the hardware.
+ */
+static void __iomem *latteipc_udbg_setup_ipc_io_base(struct device_node *np)
+{
+ void __iomem *ipc_io_base = NULL;
+ phys_addr_t paddr;
+ const unsigned int *reg;
+
+ reg = of_get_property(np, "reg", NULL);
+ if (reg) {
+ paddr = of_translate_address(np, reg);
+ if (paddr)
+ ipc_io_base = ioremap(paddr, reg[1]);
+ }
+ return ipc_io_base;
+}
+
+/*
+ * Latte IPC udbg support initialization.
+ */
+void __init latteipc_udbg_init(void)
+{
+ struct device_node *np;
+ void __iomem *ipc_io_base;
+
+ if (latteipc_io_base)
+ udbg_printf("%s: early -> final\n", __func__);
+
+ np = of_find_compatible_node(NULL, NULL, "nintendo,latte-ipc");
+ if (!np) {
+ udbg_printf("%s: IPC node not found\n", __func__);
+ goto out;
+ }
+
+ ipc_io_base = latteipc_udbg_setup_ipc_io_base(np);
+ if (!ipc_io_base) {
+ udbg_printf("%s: failed to setup IPC io base\n", __func__);
+ goto done;
+ }
+
+ udbg_putc = latteipc_udbg_putc;
+ udbg_printf("latteipc_udbg: ready\n");
+
+done:
+ of_node_put(np);
+out:
+ return;
+}
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_LATTEIPC
+
+void __init udbg_init_latteipc(void)
+{
+ /*
+ * At this point we have a BAT already setup that enables I/O
+ * to the IPC hardware.
+ *
+ * The BAT uses a virtual address range reserved at the fixmap.
+ * This must match the virtual address configured in
+ * head_32.S:setup_latteipc_bat().
+ */
+ latteipc_io_base = (void __iomem *)__fix_to_virt(FIX_EARLY_DEBUG_BASE);
+
+ /* Assume a firmware is present, add hooks */
+ udbg_putc = latteipc_udbg_putc;
+
+ /*
+ * Prepare again the same BAT for MMU_init.
+ * This allows udbg I/O to continue working after the MMU is
+ * turned on for real.
+ * It is safe to continue using the same virtual address as it is
+ * a reserved fixmap area.
+ */
+ setbat(1, (unsigned long)latteipc_io_base, LT_MMIO_BASE, 128 * 1024,
+ PAGE_KERNEL_NCG);
+}
+
+#endif /* CONFIG_PPC_EARLY_DEBUG_LATTEIPC */
diff --git a/arch/powerpc/platforms/wiiu/udbg_latteipc.h b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
new file mode 100644
index 000000000000..ca6d34e49158
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/udbg_latteipc.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U udbg support (to Starbuck coprocessor, via chipset IPC)
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on arch/powerpc/platforms/embedded6xx/udbgecko_udbg.h
+ * Copyright (C) 2008-2009 The GameCube Linux Team
+ * Copyright (C) 2008-2009 Albert Herranz
+ */
+
+#ifndef __LATTEIPC_UDBG_H
+#define __LATTEIPC_UDBG_H
+
+#ifdef CONFIG_LATTEIPC_UDBG
+
+void __init latteipc_udbg_init(void);
+
+#else
+
+static inline void __init latteipc_udbg_init(void)
+{
+}
+
+#endif /* CONFIG_LATTEIPC_UDBG */
+
+#endif /* __LATTEIPC_UDBG_H */
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 07/11] powerpc: wiiu: espresso interrupt controller support
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add support for the "Espresso" interrupt controller in the Nintendo Wii
U.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Makefile | 1 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 +++++++++++++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 +++++++
3 files changed, 243 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index b1e0e1307f6e..aabf4b43e806 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WIIU) += espresso-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.c b/arch/powerpc/platforms/wiiu/espresso-pic.c
new file mode 100644
index 000000000000..1aa5d88002d5
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on flipper-pic.c
+ * Copyright (C) 2004-2009 The GameCube Linux Team
+ * Copyright (C) 2007-2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "espresso-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include "espresso-pic.h"
+
+static DEFINE_PER_CPU(struct espresso_pic *, espresso_pic_cpu);
+
+/*
+ * IRQ chip operations
+ */
+
+static void espresso_pic_mask_and_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+}
+
+static void espresso_pic_mask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_unmask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ setbits32(&pic->imr, mask);
+}
+
+static struct irq_chip espresso_pic_chip = {
+ .name = "espresso-pic",
+ .irq_ack = espresso_pic_ack,
+ .irq_mask_ack = espresso_pic_mask_and_ack,
+ .irq_mask = espresso_pic_mask,
+ .irq_unmask = espresso_pic_unmask,
+};
+
+/*
+ * Domain Ops
+ */
+
+static int espresso_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("espresso-pic: %s IRQ matches with this driver\n",
+ node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int espresso_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &espresso_pic_chip,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &espresso_pic_chip, h->host_data);
+ }
+ return 0;
+}
+
+static void espresso_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops espresso_pic_ops = {
+ .match = espresso_pic_match,
+ .alloc = espresso_pic_alloc,
+ .free = espresso_pic_free,
+};
+
+/* Store irq domain for espresso_pic_get_irq (the function gets no arguments) */
+static struct irq_domain *espresso_irq_domain;
+
+unsigned int espresso_pic_get_irq(void)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 irq_status, irq;
+
+ irq_status = in_be32(&pic->icr) & in_be32(&pic->imr);
+
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* Return first IRQ */
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(espresso_irq_domain, irq);
+}
+
+void __init espresso_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,espresso-pic");
+ struct irq_domain *host;
+ struct resource res;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &res) != 0) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct espresso_pic **pic = per_cpu_ptr(&espresso_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct espresso_pic) * cpu);
+
+ /* Mask and Ack all IRQs */
+ out_be32(&(*pic)->imr, 0);
+ out_be32(&(*pic)->icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np, ESPRESSO_NR_IRQS, &espresso_pic_ops,
+ NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ /* Save irq domain for espresso_pic_get_irq */
+ espresso_irq_domain = host;
+
+ irq_set_default_host(host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.h b/arch/powerpc/platforms/wiiu/espresso-pic.h
new file mode 100644
index 000000000000..b5b4e44ad60e
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __ESPRESSO_PIC_H
+#define __ESPRESSO_PIC_H
+
+/*
+ * Instead of using COS custom IRQ remapping, the normal IRQ mapping is used:
+ *
+ * IRQ Description
+ * -------------------------------------------
+ * 0 Error
+ * 1 Unused
+ * 2 Unused
+ * 3 Audio Interface (TV)
+ * 4 Unused
+ * 5 DSP Accelerator
+ * 6 DSP
+ * 7 DSP DMA
+ * 8 Unused
+ * 9 Unused
+ * 10 GPIPPC (?)
+ * 11 Unused
+ * 12 Audio Interface (Gamepad)
+ * 13 I2C
+ * 14 Unused
+ * 15 Unused
+ * 16 Unused
+ * 17 Unused
+ * 18 Unused
+ * 19 Unused
+ * 20 Unused
+ * 21 Unused
+ * 22 Unused
+ * 23 GX2
+ * 24 Latte IRQ Controller
+ * 25 Unused
+ * 26 IPC (CPU2)
+ * 27 Unused
+ * 28 IPC (CPU1)
+ * 29 Unused
+ * 30 IPC (CPU0)
+ * 31 Unused
+ */
+
+struct espresso_pic {
+ __be32 icr; /* Triggered IRQs */
+ __be32 imr; /* Allowed IRQs */
+} __packed;
+
+#define ESPRESSO_NR_IRQS 32
+
+unsigned int espresso_pic_get_irq(void);
+void espresso_pic_init(void);
+
+#endif
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 07/11] powerpc: wiiu: espresso interrupt controller support
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add support for the "Espresso" interrupt controller in the Nintendo Wii
U.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
arch/powerpc/platforms/wiiu/Makefile | 1 +
arch/powerpc/platforms/wiiu/espresso-pic.c | 183 +++++++++++++++++++++
arch/powerpc/platforms/wiiu/espresso-pic.h | 59 +++++++
3 files changed, 243 insertions(+)
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/espresso-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index b1e0e1307f6e..aabf4b43e806 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WIIU) += espresso-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.c b/arch/powerpc/platforms/wiiu/espresso-pic.c
new file mode 100644
index 000000000000..1aa5d88002d5
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on flipper-pic.c
+ * Copyright (C) 2004-2009 The GameCube Linux Team
+ * Copyright (C) 2007-2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "espresso-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/io.h>
+#include "espresso-pic.h"
+
+static DEFINE_PER_CPU(struct espresso_pic *, espresso_pic_cpu);
+
+/*
+ * IRQ chip operations
+ */
+
+static void espresso_pic_mask_and_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_ack(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ out_be32(&pic->icr, mask);
+}
+
+static void espresso_pic_mask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ clrbits32(&pic->imr, mask);
+}
+
+static void espresso_pic_unmask(struct irq_data *d)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 mask = 1 << irqd_to_hwirq(d);
+
+ setbits32(&pic->imr, mask);
+}
+
+static struct irq_chip espresso_pic_chip = {
+ .name = "espresso-pic",
+ .irq_ack = espresso_pic_ack,
+ .irq_mask_ack = espresso_pic_mask_and_ack,
+ .irq_mask = espresso_pic_mask,
+ .irq_unmask = espresso_pic_unmask,
+};
+
+/*
+ * Domain Ops
+ */
+
+static int espresso_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("espresso-pic: %s IRQ matches with this driver\n",
+ node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int espresso_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &espresso_pic_chip,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &espresso_pic_chip, h->host_data);
+ }
+ return 0;
+}
+
+static void espresso_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops espresso_pic_ops = {
+ .match = espresso_pic_match,
+ .alloc = espresso_pic_alloc,
+ .free = espresso_pic_free,
+};
+
+/* Store irq domain for espresso_pic_get_irq (the function gets no arguments) */
+static struct irq_domain *espresso_irq_domain;
+
+unsigned int espresso_pic_get_irq(void)
+{
+ struct espresso_pic *pic = *this_cpu_ptr(&espresso_pic_cpu);
+ u32 irq_status, irq;
+
+ irq_status = in_be32(&pic->icr) & in_be32(&pic->imr);
+
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* Return first IRQ */
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(espresso_irq_domain, irq);
+}
+
+void __init espresso_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,espresso-pic");
+ struct irq_domain *host;
+ struct resource res;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &res) != 0) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct espresso_pic **pic = per_cpu_ptr(&espresso_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct espresso_pic) * cpu);
+
+ /* Mask and Ack all IRQs */
+ out_be32(&(*pic)->imr, 0);
+ out_be32(&(*pic)->icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np, ESPRESSO_NR_IRQS, &espresso_pic_ops,
+ NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ /* Save irq domain for espresso_pic_get_irq */
+ espresso_irq_domain = host;
+
+ irq_set_default_host(host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/espresso-pic.h b/arch/powerpc/platforms/wiiu/espresso-pic.h
new file mode 100644
index 000000000000..b5b4e44ad60e
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/espresso-pic.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Espresso" interrupt controller support
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __ESPRESSO_PIC_H
+#define __ESPRESSO_PIC_H
+
+/*
+ * Instead of using COS custom IRQ remapping, the normal IRQ mapping is used:
+ *
+ * IRQ Description
+ * -------------------------------------------
+ * 0 Error
+ * 1 Unused
+ * 2 Unused
+ * 3 Audio Interface (TV)
+ * 4 Unused
+ * 5 DSP Accelerator
+ * 6 DSP
+ * 7 DSP DMA
+ * 8 Unused
+ * 9 Unused
+ * 10 GPIPPC (?)
+ * 11 Unused
+ * 12 Audio Interface (Gamepad)
+ * 13 I2C
+ * 14 Unused
+ * 15 Unused
+ * 16 Unused
+ * 17 Unused
+ * 18 Unused
+ * 19 Unused
+ * 20 Unused
+ * 21 Unused
+ * 22 Unused
+ * 23 GX2
+ * 24 Latte IRQ Controller
+ * 25 Unused
+ * 26 IPC (CPU2)
+ * 27 Unused
+ * 28 IPC (CPU1)
+ * 29 Unused
+ * 30 IPC (CPU0)
+ * 31 Unused
+ */
+
+struct espresso_pic {
+ __be32 icr; /* Triggered IRQs */
+ __be32 imr; /* Allowed IRQs */
+} __packed;
+
+#define ESPRESSO_NR_IRQS 32
+
+unsigned int espresso_pic_get_irq(void);
+void espresso_pic_init(void);
+
+#endif
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 08/11] powerpc: wiiu: latte interrupt controller support
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add support for the "Latte" interrupt controller in the Nintendo Wii U.
This controller is used for the entire SoC and is wired to a cascade
interrupt on the Espresso controller.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
v2->v3: Make latte_pic_get_irq static.
arch/powerpc/platforms/wiiu/Kconfig | 1 +
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 +++
4 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index 8dfd6ac8774d..40ecba8396a7 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,6 +3,7 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+ select IRQ_DOMAIN_HIERARCHY
help
Select WIIU if configuring for the Nintendo Wii U.
More information at: <https://linux-wiiu.org/>
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index aabf4b43e806..fa16c60261e6 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o
+obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.c b/arch/powerpc/platforms/wiiu/latte-pic.c
new file mode 100644
index 000000000000..7e3f49844166
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.c
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Latte" interrupt controller support.
+ * This is the controller for all the SoC devices, and has a cascade interrupt for the Espresso
+ * CPU interrupt controller.
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on hlwd-pic.c
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "latte-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/io.h>
+#include "latte-pic.h"
+
+static DEFINE_PER_CPU(struct lt_pic *, lt_pic_cpu);
+
+/*
+ * IRQ chip operations
+ * These handle both AHBALL and AHBLT IRQs, with AHBLT mapped above 32
+ */
+
+static void latte_pic_mask_and_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ }
+}
+
+static void latte_pic_mask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_unmask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ setbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ setbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static struct irq_chip latte_pic = {
+ .name = "latte-pic",
+ .irq_ack = latte_pic_ack,
+ .irq_mask_ack = latte_pic_mask_and_ack,
+ .irq_mask = latte_pic_mask,
+ .irq_unmask = latte_pic_unmask,
+};
+
+/*
+ * Domain ops
+ */
+
+static int latte_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("%s IRQ matches with this driver\n", node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int latte_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &latte_pic,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &latte_pic, h->host_data);
+ }
+ return 0;
+}
+
+static void latte_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops latte_pic_ops = {
+ .match = latte_pic_match,
+ .alloc = latte_pic_alloc,
+ .free = latte_pic_free,
+};
+
+/*
+ * Determinate if there are interrupts pending
+ * Checks AHBALL (0-32) and AHBLT (32-64)
+ */
+static unsigned int latte_pic_get_irq(struct irq_domain *h)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq_status, irq;
+
+ /* Check AHBALL first */
+ irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
+
+ if (irq_status == 0) {
+ /* Try AHBLT */
+ irq_status =
+ in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
+ irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
+ return irq_linear_revmap(h, irq);
+ }
+
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(h, irq);
+}
+
+/*
+ * Cascade IRQ handler
+ */
+static void latte_irq_cascade(struct irq_desc *desc)
+{
+ struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virq;
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
+ raw_spin_unlock(&desc->lock);
+
+ virq = latte_pic_get_irq(irq_domain);
+ if (virq)
+ generic_handle_irq(virq);
+ else
+ pr_err("spurious interrupt!\n");
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
+ if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
+ chip->irq_unmask(&desc->irq_data);
+ raw_spin_unlock(&desc->lock);
+}
+
+void __init latte_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,latte-pic");
+ struct irq_domain *host;
+ struct resource res;
+ int irq_cascade;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+ if (!of_get_property(np, "interrupts", NULL)) {
+ pr_err("could not find cascade interrupt!\n");
+ goto out;
+ }
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct lt_pic **pic = per_cpu_ptr(<_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct lt_pic) * cpu);
+
+ /* Mask and Ack CPU IRQs */
+ out_be32(&(*pic)->ahball_imr, 0);
+ out_be32(&(*pic)->ahball_icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np,
+ LATTE_AHBALL_NR_IRQS + LATTE_AHBLT_NR_IRQS,
+ &latte_pic_ops, NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ irq_cascade = irq_of_parse_and_map(np, 0);
+ irq_set_chained_handler_and_data(irq_cascade, latte_irq_cascade, host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.h b/arch/powerpc/platforms/wiiu/latte-pic.h
new file mode 100644
index 000000000000..7021d9497d35
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Latte" interrupt controller support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __LATTE_PIC_H
+#define __LATTE_PIC_H
+
+struct lt_pic {
+ __be32 ahball_icr; /* Triggered AHB IRQs (all) */
+ __be32 ahblt_icr; /* Triggered AHB IRQs (latte only) */
+ __be32 ahball_imr; /* Allowed AHB IRQs (all) */
+ __be32 ahblt_imr; /* Allowed AHB IRQs (latte only) */
+} __packed;
+
+#define LATTE_AHBALL_NR_IRQS 32
+#define LATTE_AHBLT_NR_IRQS 32
+
+void latte_pic_init(void);
+
+#endif
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 08/11] powerpc: wiiu: latte interrupt controller support
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add support for the "Latte" interrupt controller in the Nintendo Wii U.
This controller is used for the entire SoC and is wired to a cascade
interrupt on the Espresso controller.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
---
v2->v3: Make latte_pic_get_irq static.
arch/powerpc/platforms/wiiu/Kconfig | 1 +
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/latte-pic.c | 259 ++++++++++++++++++++++++
arch/powerpc/platforms/wiiu/latte-pic.h | 23 +++
4 files changed, 284 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.c
create mode 100644 arch/powerpc/platforms/wiiu/latte-pic.h
diff --git a/arch/powerpc/platforms/wiiu/Kconfig b/arch/powerpc/platforms/wiiu/Kconfig
index 8dfd6ac8774d..40ecba8396a7 100644
--- a/arch/powerpc/platforms/wiiu/Kconfig
+++ b/arch/powerpc/platforms/wiiu/Kconfig
@@ -3,6 +3,7 @@
config WIIU
bool "Nintendo Wii U"
depends on PPC_BOOK3S_32
+ select IRQ_DOMAIN_HIERARCHY
help
Select WIIU if configuring for the Nintendo Wii U.
More information at: <https://linux-wiiu.org/>
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index aabf4b43e806..fa16c60261e6 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o
+obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.c b/arch/powerpc/platforms/wiiu/latte-pic.c
new file mode 100644
index 000000000000..7e3f49844166
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.c
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U "Latte" interrupt controller support.
+ * This is the controller for all the SoC devices, and has a cascade interrupt for the Espresso
+ * CPU interrupt controller.
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ *
+ * Based on hlwd-pic.c
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ */
+
+#define DRV_MODULE_NAME "latte-pic"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+#include <linux/io.h>
+#include "latte-pic.h"
+
+static DEFINE_PER_CPU(struct lt_pic *, lt_pic_cpu);
+
+/*
+ * IRQ chip operations
+ * These handle both AHBALL and AHBLT IRQs, with AHBLT mapped above 32
+ */
+
+static void latte_pic_mask_and_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_ack(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ out_be32(&pic->ahball_icr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ out_be32(&pic->ahblt_icr, mask);
+ }
+}
+
+static void latte_pic_mask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ clrbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ clrbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static void latte_pic_unmask(struct irq_data *d)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq = irqd_to_hwirq(d);
+
+ if (irq < LATTE_AHBALL_NR_IRQS) {
+ u32 mask = 1 << irq;
+
+ setbits32(&pic->ahball_imr, mask);
+ } else {
+ u32 mask = 1 << (irq - 32);
+
+ setbits32(&pic->ahblt_imr, mask);
+ }
+}
+
+static struct irq_chip latte_pic = {
+ .name = "latte-pic",
+ .irq_ack = latte_pic_ack,
+ .irq_mask_ack = latte_pic_mask_and_ack,
+ .irq_mask = latte_pic_mask,
+ .irq_unmask = latte_pic_unmask,
+};
+
+/*
+ * Domain ops
+ */
+
+static int latte_pic_match(struct irq_domain *h, struct device_node *node,
+ enum irq_domain_bus_token bus_token)
+{
+ if (h->fwnode == &node->fwnode) {
+ pr_debug("%s IRQ matches with this driver\n", node->name);
+ return 1;
+ }
+ return 0;
+}
+
+static int latte_pic_alloc(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs, void *arg)
+{
+ unsigned int i;
+ struct irq_fwspec *fwspec = arg;
+ irq_hw_number_t hwirq = fwspec->param[0];
+
+ for (i = 0; i < nr_irqs; i++) {
+ irq_set_chip_data(virq + i, h->host_data);
+ irq_set_status_flags(virq + i, IRQ_LEVEL);
+ irq_set_chip_and_handler(virq + i, &latte_pic,
+ handle_level_irq);
+ irq_domain_set_hwirq_and_chip(h, virq + i, hwirq + i,
+ &latte_pic, h->host_data);
+ }
+ return 0;
+}
+
+static void latte_pic_free(struct irq_domain *h, unsigned int virq,
+ unsigned int nr_irqs)
+{
+ pr_debug("free\n");
+}
+
+const struct irq_domain_ops latte_pic_ops = {
+ .match = latte_pic_match,
+ .alloc = latte_pic_alloc,
+ .free = latte_pic_free,
+};
+
+/*
+ * Determinate if there are interrupts pending
+ * Checks AHBALL (0-32) and AHBLT (32-64)
+ */
+static unsigned int latte_pic_get_irq(struct irq_domain *h)
+{
+ struct lt_pic *pic = *this_cpu_ptr(<_pic_cpu);
+ u32 irq_status, irq;
+
+ /* Check AHBALL first */
+ irq_status = in_be32(&pic->ahball_icr) & in_be32(&pic->ahball_imr);
+
+ if (irq_status == 0) {
+ /* Try AHBLT */
+ irq_status =
+ in_be32(&pic->ahblt_icr) & in_be32(&pic->ahblt_imr);
+ if (irq_status == 0)
+ return 0; /* No IRQs pending */
+
+ /* AHBLT is mapped above 32 (LATTE_AHBALL_NR_IRQS) */
+ irq = __ffs(irq_status) + LATTE_AHBALL_NR_IRQS;
+ return irq_linear_revmap(h, irq);
+ }
+
+ irq = __ffs(irq_status);
+ return irq_linear_revmap(h, irq);
+}
+
+/*
+ * Cascade IRQ handler
+ */
+static void latte_irq_cascade(struct irq_desc *desc)
+{
+ struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ unsigned int virq;
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
+ raw_spin_unlock(&desc->lock);
+
+ virq = latte_pic_get_irq(irq_domain);
+ if (virq)
+ generic_handle_irq(virq);
+ else
+ pr_err("spurious interrupt!\n");
+
+ raw_spin_lock(&desc->lock);
+ chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
+ if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
+ chip->irq_unmask(&desc->irq_data);
+ raw_spin_unlock(&desc->lock);
+}
+
+void __init latte_pic_init(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, NULL, "nintendo,latte-pic");
+ struct irq_domain *host;
+ struct resource res;
+ int irq_cascade;
+ void __iomem *regbase;
+ unsigned int cpu;
+
+ if (!np) {
+ pr_err("could not find device node\n");
+ return;
+ }
+ if (!of_get_property(np, "interrupts", NULL)) {
+ pr_err("could not find cascade interrupt!\n");
+ goto out;
+ }
+
+ if (of_address_to_resource(np, 0, &res)) {
+ pr_err("could not find resource address\n");
+ goto out;
+ }
+
+ regbase = ioremap(res.start, resource_size(&res));
+ if (IS_ERR(regbase)) {
+ pr_err("could not map controller\n");
+ goto out;
+ }
+
+ for_each_present_cpu(cpu) {
+ struct lt_pic **pic = per_cpu_ptr(<_pic_cpu, cpu);
+
+ /* Compute pic address */
+ *pic = regbase + (sizeof(struct lt_pic) * cpu);
+
+ /* Mask and Ack CPU IRQs */
+ out_be32(&(*pic)->ahball_imr, 0);
+ out_be32(&(*pic)->ahball_icr, 0xFFFFFFFF);
+ }
+
+ host = irq_domain_add_linear(np,
+ LATTE_AHBALL_NR_IRQS + LATTE_AHBLT_NR_IRQS,
+ &latte_pic_ops, NULL);
+ if (!host) {
+ pr_err("failed to allocate irq_domain\n");
+ goto out;
+ }
+
+ irq_cascade = irq_of_parse_and_map(np, 0);
+ irq_set_chained_handler_and_data(irq_cascade, latte_irq_cascade, host);
+
+out:
+ of_node_put(np);
+}
diff --git a/arch/powerpc/platforms/wiiu/latte-pic.h b/arch/powerpc/platforms/wiiu/latte-pic.h
new file mode 100644
index 000000000000..7021d9497d35
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/latte-pic.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Nintendo Wii U "Latte" interrupt controller support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+
+#ifndef __LATTE_PIC_H
+#define __LATTE_PIC_H
+
+struct lt_pic {
+ __be32 ahball_icr; /* Triggered AHB IRQs (all) */
+ __be32 ahblt_icr; /* Triggered AHB IRQs (latte only) */
+ __be32 ahball_imr; /* Allowed AHB IRQs (all) */
+ __be32 ahblt_imr; /* Allowed AHB IRQs (latte only) */
+} __packed;
+
+#define LATTE_AHBALL_NR_IRQS 32
+#define LATTE_AHBLT_NR_IRQS 32
+
+void latte_pic_init(void);
+
+#endif
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 09/11] powerpc: espresso processor support
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Adds a cputable entry for the "Espresso" processor found on the Nintendo
Wii U, which has a PVR unrelated to other 750CL-like chips.
Only this revision has been seen in the wild.
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v3->v4: Move to new cpu_specs_*.h file.
arch/powerpc/kernel/cpu_specs_book3s_32.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/powerpc/kernel/cpu_specs_book3s_32.h b/arch/powerpc/kernel/cpu_specs_book3s_32.h
index 3714634d194a..c3cc0a019ba8 100644
--- a/arch/powerpc/kernel/cpu_specs_book3s_32.h
+++ b/arch/powerpc/kernel/cpu_specs_book3s_32.h
@@ -275,6 +275,21 @@ static struct cpu_spec cpu_specs[] __initdata = {
.machine_check = machine_check_generic,
.platform = "ppc750",
},
+ { /* "Espresso" (750CL-like) */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x70010201,
+ .cpu_name = "Espresso",
+ .cpu_features = CPU_FTRS_750CL,
+ .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
+ .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_750,
+ .machine_check = machine_check_generic,
+ .platform = "ppc750",
+ },
{ /* 745/755 */
.pvr_mask = 0xfffff000,
.pvr_value = 0x00083000,
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 09/11] powerpc: espresso processor support
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Adds a cputable entry for the "Espresso" processor found on the Nintendo
Wii U, which has a PVR unrelated to other 750CL-like chips.
Only this revision has been seen in the wild.
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Ash Logan <ash@heyquark.com>
---
v3->v4: Move to new cpu_specs_*.h file.
arch/powerpc/kernel/cpu_specs_book3s_32.h | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/powerpc/kernel/cpu_specs_book3s_32.h b/arch/powerpc/kernel/cpu_specs_book3s_32.h
index 3714634d194a..c3cc0a019ba8 100644
--- a/arch/powerpc/kernel/cpu_specs_book3s_32.h
+++ b/arch/powerpc/kernel/cpu_specs_book3s_32.h
@@ -275,6 +275,21 @@ static struct cpu_spec cpu_specs[] __initdata = {
.machine_check = machine_check_generic,
.platform = "ppc750",
},
+ { /* "Espresso" (750CL-like) */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x70010201,
+ .cpu_name = "Espresso",
+ .cpu_features = CPU_FTRS_750CL,
+ .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
+ .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .num_pmcs = 4,
+ .pmc_type = PPC_PMC_IBM,
+ .cpu_setup = __setup_cpu_750,
+ .machine_check = machine_check_generic,
+ .platform = "ppc750",
+ },
{ /* 745/755 */
.pvr_mask = 0xfffff000,
.pvr_value = 0x00083000,
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 10/11] powerpc: wiiu: platform support
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Add platform support for the Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v2->v3: Use of_platform_default_populate instead of a custom match table.
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/setup.c | 60 ++++++++++++++++++++++++++++
2 files changed, 61 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index fa16c60261e6..abcb7a1beebf 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
+obj-$(CONFIG_WIIU) += setup.o espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/setup.c b/arch/powerpc/platforms/wiiu/setup.c
new file mode 100644
index 000000000000..e3f07ce65cad
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/setup.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U board-specific support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+#define DRV_MODULE_NAME "wiiu"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "espresso-pic.h"
+#include "latte-pic.h"
+#include "udbg_latteipc.h"
+
+static int __init wiiu_probe(void)
+{
+ if (!of_machine_is_compatible("nintendo,wiiu"))
+ return 0;
+
+ latteipc_udbg_init();
+
+ return 1;
+}
+
+static void __noreturn wiiu_halt(void)
+{
+ for (;;)
+ cpu_relax();
+}
+
+static void __init wiiu_init_irq(void)
+{
+ espresso_pic_init();
+ latte_pic_init();
+}
+
+static int __init wiiu_device_probe(void)
+{
+ if (!machine_is(wiiu))
+ return 0;
+
+ of_platform_default_populate(NULL, NULL, NULL);
+ return 0;
+}
+device_initcall(wiiu_device_probe);
+
+define_machine(wiiu) {
+ .name = "wiiu",
+ .probe = wiiu_probe,
+ .halt = wiiu_halt,
+ .progress = udbg_progress,
+ .calibrate_decr = generic_calibrate_decr,
+ .init_IRQ = wiiu_init_irq,
+ .get_irq = espresso_pic_get_irq,
+};
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 10/11] powerpc: wiiu: platform support
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Add platform support for the Nintendo Wii U console.
Signed-off-by: Ash Logan <ash@heyquark.com>
Co-developed-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Signed-off-by: Roberto Van Eeden <rw-r-r-0644@protonmail.com>
Co-developed-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
Signed-off-by: Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
---
v2->v3: Use of_platform_default_populate instead of a custom match table.
arch/powerpc/platforms/wiiu/Makefile | 2 +-
arch/powerpc/platforms/wiiu/setup.c | 60 ++++++++++++++++++++++++++++
2 files changed, 61 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/wiiu/setup.c
diff --git a/arch/powerpc/platforms/wiiu/Makefile b/arch/powerpc/platforms/wiiu/Makefile
index fa16c60261e6..abcb7a1beebf 100644
--- a/arch/powerpc/platforms/wiiu/Makefile
+++ b/arch/powerpc/platforms/wiiu/Makefile
@@ -1,4 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
-obj-$(CONFIG_WIIU) += espresso-pic.o latte-pic.o
+obj-$(CONFIG_WIIU) += setup.o espresso-pic.o latte-pic.o
obj-$(CONFIG_LATTEIPC_UDBG) += udbg_latteipc.o
diff --git a/arch/powerpc/platforms/wiiu/setup.c b/arch/powerpc/platforms/wiiu/setup.c
new file mode 100644
index 000000000000..e3f07ce65cad
--- /dev/null
+++ b/arch/powerpc/platforms/wiiu/setup.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Nintendo Wii U board-specific support
+ *
+ * Copyright (C) 2022 The linux-wiiu Team
+ */
+#define DRV_MODULE_NAME "wiiu"
+#define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/udbg.h>
+
+#include "espresso-pic.h"
+#include "latte-pic.h"
+#include "udbg_latteipc.h"
+
+static int __init wiiu_probe(void)
+{
+ if (!of_machine_is_compatible("nintendo,wiiu"))
+ return 0;
+
+ latteipc_udbg_init();
+
+ return 1;
+}
+
+static void __noreturn wiiu_halt(void)
+{
+ for (;;)
+ cpu_relax();
+}
+
+static void __init wiiu_init_irq(void)
+{
+ espresso_pic_init();
+ latte_pic_init();
+}
+
+static int __init wiiu_device_probe(void)
+{
+ if (!machine_is(wiiu))
+ return 0;
+
+ of_platform_default_populate(NULL, NULL, NULL);
+ return 0;
+}
+device_initcall(wiiu_device_probe);
+
+define_machine(wiiu) {
+ .name = "wiiu",
+ .probe = wiiu_probe,
+ .halt = wiiu_halt,
+ .progress = udbg_progress,
+ .calibrate_decr = generic_calibrate_decr,
+ .init_IRQ = wiiu_init_irq,
+ .get_irq = espresso_pic_get_irq,
+};
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 11/11] powerpc: wiiu: add minimal default config
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 11:30 ` Ash Logan
-1 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: linux-kernel, linuxppc-dev, j.ne, linkmauve, rw-r-r-0644,
devicetree, joel
Adds a bare-minimum config to get a kernel compiled. Will need some more
interesting options once a storage device to boot from is added.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/configs/wiiu_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/powerpc/configs/wiiu_defconfig
diff --git a/arch/powerpc/configs/wiiu_defconfig b/arch/powerpc/configs/wiiu_defconfig
new file mode 100644
index 000000000000..a761ebcdd9f2
--- /dev/null
+++ b/arch/powerpc/configs/wiiu_defconfig
@@ -0,0 +1,7 @@
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_WIIU=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_HIGHMEM=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_PPC_EARLY_DEBUG=y
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* [PATCH v4 11/11] powerpc: wiiu: add minimal default config
@ 2022-11-19 11:30 ` Ash Logan
0 siblings, 0 replies; 170+ messages in thread
From: Ash Logan @ 2022-11-19 11:30 UTC (permalink / raw)
To: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, robh+dt,
benh, segher, pali
Cc: devicetree, linkmauve, linux-kernel, rw-r-r-0644, joel,
linuxppc-dev, j.ne
Adds a bare-minimum config to get a kernel compiled. Will need some more
interesting options once a storage device to boot from is added.
Signed-off-by: Ash Logan <ash@heyquark.com>
---
arch/powerpc/configs/wiiu_defconfig | 7 +++++++
1 file changed, 7 insertions(+)
create mode 100644 arch/powerpc/configs/wiiu_defconfig
diff --git a/arch/powerpc/configs/wiiu_defconfig b/arch/powerpc/configs/wiiu_defconfig
new file mode 100644
index 000000000000..a761ebcdd9f2
--- /dev/null
+++ b/arch/powerpc/configs/wiiu_defconfig
@@ -0,0 +1,7 @@
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_PMAC is not set
+CONFIG_WIIU=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_HIGHMEM=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_PPC_EARLY_DEBUG=y
--
2.38.1
^ permalink raw reply related [flat|nested] 170+ messages in thread
* Re: [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-11-19 11:30 ` Ash Logan
@ 2022-11-19 21:36 ` Rob Herring
-1 siblings, 0 replies; 170+ messages in thread
From: Rob Herring @ 2022-11-19 21:36 UTC (permalink / raw)
To: Ash Logan
Cc: mpe, benh, segher, linkmauve, robh+dt, linux-kernel, j.ne,
christophe.leroy, rw-r-r-0644, linuxppc-dev, pali,
krzysztof.kozlowski+dt, devicetree, joel, paulus
On Sat, 19 Nov 2022 22:30:31 +1100, Ash Logan wrote:
> Adds schema for the various Wii U devicetree nodes used.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> v3->v4: Rework to match expected style and conciceness.
>
> .../bindings/powerpc/nintendo/wiiu.yaml | 25 +++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 +++++++++++
> .../devicetree/bindings/usb/generic-ehci.yaml | 1 +
> 9 files changed, 333 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/fsl,spba-bus.example.dtb: spba-bus@30000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/arm,integrator-ap-lm.example.dtb: bus@c0000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/arm,integrator-ap-lm.example.dtb: bus@c0000000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/baikal,bt1-apb.example.dtb: bus@1f059000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/baikal,bt1-axi.example.dtb: bus@1f05a000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.example.dtb: bus@100000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.example.dtb: bus@100000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.example.dtb: bus@100000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.example.dtb: bus@100000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.example.dtb: bus@28380000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.example.dtb: bus@28380000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/iio/dac/fsl,vf610-dac.example.dtb: bus@40000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/stm32/st,mlahb.example.dtb: ahb@38000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.example.dtb: bus@30000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/imx/imx8m-soc.example.dtb: soc@0: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.example.dtb: bus@80000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.example.dtb: bus@80000000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221119113041.284419-2-ash@heyquark.com
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2022-11-19 21:36 ` Rob Herring
0 siblings, 0 replies; 170+ messages in thread
From: Rob Herring @ 2022-11-19 21:36 UTC (permalink / raw)
To: Ash Logan
Cc: devicetree, pali, linkmauve, linux-kernel, joel, robh+dt, paulus,
rw-r-r-0644, krzysztof.kozlowski+dt, linuxppc-dev, j.ne
On Sat, 19 Nov 2022 22:30:31 +1100, Ash Logan wrote:
> Adds schema for the various Wii U devicetree nodes used.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> v3->v4: Rework to match expected style and conciceness.
>
> .../bindings/powerpc/nintendo/wiiu.yaml | 25 +++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 +++++++++++
> .../devicetree/bindings/usb/generic-ehci.yaml | 1 +
> 9 files changed, 333 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/fsl,spba-bus.example.dtb: spba-bus@30000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/arm,integrator-ap-lm.example.dtb: bus@c0000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/arm,integrator-ap-lm.example.dtb: bus@c0000000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/baikal,bt1-apb.example.dtb: bus@1f059000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/bus/baikal,bt1-axi.example.dtb: bus@1f05a000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.example.dtb: bus@100000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.example.dtb: bus@100000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.example.dtb: bus@100000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.example.dtb: bus@100000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.example.dtb: bus@28380000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.example.dtb: bus@28380000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/iio/dac/fsl,vf610-dac.example.dtb: bus@40000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/arm/stm32/st,mlahb.example.dtb: ahb@38000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/imx/fsl,aips-bus.example.dtb: bus@30000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/imx/imx8m-soc.example.dtb: soc@0: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.example.dtb: bus@80000000: compatible:0: 'nintendo,latte' was expected
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.example.dtb: bus@80000000: compatible: ['simple-bus'] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221119113041.284419-2-ash@heyquark.com
This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command.
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-11-19 11:30 ` Ash Logan
@ 2022-11-20 15:30 ` Rob Herring
-1 siblings, 0 replies; 170+ messages in thread
From: Rob Herring @ 2022-11-20 15:30 UTC (permalink / raw)
To: Ash Logan
Cc: krzysztof.kozlowski+dt, paulus, mpe, christophe.leroy, benh,
segher, pali, linux-kernel, linuxppc-dev, j.ne, linkmauve,
rw-r-r-0644, devicetree, joel
On Sat, Nov 19, 2022 at 10:30:31PM +1100, Ash Logan wrote:
> Adds schema for the various Wii U devicetree nodes used.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> v3->v4: Rework to match expected style and conciceness.
>
> .../bindings/powerpc/nintendo/wiiu.yaml | 25 +++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 +++++++++++
> .../devicetree/bindings/usb/generic-ehci.yaml | 1 +
> 9 files changed, 333 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> new file mode 100644
> index 000000000000..23703b1052d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> @@ -0,0 +1,25 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U bindings
Everything is a binding, so drop 'bindings'.
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
Don't need '|' if no formatting.
> + Nintendo Wii U video game console binding.
> +
> +properties:
> + $nodename:
> + const: "/"
> +
> + compatible:
> + const: nintendo,wiiu
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> new file mode 100644
> index 000000000000..476a8ccda7a1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U "Espresso" interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
> +
> +allOf:
> + - $ref: "/schemas/interrupt-controller.yaml#"
Drop quotes.
> +
> +properties:
> + compatible:
> + const: nintendo,espresso-pic
> +
> + '#interrupt-cells':
> + # Interrupt numbers 0-32 in one cell
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + interrupt-controller@c000078 {
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> new file mode 100644
> index 000000000000..d44ebe0d866c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte "GPU7" graphics processor
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
Wrap lines at 80 unless some advantage to 100.
> + Nintendo Wii U.
> +
> +properties:
> + compatible:
> + const: nintendo,latte-gpu7
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + gpu@c200000 {
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> new file mode 100644
> index 000000000000..a53971a11e89
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte AHCI controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
> +
> +allOf:
> + - $ref: "/schemas/ata/ahci-common.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,latte-ahci
> +
> + reg:
> + items:
> + - description: |
> + HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
> + registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
> +
> + interrupts:
> + items:
> + - description: Main HBA interrupt
> + - description: Vendor debugging interrupt
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sata@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x408>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38>, <28>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> new file mode 100644
> index 000000000000..772afe0c298c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte DSP
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U digital signal processor, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + const: nintendo,latte-dsp
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> new file mode 100644
> index 000000000000..4b71d6b9b14d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
> +
> +allOf:
> + - $ref: "/schemas/interrupt-controller.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,latte-pic
> +
> + '#interrupt-cells':
> + # Interrupt numbers 0-64 in one cell.
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: Cascade interrupt for Espresso PIC
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + interrupt-controller@d800440 {
> + compatible = "nintendo,latte-pic";
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + reg = <0x0d800440 0x30>;
> +
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> new file mode 100644
> index 000000000000..25d474fca679
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte SD Host controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
> +
> +allOf:
> + - $ref: "/schemas/mmc/mmc-controller.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - const: nintendo,latte-sdhci
> + - const: sdhci
Just 'sdhci' is not too useful. *All* SDHCI controllers have quirks.
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + mmc@d070000 {
> + compatible = "nintendo,latte-sdhci", "sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> new file mode 100644
> index 000000000000..6fdf93622fcc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> @@ -0,0 +1,31 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Latte system bus
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
> +
> +allOf:
> + - $ref: "/schemas/simple-bus.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - const: nintendo,latte
> + - const: simple-bus
If truly 'simple', then you don't need 'nintendo,latte'.
Otherwise, you need a custom 'select' schema to not select all cases of
'simple-bus'.
> +
> +
one blank line
> +required:
> + - compatible
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> index c5f629c5bc61..9f69b5ab21ff 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> @@ -69,6 +69,7 @@ properties:
> - ibm,usb-ehci-440epx
> - ibm,usb-ehci-460ex
> - nintendo,hollywood-usb-ehci
> + - nintendo,latte-ehci
> - st,spear600-ehci
> - const: usb-ehci
> - enum:
> --
> 2.38.1
>
>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2022-11-20 15:30 ` Rob Herring
0 siblings, 0 replies; 170+ messages in thread
From: Rob Herring @ 2022-11-20 15:30 UTC (permalink / raw)
To: Ash Logan
Cc: devicetree, linkmauve, linuxppc-dev, linux-kernel, joel, paulus,
rw-r-r-0644, krzysztof.kozlowski+dt, pali, j.ne
On Sat, Nov 19, 2022 at 10:30:31PM +1100, Ash Logan wrote:
> Adds schema for the various Wii U devicetree nodes used.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
> ---
> v3->v4: Rework to match expected style and conciceness.
>
> .../bindings/powerpc/nintendo/wiiu.yaml | 25 +++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 +++++++++++
> .../devicetree/bindings/usb/generic-ehci.yaml | 1 +
> 9 files changed, 333 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> new file mode 100644
> index 000000000000..23703b1052d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> @@ -0,0 +1,25 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U bindings
Everything is a binding, so drop 'bindings'.
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
Don't need '|' if no formatting.
> + Nintendo Wii U video game console binding.
> +
> +properties:
> + $nodename:
> + const: "/"
> +
> + compatible:
> + const: nintendo,wiiu
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> new file mode 100644
> index 000000000000..476a8ccda7a1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U "Espresso" interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
> +
> +allOf:
> + - $ref: "/schemas/interrupt-controller.yaml#"
Drop quotes.
> +
> +properties:
> + compatible:
> + const: nintendo,espresso-pic
> +
> + '#interrupt-cells':
> + # Interrupt numbers 0-32 in one cell
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + interrupt-controller@c000078 {
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> new file mode 100644
> index 000000000000..d44ebe0d866c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte "GPU7" graphics processor
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
Wrap lines at 80 unless some advantage to 100.
> + Nintendo Wii U.
> +
> +properties:
> + compatible:
> + const: nintendo,latte-gpu7
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + gpu@c200000 {
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> new file mode 100644
> index 000000000000..a53971a11e89
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte AHCI controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
> +
> +allOf:
> + - $ref: "/schemas/ata/ahci-common.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,latte-ahci
> +
> + reg:
> + items:
> + - description: |
> + HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
> + registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
> +
> + interrupts:
> + items:
> + - description: Main HBA interrupt
> + - description: Vendor debugging interrupt
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sata@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x408>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38>, <28>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> new file mode 100644
> index 000000000000..772afe0c298c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte DSP
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U digital signal processor, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + const: nintendo,latte-dsp
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> new file mode 100644
> index 000000000000..4b71d6b9b14d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
> +
> +allOf:
> + - $ref: "/schemas/interrupt-controller.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,latte-pic
> +
> + '#interrupt-cells':
> + # Interrupt numbers 0-64 in one cell.
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: Cascade interrupt for Espresso PIC
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + interrupt-controller@d800440 {
> + compatible = "nintendo,latte-pic";
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + reg = <0x0d800440 0x30>;
> +
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> new file mode 100644
> index 000000000000..25d474fca679
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte SD Host controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
> +
> +allOf:
> + - $ref: "/schemas/mmc/mmc-controller.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - const: nintendo,latte-sdhci
> + - const: sdhci
Just 'sdhci' is not too useful. *All* SDHCI controllers have quirks.
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + mmc@d070000 {
> + compatible = "nintendo,latte-sdhci", "sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> new file mode 100644
> index 000000000000..6fdf93622fcc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> @@ -0,0 +1,31 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Latte system bus
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
> +
> +allOf:
> + - $ref: "/schemas/simple-bus.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - const: nintendo,latte
> + - const: simple-bus
If truly 'simple', then you don't need 'nintendo,latte'.
Otherwise, you need a custom 'select' schema to not select all cases of
'simple-bus'.
> +
> +
one blank line
> +required:
> + - compatible
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> index c5f629c5bc61..9f69b5ab21ff 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> @@ -69,6 +69,7 @@ properties:
> - ibm,usb-ehci-440epx
> - ibm,usb-ehci-460ex
> - nintendo,hollywood-usb-ehci
> + - nintendo,latte-ehci
> - st,spear600-ehci
> - const: usb-ehci
> - enum:
> --
> 2.38.1
>
>
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2022-11-19 11:30 ` Ash Logan
@ 2024-02-20 16:20 ` Christophe Leroy
-1 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2024-02-20 16:20 UTC (permalink / raw)
To: mpe
Cc: linux-kernel, linuxppc-dev, paulus, j.ne, linkmauve, Ash Logan,
pali, segher, robh+dt, rw-r-r-0644, devicetree, joel,
krzysztof.kozlowski+dt, benh
Michael,
Le 19/11/2022 à 12:30, Ash Logan a écrit :
> Adds schema for the various Wii U devicetree nodes used.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
There's an issue at https://github.com/linuxppc/issues/issues/410 with
kernel v6.4 as a target to merging thing, any plan ?
It still applies without rebase (with git am -3).
Christophe
> ---
> v3->v4: Rework to match expected style and conciceness.
>
> .../bindings/powerpc/nintendo/wiiu.yaml | 25 +++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 +++++++++++
> .../devicetree/bindings/usb/generic-ehci.yaml | 1 +
> 9 files changed, 333 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> new file mode 100644
> index 000000000000..23703b1052d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> @@ -0,0 +1,25 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U bindings
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U video game console binding.
> +
> +properties:
> + $nodename:
> + const: "/"
> +
> + compatible:
> + const: nintendo,wiiu
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> new file mode 100644
> index 000000000000..476a8ccda7a1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U "Espresso" interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
> +
> +allOf:
> + - $ref: "/schemas/interrupt-controller.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,espresso-pic
> +
> + '#interrupt-cells':
> + # Interrupt numbers 0-32 in one cell
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + interrupt-controller@c000078 {
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> new file mode 100644
> index 000000000000..d44ebe0d866c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte "GPU7" graphics processor
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
> + Nintendo Wii U.
> +
> +properties:
> + compatible:
> + const: nintendo,latte-gpu7
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + gpu@c200000 {
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> new file mode 100644
> index 000000000000..a53971a11e89
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte AHCI controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
> +
> +allOf:
> + - $ref: "/schemas/ata/ahci-common.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,latte-ahci
> +
> + reg:
> + items:
> + - description: |
> + HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
> + registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
> +
> + interrupts:
> + items:
> + - description: Main HBA interrupt
> + - description: Vendor debugging interrupt
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sata@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x408>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38>, <28>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> new file mode 100644
> index 000000000000..772afe0c298c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte DSP
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U digital signal processor, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + const: nintendo,latte-dsp
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> new file mode 100644
> index 000000000000..4b71d6b9b14d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
> +
> +allOf:
> + - $ref: "/schemas/interrupt-controller.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,latte-pic
> +
> + '#interrupt-cells':
> + # Interrupt numbers 0-64 in one cell.
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: Cascade interrupt for Espresso PIC
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + interrupt-controller@d800440 {
> + compatible = "nintendo,latte-pic";
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + reg = <0x0d800440 0x30>;
> +
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> new file mode 100644
> index 000000000000..25d474fca679
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte SD Host controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
> +
> +allOf:
> + - $ref: "/schemas/mmc/mmc-controller.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - const: nintendo,latte-sdhci
> + - const: sdhci
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + mmc@d070000 {
> + compatible = "nintendo,latte-sdhci", "sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> new file mode 100644
> index 000000000000..6fdf93622fcc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> @@ -0,0 +1,31 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Latte system bus
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
> +
> +allOf:
> + - $ref: "/schemas/simple-bus.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - const: nintendo,latte
> + - const: simple-bus
> +
> +
> +required:
> + - compatible
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> index c5f629c5bc61..9f69b5ab21ff 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> @@ -69,6 +69,7 @@ properties:
> - ibm,usb-ehci-440epx
> - ibm,usb-ehci-460ex
> - nintendo,hollywood-usb-ehci
> + - nintendo,latte-ehci
> - st,spear600-ehci
> - const: usb-ehci
> - enum:
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2024-02-20 16:20 ` Christophe Leroy
0 siblings, 0 replies; 170+ messages in thread
From: Christophe Leroy @ 2024-02-20 16:20 UTC (permalink / raw)
To: mpe
Cc: devicetree, linkmauve, pali, linux-kernel, rw-r-r-0644, joel,
robh+dt, paulus, Ash Logan, krzysztof.kozlowski+dt, linuxppc-dev,
j.ne
Michael,
Le 19/11/2022 à 12:30, Ash Logan a écrit :
> Adds schema for the various Wii U devicetree nodes used.
>
> Signed-off-by: Ash Logan <ash@heyquark.com>
There's an issue at https://github.com/linuxppc/issues/issues/410 with
kernel v6.4 as a target to merging thing, any plan ?
It still applies without rebase (with git am -3).
Christophe
> ---
> v3->v4: Rework to match expected style and conciceness.
>
> .../bindings/powerpc/nintendo/wiiu.yaml | 25 +++++++++
> .../powerpc/nintendo/wiiu/espresso-pic.yaml | 48 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/gpu7.yaml | 42 ++++++++++++++
> .../powerpc/nintendo/wiiu/latte-ahci.yaml | 50 +++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-dsp.yaml | 35 ++++++++++++
> .../powerpc/nintendo/wiiu/latte-pic.yaml | 55 +++++++++++++++++++
> .../powerpc/nintendo/wiiu/latte-sdhci.yaml | 46 ++++++++++++++++
> .../bindings/powerpc/nintendo/wiiu/latte.yaml | 31 +++++++++++
> .../devicetree/bindings/usb/generic-ehci.yaml | 1 +
> 9 files changed, 333 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> create mode 100644 Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
>
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> new file mode 100644
> index 000000000000..23703b1052d0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu.yaml
> @@ -0,0 +1,25 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U bindings
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U video game console binding.
> +
> +properties:
> + $nodename:
> + const: "/"
> +
> + compatible:
> + const: nintendo,wiiu
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> new file mode 100644
> index 000000000000..476a8ccda7a1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/espresso-pic.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/espresso-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U "Espresso" interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Espresso" processor.
> +
> +allOf:
> + - $ref: "/schemas/interrupt-controller.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,espresso-pic
> +
> + '#interrupt-cells':
> + # Interrupt numbers 0-32 in one cell
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + interrupt-controller@c000078 {
> + compatible = "nintendo,espresso-pic";
> + reg = <0x0c000078 0x18>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> new file mode 100644
> index 000000000000..d44ebe0d866c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/gpu7.yaml
> @@ -0,0 +1,42 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/gpu7.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte "GPU7" graphics processor
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + GPU7 graphics processor, also known as "GX2", found in the Latte multifunction chip of the
> + Nintendo Wii U.
> +
> +properties:
> + compatible:
> + const: nintendo,latte-gpu7
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + gpu@c200000 {
> + compatible = "nintendo,latte-gpu7";
> + reg = <0x0c200000 0x80000>;
> + interrupts = <2>;
> + interrupt-parent = <&espresso_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> new file mode 100644
> index 000000000000..a53971a11e89
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-ahci.yaml
> @@ -0,0 +1,50 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-ahci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte AHCI controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U AHCI SATA controller, as found in the Latte chip.
> +
> +allOf:
> + - $ref: "/schemas/ata/ahci-common.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,latte-ahci
> +
> + reg:
> + items:
> + - description: |
> + HBA memory registers. Note that unlike the spec, space for only 6 ports exist, with 2 vendor
> + registers afterwards, thus register space should be 0x408 long (0x100+0x80*6+0x8).
> +
> + interrupts:
> + items:
> + - description: Main HBA interrupt
> + - description: Vendor debugging interrupt
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + sata@d160400 {
> + compatible = "nintendo,latte-ahci";
> + reg = <0x0d160400 0x408>;
> +
> + interrupt-parent = <&latte_pic>;
> + interrupts = <38>, <28>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> new file mode 100644
> index 000000000000..772afe0c298c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-dsp.yaml
> @@ -0,0 +1,35 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-dsp.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte DSP
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Nintendo Wii U digital signal processor, as found in the Latte chip.
> +
> +properties:
> + compatible:
> + const: nintendo,latte-dsp
> +
> + reg:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + dsp@c005000 {
> + compatible = "nintendo,latte-dsp";
> + reg = <0x0c005000 0x200>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> new file mode 100644
> index 000000000000..4b71d6b9b14d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-pic.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-pic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte interrupt controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Interrupt controller found on the Nintendo Wii U for the "Latte" devices.
> +
> +allOf:
> + - $ref: "/schemas/interrupt-controller.yaml#"
> +
> +properties:
> + compatible:
> + const: nintendo,latte-pic
> +
> + '#interrupt-cells':
> + # Interrupt numbers 0-64 in one cell.
> + const: 1
> +
> + interrupt-controller: true
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + items:
> + - description: Cascade interrupt for Espresso PIC
> +
> +required:
> + - compatible
> + - '#interrupt-cells'
> + - interrupt-controller
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + interrupt-controller@d800440 {
> + compatible = "nintendo,latte-pic";
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + reg = <0x0d800440 0x30>;
> +
> + interrupt-parent = <&espresso_pic>;
> + interrupts = <24>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> new file mode 100644
> index 000000000000..25d474fca679
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte-sdhci.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte-sdhci.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Nintendo Wii U Latte SD Host controller
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + SDHCI hosts found on the Nintendo Wii U's Latte SoC for SD cards and SDIO devices.
> +
> +allOf:
> + - $ref: "/schemas/mmc/mmc-controller.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - const: nintendo,latte-sdhci
> + - const: sdhci
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + mmc@d070000 {
> + compatible = "nintendo,latte-sdhci", "sdhci";
> + reg = <0x0d070000 0x200>;
> + interrupts = <7>;
> + interrupt-parent = <&latte_pic>;
> + };
> +...
> diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> new file mode 100644
> index 000000000000..6fdf93622fcc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/powerpc/nintendo/wiiu/latte.yaml
> @@ -0,0 +1,31 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/powerpc/nintendo/wiiu/latte.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Latte system bus
> +
> +maintainers:
> + - Ash Logan <ash@heyquark.com>
> + - Emmanuel Gil Peyrot <linkmauve@linkmauve.fr>
> +
> +description: |
> + Latte multi-function SoC, containing many of the devices found on the Nintendo Wii U.
> +
> +allOf:
> + - $ref: "/schemas/simple-bus.yaml#"
> +
> +properties:
> + compatible:
> + items:
> + - const: nintendo,latte
> + - const: simple-bus
> +
> +
> +required:
> + - compatible
> +
> +additionalProperties: true
> +
> +...
> diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> index c5f629c5bc61..9f69b5ab21ff 100644
> --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml
> @@ -69,6 +69,7 @@ properties:
> - ibm,usb-ehci-440epx
> - ibm,usb-ehci-460ex
> - nintendo,hollywood-usb-ehci
> + - nintendo,latte-ehci
> - st,spear600-ehci
> - const: usb-ehci
> - enum:
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
2024-02-20 16:20 ` Christophe Leroy
@ 2024-02-20 16:24 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 170+ messages in thread
From: Krzysztof Kozlowski @ 2024-02-20 16:24 UTC (permalink / raw)
To: Christophe Leroy, mpe
Cc: linux-kernel, linuxppc-dev, paulus, j.ne, linkmauve, Ash Logan,
pali, segher, robh+dt, rw-r-r-0644, devicetree, joel,
krzysztof.kozlowski+dt, benh
On 20/02/2024 17:20, Christophe Leroy wrote:
> Michael,
>
> Le 19/11/2022 à 12:30, Ash Logan a écrit :
>> Adds schema for the various Wii U devicetree nodes used.
>>
>> Signed-off-by: Ash Logan <ash@heyquark.com>
>
> There's an issue at https://github.com/linuxppc/issues/issues/410 with
> kernel v6.4 as a target to merging thing, any plan ?
>
> It still applies without rebase (with git am -3).
No, it should not be merged, because it was never tested and fails in
several places.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 170+ messages in thread
* Re: [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree
@ 2024-02-20 16:24 ` Krzysztof Kozlowski
0 siblings, 0 replies; 170+ messages in thread
From: Krzysztof Kozlowski @ 2024-02-20 16:24 UTC (permalink / raw)
To: Christophe Leroy, mpe
Cc: devicetree, linkmauve, pali, linux-kernel, rw-r-r-0644, joel,
robh+dt, paulus, Ash Logan, krzysztof.kozlowski+dt, linuxppc-dev,
j.ne
On 20/02/2024 17:20, Christophe Leroy wrote:
> Michael,
>
> Le 19/11/2022 à 12:30, Ash Logan a écrit :
>> Adds schema for the various Wii U devicetree nodes used.
>>
>> Signed-off-by: Ash Logan <ash@heyquark.com>
>
> There's an issue at https://github.com/linuxppc/issues/issues/410 with
> kernel v6.4 as a target to merging thing, any plan ?
>
> It still applies without rebase (with git am -3).
No, it should not be merged, because it was never tested and fails in
several places.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 170+ messages in thread
end of thread, other threads:[~2024-02-20 16:25 UTC | newest]
Thread overview: 170+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-02 4:43 [PATCH 00/12] powerpc: Nintendo Wii U support Ash Logan
2022-03-02 4:43 ` Ash Logan
2022-03-02 4:43 ` [PATCH 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree Ash Logan
2022-03-02 4:43 ` Ash Logan
2022-03-02 13:28 ` Rob Herring
2022-03-02 13:28 ` Rob Herring
2022-03-02 4:43 ` [PATCH 02/12] powerpc: wiiu: device tree Ash Logan
2022-03-02 4:43 ` Ash Logan
2022-03-02 13:36 ` Rob Herring
2022-03-02 13:36 ` Rob Herring
2022-03-03 2:41 ` Ash Logan
2022-03-03 2:41 ` Ash Logan
2022-03-02 4:43 ` [PATCH 03/12] powerpc: wiiu: bootwrapper support Ash Logan
2022-03-02 4:43 ` Ash Logan
2022-03-02 4:43 ` [PATCH 04/12] powerpc: wiiu: introduce wiiu platform Ash Logan
2022-03-02 4:43 ` Ash Logan
2022-03-02 4:43 ` [PATCH 05/12] powerpc: wiiu: declare as non-coherent Ash Logan
2022-03-02 4:43 ` Ash Logan
2022-03-02 4:44 ` [PATCH 06/12] powerpc: wiiu: udbg support for latteipc Ash Logan
2022-03-02 4:44 ` Ash Logan
2022-03-02 4:44 ` [PATCH 07/12] powerpc: wiiu: espresso interrupt controller support Ash Logan
2022-03-02 4:44 ` Ash Logan
2022-03-02 4:44 ` [PATCH 08/12] powerpc: wiiu: latte " Ash Logan
2022-03-02 4:44 ` Ash Logan
2022-03-02 4:44 ` [PATCH 09/12] powerpc: espresso processor support Ash Logan
2022-03-02 4:44 ` Ash Logan
2022-03-02 4:44 ` [PATCH 10/12] powerpc: wiiu: platform support Ash Logan
2022-03-02 4:44 ` Ash Logan
2022-03-02 4:44 ` [PATCH 11/12] powerpc: wiiu: don't enforce flat memory Ash Logan
2022-03-02 4:44 ` Ash Logan
2022-05-13 22:43 ` Pali Rohár
2022-05-13 22:43 ` Pali Rohár
2022-05-20 3:41 ` Ash Logan
2022-05-20 3:41 ` Ash Logan
2022-05-20 8:04 ` Pali Rohár
2022-05-20 8:04 ` Pali Rohár
2022-05-20 10:44 ` Ash Logan
2022-05-20 10:44 ` Ash Logan
2022-05-20 12:30 ` Pali Rohár
2022-05-20 12:30 ` Pali Rohár
2022-06-09 22:24 ` Pali Rohár
2022-06-09 22:24 ` Pali Rohár
2022-08-08 18:40 ` Pali Rohár
2022-08-08 18:40 ` Pali Rohár
2022-09-08 15:25 ` Christophe Leroy
2022-09-08 15:25 ` Christophe Leroy
2022-09-08 15:35 ` Pali Rohár
2022-09-08 15:35 ` Pali Rohár
2022-09-08 20:17 ` Fragmented physical memory on powerpc/32 Pali Rohár
2022-09-08 20:17 ` Pali Rohár
2022-09-10 9:39 ` Christophe Leroy
2022-09-10 9:39 ` Christophe Leroy
2022-09-12 14:48 ` Mike Rapoport
2022-09-12 14:48 ` Mike Rapoport
2022-09-12 21:16 ` Pali Rohár
2022-09-12 21:16 ` Pali Rohár
2022-09-13 6:11 ` Christophe Leroy
2022-09-13 6:11 ` Christophe Leroy
2022-09-13 12:36 ` Christophe Leroy
2022-09-13 12:36 ` Christophe Leroy
2022-09-14 9:32 ` Mike Rapoport
2022-09-14 9:32 ` Mike Rapoport
2022-09-14 9:43 ` Christophe Leroy
2022-09-14 9:43 ` Christophe Leroy
2022-09-14 15:55 ` Mike Rapoport
2022-09-14 15:55 ` Mike Rapoport
2022-09-14 19:56 ` Pali Rohár
2022-09-14 19:56 ` Pali Rohár
2022-03-02 4:44 ` [PATCH 12/12] powerpc: wiiu: Add minimal default config Ash Logan
2022-03-02 4:44 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 00/12] powerpc: Nintendo Wii U support Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 02/12] powerpc: wiiu: device tree Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 03/12] powerpc: wiiu: bootwrapper support Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 04/12] powerpc: wiiu: introduce wiiu platform Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 05/12] powerpc: wiiu: declare as non-coherent Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 06/12] powerpc: wiiu: udbg support for latteipc Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-27 0:15 ` kernel test robot
2022-06-27 0:15 ` kernel test robot
2022-06-22 13:10 ` [PATCH v2 07/12] powerpc: wiiu: espresso interrupt controller support Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 08/12] powerpc: wiiu: latte " Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-27 2:51 ` kernel test robot
2022-06-27 2:51 ` kernel test robot
2022-06-22 13:10 ` [PATCH v2 09/12] powerpc: espresso processor support Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 10/12] powerpc: wiiu: platform support Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 11/12] powerpc: wiiu: don't enforce flat memory Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-22 13:10 ` [PATCH v2 12/12] powerpc: wiiu: Add minimal default config Ash Logan
2022-06-22 13:10 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 00/12] powerpc: Nintendo Wii U support Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 01/12] dt-bindings: wiiu: Document the Nintendo Wii U devicetree Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-29 9:52 ` Krzysztof Kozlowski
2022-06-29 9:52 ` Krzysztof Kozlowski
2022-06-28 13:31 ` [PATCH v3 02/12] powerpc: wiiu: device tree Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-29 9:58 ` Krzysztof Kozlowski
2022-06-29 9:58 ` Krzysztof Kozlowski
2022-06-29 16:13 ` Segher Boessenkool
2022-06-29 16:13 ` Segher Boessenkool
2022-06-29 18:13 ` Krzysztof Kozlowski
2022-06-29 18:13 ` Krzysztof Kozlowski
2022-06-29 20:28 ` Segher Boessenkool
2022-06-29 20:28 ` Segher Boessenkool
2022-06-28 13:31 ` [PATCH v3 03/12] powerpc: wiiu: bootwrapper support Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 04/12] powerpc: wiiu: introduce wiiu platform Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 05/12] powerpc: wiiu: declare as non-coherent Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 06/12] powerpc: wiiu: udbg support for latteipc Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 07/12] powerpc: wiiu: espresso interrupt controller support Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 08/12] powerpc: wiiu: latte " Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 09/12] powerpc: espresso processor support Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 10/12] powerpc: wiiu: platform support Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 11/12] powerpc: wiiu: don't enforce flat memory Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-06-28 13:31 ` [PATCH v3 12/12] powerpc: wiiu: add minimal default config Ash Logan
2022-06-28 13:31 ` Ash Logan
2022-11-15 14:47 ` [PATCH v3 00/12] powerpc: Nintendo Wii U support Christophe Leroy
2022-11-15 14:47 ` Christophe Leroy
2022-11-19 11:30 ` [PATCH v4 00/11] " Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 01/11] dt-bindings: wiiu: Document the Nintendo Wii U devicetree Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 21:36 ` Rob Herring
2022-11-19 21:36 ` Rob Herring
2022-11-20 15:30 ` Rob Herring
2022-11-20 15:30 ` Rob Herring
2024-02-20 16:20 ` Christophe Leroy
2024-02-20 16:20 ` Christophe Leroy
2024-02-20 16:24 ` Krzysztof Kozlowski
2024-02-20 16:24 ` Krzysztof Kozlowski
2022-11-19 11:30 ` [PATCH v4 02/11] powerpc: wiiu: device tree Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 03/11] powerpc: wiiu: bootwrapper support Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 04/11] powerpc: wiiu: introduce wiiu platform Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 05/11] powerpc: wiiu: declare as non-coherent Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 06/11] powerpc: wiiu: udbg support for latteipc Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 07/11] powerpc: wiiu: espresso interrupt controller support Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 08/11] powerpc: wiiu: latte " Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 09/11] powerpc: espresso processor support Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 10/11] powerpc: wiiu: platform support Ash Logan
2022-11-19 11:30 ` Ash Logan
2022-11-19 11:30 ` [PATCH v4 11/11] powerpc: wiiu: add minimal default config Ash Logan
2022-11-19 11:30 ` Ash Logan
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