From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E6EAC4332F for ; Mon, 28 Mar 2022 08:35:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239431AbiC1Ig6 (ORCPT ); Mon, 28 Mar 2022 04:36:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236668AbiC1Igy (ORCPT ); Mon, 28 Mar 2022 04:36:54 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A67620F5C; Mon, 28 Mar 2022 01:35:14 -0700 (PDT) X-UUID: 3660c27540a347f4bb9807ee75f7b975-20220328 X-UUID: 3660c27540a347f4bb9807ee75f7b975-20220328 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1853091362; Mon, 28 Mar 2022 16:35:09 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 28 Mar 2022 16:35:06 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 28 Mar 2022 16:35:06 +0800 Message-ID: <90baead6cd4cef119223e8bad13f6708bf6cc1a5.camel@mediatek.com> Subject: Re: [PATCH v9 14/22] drm/mediatek: dpi: move the csc_enable bit to SoC config From: Rex-BC Chen To: Guillaume Ranquet , , , , , , , , , , , , , , , , , CC: , , , , , , , Date: Mon, 28 Mar 2022 16:35:06 +0800 In-Reply-To: <20220327223927.20848-15-granquet@baylibre.com> References: <20220327223927.20848-1-granquet@baylibre.com> <20220327223927.20848-15-granquet@baylibre.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote: > Add flexibility by moving the csc_enable bit to SoC specific config > > Signed-off-by: Guillaume Ranquet > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 40254cd9d168..eb969c5c5c2e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -133,6 +133,7 @@ struct mtk_dpi_conf { > u32 hvsize_mask; > u32 channel_swap_shift; > u32 yuv422_en_bit; > + u32 csc_enable_bit; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct > mtk_dpi *dpi, bool enable) > > static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool > enable) > { > - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, > CSC_ENABLE); > + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : > 0, > + dpi->conf->csc_enable_bit); > } > > static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool > enable) > @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > Reviewed-by: Rex-BC Chen From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6483C433EF for ; Mon, 28 Mar 2022 08:35:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1885F10E5E2; Mon, 28 Mar 2022 08:35:16 +0000 (UTC) Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by gabe.freedesktop.org (Postfix) with ESMTPS id 81FFC10E5E2 for ; Mon, 28 Mar 2022 08:35:14 +0000 (UTC) X-UUID: 3660c27540a347f4bb9807ee75f7b975-20220328 X-UUID: 3660c27540a347f4bb9807ee75f7b975-20220328 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1853091362; Mon, 28 Mar 2022 16:35:09 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 28 Mar 2022 16:35:06 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 28 Mar 2022 16:35:06 +0800 Message-ID: <90baead6cd4cef119223e8bad13f6708bf6cc1a5.camel@mediatek.com> Subject: Re: [PATCH v9 14/22] drm/mediatek: dpi: move the csc_enable bit to SoC config From: Rex-BC Chen To: Guillaume Ranquet , , , , , , , , , , , , , , , , , Date: Mon, 28 Mar 2022 16:35:06 +0800 In-Reply-To: <20220327223927.20848-15-granquet@baylibre.com> References: <20220327223927.20848-1-granquet@baylibre.com> <20220327223927.20848-15-granquet@baylibre.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-fbdev@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-arm-kernel@lists.infradead.org, markyacoub@google.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote: > Add flexibility by moving the csc_enable bit to SoC specific config > > Signed-off-by: Guillaume Ranquet > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 40254cd9d168..eb969c5c5c2e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -133,6 +133,7 @@ struct mtk_dpi_conf { > u32 hvsize_mask; > u32 channel_swap_shift; > u32 yuv422_en_bit; > + u32 csc_enable_bit; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct > mtk_dpi *dpi, bool enable) > > static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool > enable) > { > - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, > CSC_ENABLE); > + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : > 0, > + dpi->conf->csc_enable_bit); > } > > static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool > enable) > @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > Reviewed-by: Rex-BC Chen From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D4490C433F5 for ; Mon, 28 Mar 2022 08:44:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=r/YlwN3WY4BBGBbb5EkMADMHJS3eQWyJugOB6HXupgU=; b=d/sdHLHd4C/YIU z8koIc3KIkMpStQlnplhkYI/qnEK8c1SXye6Tgb0HiDvtCXQvR4NDkpImNFAhYY1YmbpNOJ69Eqxt zGuA33wpPlhvWuiXE/y9ZgS4Oi5eazdlifTu6KcI7im+/Uj9sVirStwSN0jf2nnoihhPp/3nC84pf kJf4wUV98gpNJWZmKK9cfbiDrwlJTAOD253fCEw0awdzjFtPILVmJfKz6cqIj841P+o2D/GxvLeVb Siw6ghboFcHdG0TK8p4PcST3JQm7G4ESyJG43pTqikvHugxIN4EphlzcstUJGnn2uV3szjgzfsTSD HhroJOjkAU+ed/ctnEug==; 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Mon, 28 Mar 2022 16:35:06 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 28 Mar 2022 16:35:06 +0800 Message-ID: <90baead6cd4cef119223e8bad13f6708bf6cc1a5.camel@mediatek.com> Subject: Re: [PATCH v9 14/22] drm/mediatek: dpi: move the csc_enable bit to SoC config From: Rex-BC Chen To: Guillaume Ranquet , , , , , , , , , , , , , , , , , CC: , , , , , , , Date: Mon, 28 Mar 2022 16:35:06 +0800 In-Reply-To: <20220327223927.20848-15-granquet@baylibre.com> References: <20220327223927.20848-1-granquet@baylibre.com> <20220327223927.20848-15-granquet@baylibre.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_014408_634530_6668D84D X-CRM114-Status: GOOD ( 14.75 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote: > Add flexibility by moving the csc_enable bit to SoC specific config > > Signed-off-by: Guillaume Ranquet > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 40254cd9d168..eb969c5c5c2e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -133,6 +133,7 @@ struct mtk_dpi_conf { > u32 hvsize_mask; > u32 channel_swap_shift; > u32 yuv422_en_bit; > + u32 csc_enable_bit; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct > mtk_dpi *dpi, bool enable) > > static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool > enable) > { > - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, > CSC_ENABLE); > + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : > 0, > + dpi->conf->csc_enable_bit); > } > > static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool > enable) > @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > Reviewed-by: Rex-BC Chen _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 399CCC433F5 for ; Mon, 28 Mar 2022 08:44:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Mon, 28 Mar 2022 01:44:04 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 28 Mar 2022 01:35:09 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 28 Mar 2022 16:35:06 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 28 Mar 2022 16:35:06 +0800 Message-ID: <90baead6cd4cef119223e8bad13f6708bf6cc1a5.camel@mediatek.com> Subject: Re: [PATCH v9 14/22] drm/mediatek: dpi: move the csc_enable bit to SoC config From: Rex-BC Chen To: Guillaume Ranquet , , , , , , , , , , , , , , , , , CC: , , , , , , , Date: Mon, 28 Mar 2022 16:35:06 +0800 In-Reply-To: <20220327223927.20848-15-granquet@baylibre.com> References: <20220327223927.20848-1-granquet@baylibre.com> <20220327223927.20848-15-granquet@baylibre.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_014408_634530_6668D84D X-CRM114-Status: GOOD ( 14.75 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote: > Add flexibility by moving the csc_enable bit to SoC specific config > > Signed-off-by: Guillaume Ranquet > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 40254cd9d168..eb969c5c5c2e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -133,6 +133,7 @@ struct mtk_dpi_conf { > u32 hvsize_mask; > u32 channel_swap_shift; > u32 yuv422_en_bit; > + u32 csc_enable_bit; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct > mtk_dpi *dpi, bool enable) > > static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool > enable) > { > - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, > CSC_ENABLE); > + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : > 0, > + dpi->conf->csc_enable_bit); > } > > static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool > enable) > @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > Reviewed-by: Rex-BC Chen -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 340DEC433F5 for ; Mon, 28 Mar 2022 08:45:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Date:CC:To:From:Subject:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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Mon, 28 Mar 2022 01:44:04 -0700 Received: from mtkmbs10n2.mediatek.inc (172.21.101.183) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 28 Mar 2022 01:35:09 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Mon, 28 Mar 2022 16:35:06 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 28 Mar 2022 16:35:06 +0800 Message-ID: <90baead6cd4cef119223e8bad13f6708bf6cc1a5.camel@mediatek.com> Subject: Re: [PATCH v9 14/22] drm/mediatek: dpi: move the csc_enable bit to SoC config From: Rex-BC Chen To: Guillaume Ranquet , , , , , , , , , , , , , , , , , CC: , , , , , , , Date: Mon, 28 Mar 2022 16:35:06 +0800 In-Reply-To: <20220327223927.20848-15-granquet@baylibre.com> References: <20220327223927.20848-1-granquet@baylibre.com> <20220327223927.20848-15-granquet@baylibre.com> X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_014408_634530_6668D84D X-CRM114-Status: GOOD ( 14.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 2022-03-28 at 00:39 +0200, Guillaume Ranquet wrote: > Add flexibility by moving the csc_enable bit to SoC specific config > > Signed-off-by: Guillaume Ranquet > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c > b/drivers/gpu/drm/mediatek/mtk_dpi.c > index 40254cd9d168..eb969c5c5c2e 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c > @@ -133,6 +133,7 @@ struct mtk_dpi_conf { > u32 hvsize_mask; > u32 channel_swap_shift; > u32 yuv422_en_bit; > + u32 csc_enable_bit; > const struct mtk_dpi_yc_limit *limit; > }; > > @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct > mtk_dpi *dpi, bool enable) > > static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool > enable) > { > - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, > CSC_ENABLE); > + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : > 0, > + dpi->conf->csc_enable_bit); > } > > static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool > enable) > @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > > @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf = { > .hvsize_mask = HSIZE_MASK, > .channel_swap_shift = CH_SWAP, > .yuv422_en_bit = YUV422_EN, > + .csc_enable_bit = CSC_ENABLE, > .limit = &mtk_dpi_limit, > }; > Reviewed-by: Rex-BC Chen _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel