From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B66F7C433F5 for ; Mon, 4 Oct 2021 15:16:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9213361213 for ; Mon, 4 Oct 2021 15:16:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234284AbhJDPSl (ORCPT ); Mon, 4 Oct 2021 11:18:41 -0400 Received: from foss.arm.com ([217.140.110.172]:49700 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233289AbhJDPSk (ORCPT ); Mon, 4 Oct 2021 11:18:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 16716D6E; Mon, 4 Oct 2021 08:16:51 -0700 (PDT) Received: from [192.168.1.131] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F21133F70D; Mon, 4 Oct 2021 08:16:47 -0700 (PDT) Subject: Re: [PATCH 0/5] arm64: ARMv8.7-A: MTE: Add asymm mode support To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Andrew Morton , Catalin Marinas , Dmitry Vyukov , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Branislav Rankov , Andrey Konovalov , Lorenzo Pieralisi References: <20210913081424.48613-1-vincenzo.frascino@arm.com> <20210929154907.GC22029@willie-the-truck> From: Vincenzo Frascino Message-ID: <90cb5600-44cb-1ed5-de4b-d19919090622@arm.com> Date: Mon, 4 Oct 2021 17:16:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210929154907.GC22029@willie-the-truck> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Will, sorry for the late reply but I am on sabbatical :) On 9/29/21 5:49 PM, Will Deacon wrote: > I'm surprised not to see any update to: > > Documentation/arm64/memory-tagging-extension.rst > > particularly regarding the per-cpu preferred tag checking modes. Is > asymmetric mode not supported there? > The document that you are pointing out covers the userspace support, this series introduces the in-kernel support only for asymmetric MTE. The userspace bits for asymm will be added with a future series. The confusion comes from the fact, as Peter correctly pointed already, that I forgot to mention this vital info in the cover letter. Sorry about that I will make sure that this is addressed in v2. Thanks! > Will -- Regards, Vincenzo From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CD1DC433EF for ; Mon, 4 Oct 2021 15:19:15 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5E4CA61213 for ; Mon, 4 Oct 2021 15:19:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5E4CA61213 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=EclZzFqdFMZfyckAuhMVoubqEKvnhlM9F7n+xN9eXUE=; b=EXsx+aW6qBLGAL9zPhhlq6b6uR 6AJqT8I/tTUW2NigMovBWJqPduqkGsgTrtI/AHoTDtjAB5ptWOHVTnmxi6EYdUBHUnVEYPqASiFCF FZxw0bwpP8L2xu1g4Gj8KtMmesf4ujY2PIcd3ptOBRE91VeOPXyoPvanoyd4r0e0E8RhdQudxc6ER TSlmNUsnYugkHyk46Vv9kjGWJkizMoWIrQXQrIkD9Z65iKSwQBzub1KBdbtqae3pMbqwQrr6eRoZm m6MOwhD5MHTPyAXffwoJyvFG7tRUvnLBP5zUrOugfJ6nFwGpcPQTCi/73mr/viZOrKZtCYe2qdFa8 a5MAVkzg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mXPiC-006sp0-Vc; Mon, 04 Oct 2021 15:17:05 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mXPi9-006snQ-IQ for linux-arm-kernel@lists.infradead.org; Mon, 04 Oct 2021 15:17:03 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 16716D6E; Mon, 4 Oct 2021 08:16:51 -0700 (PDT) Received: from [192.168.1.131] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F21133F70D; Mon, 4 Oct 2021 08:16:47 -0700 (PDT) Subject: Re: [PATCH 0/5] arm64: ARMv8.7-A: MTE: Add asymm mode support To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Andrew Morton , Catalin Marinas , Dmitry Vyukov , Andrey Ryabinin , Alexander Potapenko , Marco Elver , Evgenii Stepanov , Branislav Rankov , Andrey Konovalov , Lorenzo Pieralisi References: <20210913081424.48613-1-vincenzo.frascino@arm.com> <20210929154907.GC22029@willie-the-truck> From: Vincenzo Frascino Message-ID: <90cb5600-44cb-1ed5-de4b-d19919090622@arm.com> Date: Mon, 4 Oct 2021 17:16:49 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210929154907.GC22029@willie-the-truck> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211004_081701_711222_5D202CB1 X-CRM114-Status: GOOD ( 11.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Will, sorry for the late reply but I am on sabbatical :) On 9/29/21 5:49 PM, Will Deacon wrote: > I'm surprised not to see any update to: > > Documentation/arm64/memory-tagging-extension.rst > > particularly regarding the per-cpu preferred tag checking modes. Is > asymmetric mode not supported there? > The document that you are pointing out covers the userspace support, this series introduces the in-kernel support only for asymmetric MTE. The userspace bits for asymm will be added with a future series. The confusion comes from the fact, as Peter correctly pointed already, that I forgot to mention this vital info in the cover letter. Sorry about that I will make sure that this is addressed in v2. Thanks! > Will -- Regards, Vincenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel