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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Frank Wunderlich <linux@fw-web.de>, linux-rockchip@lists.infradead.org
Cc: "Frank Wunderlich" <frank-w@public-files.de>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Kishon Vijay Abraham I" <kishon@ti.com>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Johan Jonker" <jbx6244@gmail.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Michael Riesch" <michael.riesch@wolfvision.net>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org
Subject: Re: [RFC/RFT v2 03/11] dt-bindings: phy: rockchip: add PCIe v3 constants
Date: Thu, 28 Apr 2022 08:34:24 +0200	[thread overview]
Message-ID: <918f5bc9-77f6-4d65-7432-ab53aadd6734@linaro.org> (raw)
In-Reply-To: <20220426132139.26761-4-linux@fw-web.de>

On 26/04/2022 15:21, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> Add constants that can be used in devicetree and driver for
> PCIe v3 phy.
> 
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> v2:
> - new patch because splitting out this file
> - rename file from snps to rockchip
> ---
>  include/dt-bindings/phy/phy-rockchip-pcie3.h | 21 ++++++++++++++++++++

Naming - vendor,device.

>  1 file changed, 21 insertions(+)
>  create mode 100644 include/dt-bindings/phy/phy-rockchip-pcie3.h
> 
> diff --git a/include/dt-bindings/phy/phy-rockchip-pcie3.h b/include/dt-bindings/phy/phy-rockchip-pcie3.h
> new file mode 100644
> index 000000000000..93e57edd337d
> --- /dev/null
> +++ b/include/dt-bindings/phy/phy-rockchip-pcie3.h
> @@ -0,0 +1,21 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */

s/MIT/BSD-2-clause/ just like bindings because it is part of it. Unless
you took it from something and it is already licensed like that?

> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + */
> +
> +#ifndef _DT_BINDINGS_PHY_ROCKCHIP_PCIE3
> +#define _DT_BINDINGS_PHY_ROCKCHIP_PCIE3
> +
> +/*
> + * pcie30_phy_mode[2:0]
> + * bit2: aggregation
> + * bit1: bifurcation for port 1
> + * bit0: bifurcation for port 0
> + */
> +#define PHY_MODE_PCIE_AGGREGATION 4	/* PCIe3x4 */
> +#define PHY_MODE_PCIE_NANBNB	0	/* P1:PCIe3x2  +  P0:PCIe3x2 */
> +#define PHY_MODE_PCIE_NANBBI	1	/* P1:PCIe3x2  +  P0:PCIe3x1*2 */
> +#define PHY_MODE_PCIE_NABINB	2	/* P1:PCIe3x1*2 + P0:PCIe3x2 */
> +#define PHY_MODE_PCIE_NABIBI	3	/* P1:PCIe3x1*2 + P0:PCIe3x1*2 */
> +
> +#endif /* _DT_BINDINGS_PHY_ROCKCHIP_PCIE3 */


Best regards,
Krzysztof

WARNING: multiple messages have this Message-ID
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Frank Wunderlich <linux@fw-web.de>, linux-rockchip@lists.infradead.org
Cc: "Frank Wunderlich" <frank-w@public-files.de>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Kishon Vijay Abraham I" <kishon@ti.com>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Johan Jonker" <jbx6244@gmail.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Michael Riesch" <michael.riesch@wolfvision.net>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org
Subject: Re: [RFC/RFT v2 03/11] dt-bindings: phy: rockchip: add PCIe v3 constants
Date: Thu, 28 Apr 2022 08:34:24 +0200	[thread overview]
Message-ID: <918f5bc9-77f6-4d65-7432-ab53aadd6734@linaro.org> (raw)
In-Reply-To: <20220426132139.26761-4-linux@fw-web.de>

On 26/04/2022 15:21, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> Add constants that can be used in devicetree and driver for
> PCIe v3 phy.
> 
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> v2:
> - new patch because splitting out this file
> - rename file from snps to rockchip
> ---
>  include/dt-bindings/phy/phy-rockchip-pcie3.h | 21 ++++++++++++++++++++

Naming - vendor,device.

>  1 file changed, 21 insertions(+)
>  create mode 100644 include/dt-bindings/phy/phy-rockchip-pcie3.h
> 
> diff --git a/include/dt-bindings/phy/phy-rockchip-pcie3.h b/include/dt-bindings/phy/phy-rockchip-pcie3.h
> new file mode 100644
> index 000000000000..93e57edd337d
> --- /dev/null
> +++ b/include/dt-bindings/phy/phy-rockchip-pcie3.h
> @@ -0,0 +1,21 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */

s/MIT/BSD-2-clause/ just like bindings because it is part of it. Unless
you took it from something and it is already licensed like that?

> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + */
> +
> +#ifndef _DT_BINDINGS_PHY_ROCKCHIP_PCIE3
> +#define _DT_BINDINGS_PHY_ROCKCHIP_PCIE3
> +
> +/*
> + * pcie30_phy_mode[2:0]
> + * bit2: aggregation
> + * bit1: bifurcation for port 1
> + * bit0: bifurcation for port 0
> + */
> +#define PHY_MODE_PCIE_AGGREGATION 4	/* PCIe3x4 */
> +#define PHY_MODE_PCIE_NANBNB	0	/* P1:PCIe3x2  +  P0:PCIe3x2 */
> +#define PHY_MODE_PCIE_NANBBI	1	/* P1:PCIe3x2  +  P0:PCIe3x1*2 */
> +#define PHY_MODE_PCIE_NABINB	2	/* P1:PCIe3x1*2 + P0:PCIe3x2 */
> +#define PHY_MODE_PCIE_NABIBI	3	/* P1:PCIe3x1*2 + P0:PCIe3x1*2 */
> +
> +#endif /* _DT_BINDINGS_PHY_ROCKCHIP_PCIE3 */


Best regards,
Krzysztof

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Frank Wunderlich <linux@fw-web.de>, linux-rockchip@lists.infradead.org
Cc: "Frank Wunderlich" <frank-w@public-files.de>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Kishon Vijay Abraham I" <kishon@ti.com>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Johan Jonker" <jbx6244@gmail.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Michael Riesch" <michael.riesch@wolfvision.net>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org
Subject: Re: [RFC/RFT v2 03/11] dt-bindings: phy: rockchip: add PCIe v3 constants
Date: Thu, 28 Apr 2022 08:34:24 +0200	[thread overview]
Message-ID: <918f5bc9-77f6-4d65-7432-ab53aadd6734@linaro.org> (raw)
In-Reply-To: <20220426132139.26761-4-linux@fw-web.de>

On 26/04/2022 15:21, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> Add constants that can be used in devicetree and driver for
> PCIe v3 phy.
> 
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> v2:
> - new patch because splitting out this file
> - rename file from snps to rockchip
> ---
>  include/dt-bindings/phy/phy-rockchip-pcie3.h | 21 ++++++++++++++++++++

Naming - vendor,device.

>  1 file changed, 21 insertions(+)
>  create mode 100644 include/dt-bindings/phy/phy-rockchip-pcie3.h
> 
> diff --git a/include/dt-bindings/phy/phy-rockchip-pcie3.h b/include/dt-bindings/phy/phy-rockchip-pcie3.h
> new file mode 100644
> index 000000000000..93e57edd337d
> --- /dev/null
> +++ b/include/dt-bindings/phy/phy-rockchip-pcie3.h
> @@ -0,0 +1,21 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */

s/MIT/BSD-2-clause/ just like bindings because it is part of it. Unless
you took it from something and it is already licensed like that?

> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + */
> +
> +#ifndef _DT_BINDINGS_PHY_ROCKCHIP_PCIE3
> +#define _DT_BINDINGS_PHY_ROCKCHIP_PCIE3
> +
> +/*
> + * pcie30_phy_mode[2:0]
> + * bit2: aggregation
> + * bit1: bifurcation for port 1
> + * bit0: bifurcation for port 0
> + */
> +#define PHY_MODE_PCIE_AGGREGATION 4	/* PCIe3x4 */
> +#define PHY_MODE_PCIE_NANBNB	0	/* P1:PCIe3x2  +  P0:PCIe3x2 */
> +#define PHY_MODE_PCIE_NANBBI	1	/* P1:PCIe3x2  +  P0:PCIe3x1*2 */
> +#define PHY_MODE_PCIE_NABINB	2	/* P1:PCIe3x1*2 + P0:PCIe3x2 */
> +#define PHY_MODE_PCIE_NABIBI	3	/* P1:PCIe3x1*2 + P0:PCIe3x1*2 */
> +
> +#endif /* _DT_BINDINGS_PHY_ROCKCHIP_PCIE3 */


Best regards,
Krzysztof

-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

WARNING: multiple messages have this Message-ID
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Frank Wunderlich <linux@fw-web.de>, linux-rockchip@lists.infradead.org
Cc: "Frank Wunderlich" <frank-w@public-files.de>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Kishon Vijay Abraham I" <kishon@ti.com>,
	"Vinod Koul" <vkoul@kernel.org>,
	"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Johan Jonker" <jbx6244@gmail.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Michael Riesch" <michael.riesch@wolfvision.net>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org
Subject: Re: [RFC/RFT v2 03/11] dt-bindings: phy: rockchip: add PCIe v3 constants
Date: Thu, 28 Apr 2022 08:34:24 +0200	[thread overview]
Message-ID: <918f5bc9-77f6-4d65-7432-ab53aadd6734@linaro.org> (raw)
In-Reply-To: <20220426132139.26761-4-linux@fw-web.de>

On 26/04/2022 15:21, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@public-files.de>
> 
> Add constants that can be used in devicetree and driver for
> PCIe v3 phy.
> 
> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
> ---
> v2:
> - new patch because splitting out this file
> - rename file from snps to rockchip
> ---
>  include/dt-bindings/phy/phy-rockchip-pcie3.h | 21 ++++++++++++++++++++

Naming - vendor,device.

>  1 file changed, 21 insertions(+)
>  create mode 100644 include/dt-bindings/phy/phy-rockchip-pcie3.h
> 
> diff --git a/include/dt-bindings/phy/phy-rockchip-pcie3.h b/include/dt-bindings/phy/phy-rockchip-pcie3.h
> new file mode 100644
> index 000000000000..93e57edd337d
> --- /dev/null
> +++ b/include/dt-bindings/phy/phy-rockchip-pcie3.h
> @@ -0,0 +1,21 @@
> +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */

s/MIT/BSD-2-clause/ just like bindings because it is part of it. Unless
you took it from something and it is already licensed like that?

> +/*
> + * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
> + */
> +
> +#ifndef _DT_BINDINGS_PHY_ROCKCHIP_PCIE3
> +#define _DT_BINDINGS_PHY_ROCKCHIP_PCIE3
> +
> +/*
> + * pcie30_phy_mode[2:0]
> + * bit2: aggregation
> + * bit1: bifurcation for port 1
> + * bit0: bifurcation for port 0
> + */
> +#define PHY_MODE_PCIE_AGGREGATION 4	/* PCIe3x4 */
> +#define PHY_MODE_PCIE_NANBNB	0	/* P1:PCIe3x2  +  P0:PCIe3x2 */
> +#define PHY_MODE_PCIE_NANBBI	1	/* P1:PCIe3x2  +  P0:PCIe3x1*2 */
> +#define PHY_MODE_PCIE_NABINB	2	/* P1:PCIe3x1*2 + P0:PCIe3x2 */
> +#define PHY_MODE_PCIE_NABIBI	3	/* P1:PCIe3x1*2 + P0:PCIe3x1*2 */
> +
> +#endif /* _DT_BINDINGS_PHY_ROCKCHIP_PCIE3 */


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-04-28  6:34 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-26 13:21 [RFC/RFT v2 00/11] RK3568 PCIe V3 support Frank Wunderlich
2022-04-26 13:21 ` Frank Wunderlich
2022-04-26 13:21 ` Frank Wunderlich
2022-04-26 13:21 ` Frank Wunderlich
2022-04-26 13:21 ` [RFC/RFT v2 01/11] dt-bindings: phy: rockchip: add PCIe v3 phy Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-28  6:33   ` Krzysztof Kozlowski
2022-04-28  6:33     ` Krzysztof Kozlowski
2022-04-28  6:33     ` Krzysztof Kozlowski
2022-04-28  6:33     ` Krzysztof Kozlowski
2022-04-26 13:21 ` [RFC/RFT v2 02/11] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-28  6:33   ` Krzysztof Kozlowski
2022-04-28  6:33     ` Krzysztof Kozlowski
2022-04-28  6:33     ` Krzysztof Kozlowski
2022-04-28  6:33     ` Krzysztof Kozlowski
2022-04-26 13:21 ` [RFC/RFT v2 03/11] dt-bindings: phy: rockchip: add PCIe v3 constants Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-28  6:34   ` Krzysztof Kozlowski [this message]
2022-04-28  6:34     ` Krzysztof Kozlowski
2022-04-28  6:34     ` Krzysztof Kozlowski
2022-04-28  6:34     ` Krzysztof Kozlowski
2022-04-28  9:27     ` Aw: " Frank Wunderlich
2022-04-28  9:27       ` Frank Wunderlich
2022-04-28  9:27       ` Frank Wunderlich
2022-04-28  9:27       ` Frank Wunderlich
2022-04-28  9:28       ` Krzysztof Kozlowski
2022-04-28  9:28         ` Krzysztof Kozlowski
2022-04-28  9:28         ` Krzysztof Kozlowski
2022-04-28  9:28         ` Krzysztof Kozlowski
2022-04-26 13:21 ` [RFC/RFT v2 04/11] phy: rockchip: Support PCIe v3 Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-28  7:38   ` Philipp Zabel
2022-04-28  7:38     ` Philipp Zabel
2022-04-28  7:38     ` Philipp Zabel
2022-04-28  7:38     ` Philipp Zabel
2022-04-26 13:21 ` [RFC/RFT v2 05/11] dt-bindings: pci: add bifurcation option to Rockchip DesignWare binding Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-28  6:37   ` Krzysztof Kozlowski
2022-04-28  6:37     ` Krzysztof Kozlowski
2022-04-28  6:37     ` Krzysztof Kozlowski
2022-04-28  6:37     ` Krzysztof Kozlowski
2022-04-28  7:25     ` Aw: " Frank Wunderlich
2022-04-28  7:25       ` Frank Wunderlich
2022-04-28  7:25       ` Frank Wunderlich
2022-04-28  7:25       ` Frank Wunderlich
2022-04-28  7:28       ` Krzysztof Kozlowski
2022-04-28  7:28         ` Krzysztof Kozlowski
2022-04-28  7:28         ` Krzysztof Kozlowski
2022-04-28  7:28         ` Krzysztof Kozlowski
2022-04-26 13:21 ` [RFC/RFT v2 06/11] PCI: rockchip-dwc: add PCIe bifurcation Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21 ` [RFC/RFT v2 07/11] arm64: dts: rockchip: rk3568: Add PCIe v3 nodes Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21 ` [RFC/RFT v2 08/11] arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21 ` [RFC/RFT v2 09/11] dt-bindings: pci: add lane-map to rockchip PCIe binding Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 16:04   ` Bjorn Helgaas
2022-04-26 16:04     ` Bjorn Helgaas
2022-04-26 16:04     ` Bjorn Helgaas
2022-04-26 16:04     ` Bjorn Helgaas
2022-04-26 17:27     ` Aw: " Frank Wunderlich
2022-04-26 17:27       ` Frank Wunderlich
2022-04-26 17:27       ` Frank Wunderlich
2022-04-26 17:27       ` Frank Wunderlich
2022-04-26 13:21 ` [RFC/RFT v2 10/11] PCI: rockchip: add a lane-map to rockchip pcie driver Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 16:07   ` Bjorn Helgaas
2022-04-26 16:07     ` Bjorn Helgaas
2022-04-26 16:07     ` Bjorn Helgaas
2022-04-26 16:07     ` Bjorn Helgaas
2022-04-26 13:21 ` [RFC/RFT v2 11/11] arm64: dts: rockchip: add basic lane-map and drop bifurcation from r2pro Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 13:21   ` Frank Wunderlich
2022-04-26 16:01 ` [RFC/RFT v2 00/11] RK3568 PCIe V3 support Bjorn Helgaas
2022-04-26 16:01   ` Bjorn Helgaas
2022-04-26 16:01   ` Bjorn Helgaas
2022-04-26 16:01   ` Bjorn Helgaas

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