[Intel-wired-lan] i350 software defined pins sysfs access

[Stephen Douthit <stephend@silicom-usa.com>]

On 6/13/19 2:51 AM, Max Lapshin wrote:
> 
>>
>> The igb driver already uses these pins for PTP if that's configured and
>> the 82575 uses SDP3 as a power enable for SFP cages, sgmii PHYs, etc.
>> You'll need to avoid letting userspace poke at SDPs that the driver is
>> already using.
> 
> I should write code to avoid touching these registers for these cases?

If you use the gpiolib framework, then I believe refactoring the
existing SDP peeks/pokes in the igb driver to use gpio descriptors
should take care of this for you.  In the cases where the driver needs
the SDPs it will have already requested those gpio descriptors and they
won't be available to other requesters like user space.

>> Assuming this can coexist with the existing usage, why not register this
>> as a gpio_chip with the gpiolib framework?
> 
> Ok, I will ?take a look at it.
> 
> 
>>
>>> Subject: [PATCH] i350: Add support for Intel i350 software defined pins
>>>
>>> +
>>> +/* Software defined pins 2-3 */
>>> +#define IGB_CTRL_EXT_SDP2_DATA E1000_CTRL_EXT_SDP2_DATA /* Value of SW Defineable Pin 2 */
>>> +#define IGB_CTRL_EXT_SDP3_DATA E1000_CTRL_EXT_SDP3_DATA /* Value of SW Defineable Pin 3 */
>>> +#define IGB_CTRL_EXT_SDP2_DIR ?E1000_CTRL_EXT_SDP2_DIR ?/* SDP2 Data direction */
>>> +#define IGB_CTRL_EXT_SDP3_DIR ?E1000_CTRL_EXT_SDP3_DIR ?/* SDP3 Data direction */
>>
>> Looks like e1000_defines.h already has this info.
>>
> 
> Only partially, so I decided to copy it to avoid situtation then I have in one code ?IGB_ and E1000_ ?defines.
> 
> It is not good?

I think it would be preferable to just add to e1000_defines.h where
they're all currently located rather than duplicating them.

-Steve